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Silicon nitride

About: Silicon nitride is a research topic. Over the lifetime, 32678 publications have been published within this topic receiving 413599 citations. The topic is also known as: N₄Si₃.


Papers
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Journal ArticleDOI
TL;DR: In this paper, a single crystalline wurtzite GaN was grown on the buffer layers of amorphous-like silicon nitride formed on Si (111) substrates by taking the following relationship with the substrate: GaN [0001]//Si [111] and GaN (1120)//Si (110).
Abstract: Wurtzite GaN films were grown on silicon nitride buffer layers formed on Si (111) substrates by radio frequency plasma-assisted molecular beam epitaxy. Reflection high energy electron diffraction, Auger electron spectroscopy, transmission electron microscopy, and photoluminescence results indicate that the single crystalline wurtzite GaN was grown on the buffer layers of amorphouslike silicon nitride formed on Si (111) substrates by taking the following relationship with the substrate: GaN [0001]//Si [111] and GaN (1120)//Si (110). Both faces of the silicon nitride buffer layer were found to be flat and sharp, the thickness of the buffer layer (1–1.5 nm) being constant across the interface. Efficient bound exciton emission was observed at 3.46 eV. The growth technique described was found to be simple but very powerful for growing high quality GaN films on Si substrates.

147 citations

Patent
Chae Gee Sung1
26 Feb 2004
TL;DR: In this article, the nitrogen element in silicon nitride diffuses into the semiconductor layer made of active polycrystalline silicon to compensate for lattice strain of the active poly-crystallines silicon film, to satisfy the desired quality of the interface between the semiconductors and the insulating layer.
Abstract: The present invention provides a semiconductor device capable of preventing deterioration in carrier mobility of a semiconductor layer, which is a quality of the interface between the semiconductor layer and an insulating layer, and a method of manufacturing the semiconductor device. In the semiconductor device, an interface layer is provided between a semiconductor layer made of active polycrystalline silicon and an insulating layer made of silicon oxide. The nitrogen element in silicon nitride diffuses into the semiconductor layer made of active polycrystalline silicon to compensate for lattice strain of the active polycrystalline silicon film, to satisfy the desired quality of the interface between the semiconductor layer and the insulating layer.

147 citations

Patent
Akihisa Yamaguchi1
27 Jan 2003
TL;DR: In this paper, a reduction of leakage current as well as a decrease in the thickness of an insulating film is realized in a semiconductor device by forming a silicon oxide film and a silicon nitride film on a substrate, which is then heated to a temperature within a range of 20°C-600°C.
Abstract: A reduction of a leakage current as well as a decrease in the thickness of an insulating film is realized in a semiconductor device. To this end, a silicon oxide film and a silicon nitride film are formed on a substrate, which is then heated to a temperature within a range of 20° C.-600° C. so that a plasma nitridation process can be performed on the silicon nitride film. Further, a thermal process is performed in a non-oxide gas atmosphere. By performing these processes, the gate leakage current can be significantly reduced in the formed gate insulator, and the silicon oxide-equivalent thickness of the insulating film can be significantly decreased as well.

147 citations

Journal ArticleDOI
TL;DR: In this paper, a novel process for the fabrication of ion-selective field effect transistors (ISFETs) together with CMOS circuits on the same chip is reported.
Abstract: A novel process for the fabrication of ion-selective field-effect transistors (ISFETs) together with CMOS circuits on the same chip is reported. The process is based on a standard 2- mu m, n-well, CMOS process, which is only modified starting at the metal interconnect step. The interconnect layer used is tungsten silicide. ISFETs are fabricated with floating polysilicon gates, which are exposed to photolithographic masking and HF etching before silicon nitride is deposited on the wafer. This layer of Si/sub 3/N/sub 4/ acts both as the pH-sensitive insulator for the ISFETs and as a protection layer for the on-chip circuitry buried beneath it. A source-follower circuit is described that provides an output voltage dependent on the threshold-voltage variations of the sensing transistor. >

146 citations

Patent
19 Jun 2014
TL;DR: In this article, a method of etching carbon films on patterned heterogeneous structures is described and includes a gas phase etch using remote plasma excitation, and the plasma effluents created are flowed into a substrate processing region.
Abstract: A method of etching carbon films on patterned heterogeneous structures is described and includes a gas phase etch using remote plasma excitation. The remote plasma excites a fluorine-containing precursor and an oxygen-containing precursor, the plasma effluents created are flowed into a substrate processing region. The plasma effluents etch the carbon film more rapidly than silicon, silicon nitride, silicon carbide, silicon carbon nitride and silicon oxide.

146 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023245
2022529
2021421
2020686
2019994
2018911