Showing papers on "Silicon on insulator published in 2018"
26 Sep 2018
TL;DR: This review paper covers the history of low-loss Si3N4 waveguide technology and a survey of worldwide research in a variety of device and applications as well as the status of Si3n4 foundries.
Abstract: The silicon nitride (Si3N4) planar waveguide platform has enabled a broad class of low-loss planar-integrated devices and chip-scale solutions that benefit from transparency over a wide wavelength range (400–2350 nm) and fabrication using wafer-scale processes. As a complimentary platform to silicon-on-insulator (SOI) and III–V photonics, Si3N4 waveguide technology opens up a new generation of system-on-chip applications not achievable with the other platforms alone. The availability of low-loss waveguides (<1 dB/m) that can handle high optical power can be engineered for linear and nonlinear optical functions, and that support a variety of passive and active building blocks opens new avenues for system-on-chip implementations. As signal bandwidth and data rates continue to increase, the optical circuit functions and complexity made possible with Si3N4 has expanded the practical application of optical signal processing functions that can reduce energy consumption, size and cost over today’s digital electronic solutions. Researchers have been able to push the performance photonic-integrated components beyond other integrated platforms, including ultrahigh Q resonators, optical filters, highly coherent lasers, optical signal processing circuits, nonlinear optical devices, frequency comb generators, and biophotonic system-on-chip. This review paper covers the history of low-loss Si3N4 waveguide technology and a survey of worldwide research in a variety of device and applications as well as the status of Si3N4 foundries.
301 citations
TL;DR: In this article, an octave-spanning coherent supercontinuum was generated in a silicon waveguide covering the spectral region from the near-to short-wave-infrared, and the generated signal spans the wavelength range from the edge of the silicon transmission window, approximately 1.06 to beyond 2.4
Abstract: Efficient complementary metal-oxide semiconductor-based nonlinear optical devices in the near-infrared are in strong demand. Due to two-photon absorption in silicon, however, much nonlinear research is shifting towards unconventional photonics platforms. In this work, we demonstrate the generation of an octave-spanning coherent supercontinuum in a silicon waveguide covering the spectral region from the near- to shortwave-infrared. With input pulses of 18 pJ in energy, the generated signal spans the wavelength range from the edge of the silicon transmission window, approximately 1.06 to beyond 2.4 μm, with a −20 dB bandwidth covering 1.124–2.4 μm. An octave-spanning supercontinuum was also observed at the energy levels as low as 4 pJ (−35 dB bandwidth). We also measured the coherence over an octave, obtaining , in good agreement with the simulations. In addition, we demonstrate optimization of the third-order dispersion of the waveguide to strengthen the dispersive wave and discuss the advantage of having a soliton at the long wavelength edge of an octave-spanning signal for nonlinear applications. This research paves the way for applications, such as chip-scale precision spectroscopy, optical coherence tomography, optical frequency metrology, frequency synthesis and wide-band wavelength division multiplexing in the telecom window. A silicon-based source that generates a wide spectrum of light, spanning the near-infrared transparency window of silicon, has been made. Supercontinuum generation involves using short, high-power pulses to generate broad continuous spectra by propagating them through nonlinear media. Supercontinuum sources are needed for applications in spectroscopy and optical coherence tomography. Silicon is an attractive medium since it is compatible with standard semiconductor fabrication processes but it suffers from losses due to nonlinear processes such as two-photon absorption. Now, Neetesh Singh of Massachusetts Institute of Technology in the USA and co-workers have realized a fully coherent supercontinuum generation in a silicon waveguide over a full octave that spans the near to shortwave infrared window. The researchers envision their source being used in applications such as chip-scale precision spectroscopy, optical frequency metrology and optical communications.
113 citations
TL;DR: Ge-rich Si1-xGex platforms may open the route towards the implementation of mid-IR photonic integrated circuits with low-loss beyond the Si multi-phonon absorption band onset, hence truly exploiting the full Ge transparency window up to λ ~15 µm.
Abstract: Mid-infrared (mid-IR) silicon photonics is expected to lead key advances in different areas including spectroscopy, remote sensing, nonlinear optics or free-space communications, among others. Still, the inherent limitations of the silicon-on-insulator (SOI) technology, namely the early mid-IR absorption of silicon oxide and silicon at λ~3.6 µm and at λ ~8.5 µm respectively, remain the main stumbling blocks that prevent this platform to fully exploit the mid-IR spectrum (λ ~2-20 µm). Here, we propose using a compact Ge-rich graded-index Si1-xGex platform to overcome this constraint. A flat propagation loss characteristic as low as 2-3 dB/cm over a wavelength span from λ = 5.5 µm to 8.5 µm is demonstrated in Ge-rich Si1-xGex waveguides of only 6 µm thick. The comparison of three different waveguides design with different vertical index profiles demonstrates the benefit of reducing the fraction of the guided mode that overlaps with the Si substrate to obtain such flat low loss behavior. Such Ge-rich Si1-xGex platforms may open the route towards the implementation of mid-IR photonic integrated circuits with low-loss beyond the Si multi-phonon absorption band onset, hence truly exploiting the full Ge transparency window up to λ ~15 µm.
94 citations
TL;DR: In this paper, an experimental realization of electrically driven electron-spin resonance in a silicon-on-insulator (SOI) nanowire quantum dot device with low-symmetry confinement potential was reported.
Abstract: The ability to manipulate electron spins with voltage-dependent electric fields is key to the operation of quantum spintronics devices, such as spin-based semiconductor qubits. A natural approach to electrical spin control exploits the spin–orbit coupling (SOC) inherently present in all materials. So far, this approach could not be applied to electrons in silicon, due to their extremely weak SOC. Here we report an experimental realization of electrically driven electron–spin resonance in a silicon-on-insulator (SOI) nanowire quantum dot device. The underlying driving mechanism results from an interplay between SOC and the multi-valley structure of the silicon conduction band, which is enhanced in the investigated nanowire geometry. We present a simple model capturing the essential physics and use tight-binding simulations for a more quantitative analysis. We discuss the relevance of our findings to the development of compact and scalable electron–spin qubits in silicon. Weak spin–orbit effects in silicon can be exploited to electrically drive electron-spin resonance in a silicon nanowire quantum dot device with low-symmetry confinement potential. Andrea Corna and colleagues at Grenoble’s CEA and University Grenoble Alpes achieved this by fabricating a silicon nanowire device over a silicon-on-insulator wafer, on which the gate accumulation voltages can define two corner quantum dots. Quantum confinement allows the coupling of spin and valley degrees of freedom via spin–orbit coupling, despite its inherent weakness in silicon, when the energy splitting between the valley energy eigenstates matches the magnetic field-induced Zeeman spin splitting. The observation of electric-dipole spin-valley resonance demonstrates the potential of spin–orbit coupling for realizing electric-field-mediated spin control, which will be crucial for large-scale integration of silicon-based spin qubits.
77 citations
TL;DR: In this article, an nMOS quantum-dot dedicated structure was built in thin silicon film fabricated with 28 nm high- $k$ metal gate ultra-thin body and ultra thin buried oxide advanced CMOS technology.
Abstract: Silicon co-integration offers compelling scale-up opportunities for quantum computing. In this framework, cryogenic temperature is required for the coherence of solid-state quantum devices. This paper reports the characterization of an nMOS quantum-dot dedicated structure below 100 mK. The device under test is built in thin silicon film fabricated with 28 nm high- $k$ metal gate ultra-thin body and ultra-thin buried oxide advanced CMOS technology. The MOS structure is functional with improved performances at cryogenic temperature. The results open new research avenues in CMOS co-integration for quantum computing applications within the FD-SOI platform.
74 citations
TL;DR: In this paper, an ultra-low-loss waveguide on 500 nm thick silicon-on-insulator (SOI) platform is presented to enable long delay lines, high-Q resonators, narrow filters, etc.
Abstract: Integrated ultra-low-loss waveguides are highly desired for integrated photonics to enable applications that require long delay lines, high-Q resonators, narrow filters, etc. Here, we present an ultra-low-loss silicon waveguide on 500 nm thick Silicon-On-Insulator (SOI) platform. Meter-scale delay lines, million-Q resonators and tens of picometer bandwidth grating filters are experimentally demonstrated. We design a low-loss low-reflection taper to seamlessly integrate the ultra-low-loss waveguide with standard heterogeneous Si/III-V integrated photonics platform to allow realization of high-performance photonic devices such as ultra-low-noise lasers and optical gyroscopes.
69 citations
TL;DR: In this paper, the spin-orbit interaction (SOI) plays a major role in measured anisotropy and inhomogeneities such as interface steps strongly affect the spin splittings and their valley dependence.
Abstract: Spin qubits hosted in silicon (Si) quantum dots (QD) are attractive due to their exceptionally long coherence times and compatibility with the silicon transistor platform. To achieve electrical control of spins for qubit scalability, recent experiments have utilized gradient magnetic fields from integrated micro-magnets to produce an extrinsic coupling between spin and charge, thereby electrically driving electron spin resonance (ESR). However, spins in silicon QDs experience a complex interplay between spin, charge, and valley degrees of freedom, influenced by the atomic scale details of the confining interface. Here, we report experimental observation of a valley dependent anisotropic spin splitting in a Si QD with an integrated micro-magnet and an external magnetic field. We show by atomistic calculations that the spin-orbit interaction (SOI), which is often ignored in bulk silicon, plays a major role in the measured anisotropy. Moreover, inhomogeneities such as interface steps strongly affect the spin splittings and their valley dependence. This atomic-scale understanding of the intrinsic and extrinsic factors controlling the valley dependent spin properties is a key requirement for successful manipulation of quantum information in Si QDs.
61 citations
TL;DR: In this article, the fabrication and testing of annealing-free SiNOI nonlinear photonic circuits is presented. But, the Si3N4-based frequency combs made co-integration with silicon-based optoelectronics elusive, thus reducing dramatically its effective complementary metal oxide semiconductor (CMOS) compatibility.
Abstract: Silicon-nitride-on-insulator (SiNOI) is an attractive platform for optical frequency comb generation in the telecommunication band because of the low two-photon absorption and free carrier induced nonlinear loss when compared with crystalline silicon. However, high-temperature annealing that has been used so far for demonstrating Si3N4-based frequency combs made co-integration with silicon-based optoelectronics elusive, thus reducing dramatically its effective complementary metal oxide semiconductor (CMOS) compatibility. We report here on the fabrication and testing of annealing-free SiNOI nonlinear photonic circuits. In particular, we have developed a process to fabricate low-loss, annealing-free, and crack-free Si3N4 740-nm-thick films for Kerr-based nonlinear photonics featuring a full process compatibility with front-end silicon photonics. Experimental evidence shows that micro-resonators using such annealing-free silicon nitride films are capable of generating a frequency comb spanning 1300–2100 nm via optical parametrical oscillation based on four-wave mixing. This work constitutes a decisive step toward time-stable power-efficient Kerr-based broadband sources featuring full process compatibility with Si photonic integrated circuits on CMOS lines.
60 citations
TL;DR: In this article, the state of the art and perspectives on emerging technologies based on integrated silicon photonic microresonators in the technology domains of intradatacenter optical interconnects, integrated nonlinear and quantum photonics, and lab-on-a-chip optical biosensing are reviewed.
Abstract: Silicon photonics is becoming the leading technology for photonic integrated circuits (PICs) due to large-scale integration, low cost, and high-volume productions enabled by complementary metal-oxide-semiconductor (CMOS) fabrication process. Thanks to various material and optical characteristics of crystalline silicon, the silicon-on-insulator platform has become the dominant material platform for silicon photonics. Meanwhile, monolithic or heterogeneous integration of other materials on silicon photonic chips, including the silicon nitride (SiN)-on-insulator platform and the III–V-on-silicon platform, are under rapid developments to enhance the functionalities of silicon photonics. Among the myriad of silicon photonic structures for passive and active components, integrated microresonators are promising for a broad range of applications due to their strong resonance field enhancement, narrowband wavelength selectivity, and compact footprints. In this paper, we review the state of the art and our perspectives on emerging technologies based on integrated silicon photonic microresonators in the technology domains of intradatacenter optical interconnects, integrated nonlinear and quantum photonics, and lab-on-a-chip optical biosensing. We specifically review recent progress and our original work in SOI microring-based crossbar switch fabrics; III–V-on-silicon microresonator lasers; silicon-based microresonator nonlinear and quantum sources; and SiN microresonator-based optical biosensors.
60 citations
TL;DR: A compact, ultra-broadband, 2×2 adiabatic 3 dB coupler using silicon-on-insulator (SOI) strip waveguides assisted by sub-wavelength gratings (SWGs) that achieves even, broadband power splitting over the 185 nm wavelength range of the authors' tunable laser with low average excess losses.
Abstract: We report on a compact, ultra-broadband, 2×2 adiabatic 3 dB coupler using silicon-on-insulator (SOI) strip waveguides assisted by sub-wavelength gratings (SWGs). In our device, two tapered SWG-assisted SOI strip waveguides achieve an adiabatic mode evolution of the two lowest-order transverse electric modes, in a two-waveguide system, for broadband 3 dB power splitting. Theory predicts that the proposed coupler will operate from 1200 nm to 1700 nm. We have been able to measure the performance of a device with a 15 μm long mode evolution region that achieves even, broadband power splitting over the 185 nm wavelength range of our tunable laser with an imbalance of less than ±0.3 dB and with low average excess losses of <0.11 dB.
60 citations
TL;DR: A compact, low power electro-absorption modulator (EAM) Si/GeSi hetero-structure based on an 800 nm SOI overlayer with a modulation bandwidth of 56 GHz is presented.
Abstract: The ever-increasing demand for integrated, low power interconnect systems is pushing the bandwidth density of CMOS photonic devices. Taking advantage of the strong Franz-Keldysh effect in the C and L communication bands, electro-absorption modulators in Ge and GeSi are setting a new standard in terms of device footprint and power consumption for next generation photonics interconnect arrays. In this paper, we present a compact, low power electro-absorption modulator (EAM) Si/GeSi hetero-structure based on an 800 nm SOI overlayer with a modulation bandwidth of 56 GHz. The device design and fabrication tolerant process are presented, followed by the measurement analysis. Eye diagram measurements show a dynamic ER of 5.2 dB at a data rate of 56 Gb/s at 1566 nm, and calculated modulator power is 44 fJ/bit.
28 May 2018
TL;DR: In this article, the authors discuss the special mode properties of silicon nanophotonic waveguides, including birefringence, mode dispersion, and mode hybridness.
Abstract: Various passive photonic integrated devices have been developed successfully with silicon-on-insulator (SOI) nanowires in the past decade. It is well known that SOI-nanowire waveguides have ultrahigh index contrast ( $\Delta $ ) and ultrahigh birefringence. As a result, the structures and the design rules of a silicon photonic device are probably very different from the conventional case of using low- $\Delta $ optical waveguides. For example, some asymmetric waveguide structures have been used often to realize many silicon photonic devices developed recently. Furthermore, higher order modes have been involved in some of these silicon photonic devices. This paper discusses the special mode properties of silicon nanophotonic waveguides, including birefringence, mode dispersion, and mode hybridness. A review is then given on recent progress of these advanced passive silicon photonic devices with structural asymmetry, including on-chip polarization-handling devices, mode converters/(de)multiplexers, microring-resonator optical filters/switches, and Mach..Zehnder interferometer optical switches. Silicon photonic integrated circuits with these building blocks are also reviewed, including hybrid (de)multiplexers and reconfigurable optical add..drop multiplexers.
TL;DR: A polarization-insensitive 2×2 thermo-optic Mach-Zehnder switch (MZS) on silicon is proposed and demonstrated experimentally by utilizing silicon-on-insulator (SOI) nanophotonic waveguides with a 340-nm-thick silicon core layer.
Abstract: A polarization-insensitive 2×2 thermo-optic Mach–Zehnder switch (MZS) on silicon is proposed and demonstrated experimentally by utilizing silicon-on-insulator (SOI) nanophotonic waveguides with a 340-nm-thick silicon core layer. The present MZS consists of two 2×2 3 dB multimode interference (MMI) couplers, which are designed to be polarization-insensitive by choosing the core width optimally. Meanwhile, the MZS arms are designed with square SOI nanophotonic waveguides with a cross section of 340 nm×340 nm in order to achieve polarization-insensitive phase shift. The fabricated silicon MZS has an excess loss of 1∼4 dB and an extinction ratio of >20 dB in the C-band (1530∼1565 nm) for both TM and TE polarizations.
18 Jun 2018
TL;DR: In this article, an ultra-low-loss waveguide on 500 nm thick silicon-on-insulator (SOI) platform is presented to enable long delay lines, high-Q resonators, narrow filters, etc.
Abstract: Integrated ultra-low-loss waveguides are highly desired for integrated photonics to enable applications that require long delay lines, high-Q resonators, narrow filters, etc. Here, we present an ultra-low-loss silicon waveguide on 500 nm thick Silicon-On-Insulator (SOI) platform. Meter-scale delay lines, million-Q resonators and tens of picometer bandwidth grating filters are experimentally demonstrated. We design a low-loss low-reflection taper to seamlessly integrate the ultra-low-loss waveguide with standard heterogeneous Si/III-V integrated photonics platform to allow realization of high-performance photonic devices such as ultra-low-noise lasers and optical gyroscopes.
01 Dec 2018
TL;DR: For the first time, a 28nm FDSOI e-NVM solution for automotive micro-controller applications using a Phase Change Memory (PCM) based on chalcogenide ternary material is proposed and a true 5V transistor with high analog performance has been demonstrated.
Abstract: For the first time we propose a 28nm FDSOI e-NVM solution for automotive micro-controller applications using a Phase Change Memory (PCM) based on chalcogenide ternary material. A complete array organization is described exploiting body biasing capability of Fully Depleted Silicon On Insulator (FDSOI) transistors. Leveraging triple gate oxide integration with high-k metal gate (HKMG) stack, a true 5V transistor with high analog performance has been demonstrated. Reliable PCM 0,036um2 analytical cell with 2 decades programming window after 1 Million of cycles has been demonstrated. Finally, current distributions based on a fully integrated 16MB macro-cell is presented achieving Bit Error Rate (BER) < 10−8 after multiple bakes at 150°C and 10k cycling of code storage memory.
TL;DR: The results demonstrate the feasibility of CMOS-compatible, high-responsivity GeSn-based PDs for shortwave infrared applications and significantly enhanced by the resonant cavity effects.
Abstract: We report GeSn p-i-n resonant-cavity-enhanced photodetectors (RCEPDs) grown on silicon-on-insulator substrates. A vertical cavity, composed of a buried oxide as the bottom reflector and a deposited SiO2 layer on the top surface as the top reflector, is created for the GeSn p-i-n structure to enhance the light-matter interaction. The responsivity experiments demonstrate that the photodetection range is extended to 1820 nm, completely covering all the telecommunication bands, because of the introduction of 2.5% Sn in the photon-absorbing layer. In addition, the responsivity is significantly enhanced by the resonant cavity effects, and a responsivity of 0.376 A/W in the telecommunication C-band is achieved that is significantly higher than that of conventional GeSn-based PDs. These results demonstrate the feasibility of CMOS-compatible, high-responsivity GeSn-based PDs for shortwave infrared applications.
TL;DR: The main leading applications that demand advanced technologies to fit the unconventional requirements of extreme operating conditions, including silicon (Si), silicon on insulator (SOI), silicon germanium (SiGe), silicon carbide (SiC) as well as III–V semiconductors particularly the gallium nitride (GaN) semiconductor are reviewed.
Abstract: Several industrial applications require specific electronic systems installed in harsh environments to perform measurements, monitoring, and control tasks such as in space exploration, aerospace missions, automotive industries, down-hole oil and gas industry, and geothermal power plants. The extreme environment could be surrounding high-, low-, and wide-range temperature, intense radiation, or even a combination of above conditions. We review, in this paper, the main leading applications that demand advanced technologies to fit the unconventional requirements of extreme operating conditions, discussing their main merits and limits compared to established and emerging technologies in this field, including silicon (Si), silicon on insulator (SOI), silicon germanium (SiGe), silicon carbide (SiC) as well as III–V semiconductors particularly the gallium nitride (GaN) semiconductor. In spite of successfully exceeding extreme conditions borders by developing advanced semiconductor devices dedicated for harsh environments, especially in high-temperature applications, the packaging challenges are still limiting the reliability of the developed technologies. Those challenges are examined in this review in terms of limitations and proposed solutions.
TL;DR: The backgating effect on trench-isolated enhancement-mode p-GaN devices fabricated on 200mm GaN-on-SOI was investigated in this paper, where it was shown that the sources of both the low side and high side need to be connected to their respective fully isolated Si(111) device layers to keep the substrates and the sources at equipotential.
Abstract: The backgating effect on trench-isolated enhancement-mode p-GaN devices fabricated on 200-mm GaN-on-SOI was investigated. We show that to minimize the backgating effect in the monolithically integrated half-bridge, the sources of both the low side and high side need to be connected to their respective fully isolated Si(111) device layers to keep the substrates and the sources at equipotential.
01 Aug 2018
TL;DR: In this paper, the basic concept of silicon-on-insulator (SOI) slot waveguides, including slot waveguide theory, fabrication steps, and applications, are discussed.
Abstract: This chapter deals with the basic concept of silicon-on-insulator (SOI) slot waveguides, including slot waveguide theory, fabrication steps, and applications. First, in the theory section, a modal field expression and the characteristic equation is derived, which is also valid for higher-order modes. SOI slot waveguide structures are simulated and characteristic values like the effective refractive indices and the field confinement factors are determined. The fabrication section describes typical SOI fabrication steps and the limits of current fabrication techniques. Additionally, developments regarding loss reduction in SOI slot waveguides are given from the fabrication point of view. This is followed by the theory and practice of slot waveguide based electro-optical modulators. Here, the SOI slot waveguide is embedded in an organic nonlinear optical material in order to achieve record-low voltage-length products. In the field of optical sensors, it is shown that slot waveguides enable remarkable waveguide sensitivity for both refractive index sensing and surface sensing.
TL;DR: The refractive index of the gap region between two coupling waveguides is effectively increased using subwavelength grating, which leads to high-performance operation and a compact design footprint, with a mode-evolution length of only 25 µm and an entire device length of 65 µm.
Abstract: We demonstrate a compact high-performance adiabatic 3-dB coupler for the silicon-on-insulator platform. The refractive index of the gap region between two coupling waveguides is effectively increased using subwavelength grating, which leads to high-performance operation and a compact design footprint, with a mode-evolution length of only 25 µm and an entire device length of 65 µm. The designed adiabatic 3-dB coupler has been fabricated using electron beam lithography and the feature size used in our design is CMOS compatible. The fabricated device is characterized in the wavelength range from 1500 nm to 1600 nm, with a measured power splitting ratio better than 3 ± 0.27 dB and an average insertion loss of 0.20 dB.
25 Jul 2018
TL;DR: The latest developments of emitters, passive devices, highly efficient nonlinear devices as well as integrated detectors for mid-IR applications are reviewed.
Abstract: In less than a decade, the mid-infrared (mid-IR) spectral range (2.5–12 $\mu \text {m}$ ) has become a key application for innovative silicon photonic devices because of the growing potential in spectroscopy, materials processing, chemical and biomolecular sensing, security and industry applications. We review the latest developments of emitters (GeSn lasers or heterogeneous quantum cascade laser on Si), passive devices (Silicon on Insulator, suspended Si or Ge waveguides, and SiGe/Si waveguides, Ge/SiGe waveguides), highly efficient nonlinear devices as well as integrated detectors for mid-IR applications. Perspectives for potential applications will also be discussed.
TL;DR: In this article, a 50 × 50 silicon photonic micro-electromechanical-system (MEMS) switches with reduced polarization dependence are presented, which use two-level waveguide crossbars and MEMS-actuated adiabatic couplers.
Abstract: We report on 50 × 50 silicon photonic micro-electromechanical-system (MEMS) switches with reduced polarization dependence. The switches make use of two-level waveguide crossbars and MEMS-actuated adiabatic couplers. Simulations indicate that by eliminating all polarization-dependent elements (e.g., waveguide crossings), low polarization-dependent losses (<1 dB) can be realized. An experimental prototype switch was fabricated by bonding two silicon-on-insulator wafers. A polarization-dependent loss of 8.5 dB and a polarization-dependent delay of 44 ps were measured. The extinction ratios are greater than 40 dB for both polarizations. With improved fabrication, total on-chip loss <2 dB can potentially be achieved for both polarizations.
TL;DR: Considering the device's size, its simple, robust and low power operation, and the rapid industrial uptake of silicon photonics, the widespread integration of the reported design in more complex systems is predicted.
Abstract: Random numbers are a fundamental resource in science and technology. Among the different approaches to generating them, random numbers created by exploiting the laws of quantum mechanics have proven to be reliable and can be produced at enough rates for their practical use. While these demonstrations have shown very good performance, most of the implementations using free-space and fibre optics suffer from limitations due to their size, which strongly limits their practical use. Here we report a quantum random number generator based on phase fluctuations from a diode laser, where the other required optical components are integrated on a mm-scale monolithic silicon-on-insulator chip. The post-processing reported in this experiment is performed via software. However, our physical device shows the potential of operation at generation rates in the Gbps regime. Considering the device’s size, its simple, robust and low power operation, and the rapid industrial uptake of silicon photonics, we foresee the widespread integration of the reported design in more complex systems.
TL;DR: This work serves as a proof of concept that the slow light effect can strengthen light-matter interaction and thereby improve device performance in sensing and nonlinearity applications.
Abstract: In this Letter, the design, fabrication, and characterization of slow light devices using photonic crystal waveguides (PhCWs) in the mid-infrared wavelength range of 3.9–3.98 μm are demonstrated. The PhCWs are built on the silicon-on-insulator platform without undercut to leverage its well-developed fabrication process and strong mechanical robustness. Lattice shifting and thermo-optic tuning methods are utilized to manipulate the slow light region for potential spectroscopy sensing applications. Up to 20 nm wavelength shift of the slow light band edge is demonstrated. Normalized delay-bandwidth products of 0.084–0.112 are obtained as a result of dispersion engineering. From the thermo-optic characterization results, the slow light enhancement effect of thermo-optic tuning efficiency is verified by the proportional relationship between the phase shift and the group index. This work serves as a proof of concept that the slow light effect can strengthen light–matter interaction and thereby improve device performance in sensing and nonlinearity applications.
TL;DR: To the best of the knowledge, this MPF demonstrates ultrahigh peak rejection and narrow bandwidth simultaneously in SOI for the first time with MRR of such propagation loss and avoids using external electrical devices to improve the rejection.
Abstract: We propose and demonstrate a silicon-on-insulator (SOI)-based widely tunable microwave photonic filter (MPF), which is implemented by using an under-coupled microring resonator (MRR) assisted by two cascaded tunable Mach-Zehnder interferometers. In the experiment, the MPF achieves an ultrahigh peak rejection exceeding 60 dB, a full width at half-maximum bandwidth of 780 MHz, and a frequency tuning range of 0-40 GHz, even when the propagation loss of the MRR is 1.65 dB/cm. To the best of our knowledge, this MPF demonstrates ultrahigh peak rejection and narrow bandwidth simultaneously in SOI for the first time with MRR of such propagation loss and avoids using external electrical devices to improve the rejection.
TL;DR: A highly-sensitive temperature sensor employing a Mach-Zehnder interferometer (MZI) based on silicon-on-insulator (SOI) platform that is easy to fabricate, and no need of any polymer cladding, which makes it more robust, and can be used in lab- on-chip systems as a temperature monitor.
Abstract: We propose a highly-sensitive temperature sensor employing a Mach-Zehnder interferometer (MZI) based on silicon-on-insulator (SOI) platform The waveguide widths in the two MZI arms are tailored to have different temperature sensitivities but nearly the same group refractive indices A temperature sensor with an enhanced sensitivity of larger than 438pm/°C is experimentally demonstrated, which is over seven times larger than that of conventional silicon optical temperature sensor (about 60pm/°C for quasi-TM mode) Moreover, the sensor is easy to fabricate, only by a single mask, and no need of any polymer cladding, which makes it more robust, and can be used in lab-on-chip systems as a temperature monitor
TL;DR: It is shown that while a soft pseudo-substrate could significantly enhance the growth rate of the instability in specific conditions, no effet is seen for SiGe heteroepitaxy, because of the normalized thickness of the layers.
Abstract: Strain engineering is seen as a cost-effective way to improve the properties of electronic devices. However, this technique is limited by the development of the Asarro Tiller Grinfeld growth instability and nucleation of dislocations. Two strain engineering processes have been developed, fabrication of stretchable nanomembranes by deposition of SiGe on a sacrificial compliant substrate and use of lateral stressors to strain SiGe on Silicon On Insulator. Here, we investigate the influence of substrate softness and pre-strain on growth instability and nucleation of dislocations. We show that while a soft pseudo-substrate could significantly enhance the growth rate of the instability in specific conditions, no effet is seen for SiGe heteroepitaxy, because of the normalized thickness of the layers. Such results were obtained for substrates up to 10 times softer than bulk silicon. The theoretical predictions are supported by experimental results obtained first on moderately soft Silicon On Insulator and second on highly soft porous silicon. On the contrary, the use of a tensily pre-strained substrate is far more efficient to inhibit both the development of the instability and the nucleation of misfit dislocations. Such inhibitions are nicely observed during the heteroepitaxy of SiGe on pre-strained porous silicon.
TL;DR: In this paper, a wafer-level and highly controllable fabrication technology for silicon nanowire field effect transistor (SiNW-FET arrays) on (111) silicon-on-insulator (SOI) wafers was presented.
Abstract: This paper presents a wafer-level and highly controllable fabrication technology for silicon nanowire field-effect transistor (SiNW-FET arrays) on (111) silicon-on-insulator (SOI) wafers. Herein, 3,000 SiNW FET array devices were designed and fabricated on 4-inch wafers with a rate of fine variety of more than 90% and a dimension deviation of the SiNWs of less than ± 20 nm in each array. As such, wafer-level and highly controllable fabricated SiNW FET arrays were realized. These arrays showed excellent electrical properties and highly sensitive determination of pH values and nitrogen dioxide. The high-performance of the SiNW FET array devices in liquid and gaseous environments can enable the detection under a wide range of conditions. This fabrication technology can lay the foundation for the large-scale application of SiNWs.
TL;DR: In this article, a CMOS-compatible photodetector with high responsivity is reported, which utilizes the unique interface coupling effect found in fully depleted silicon on insulator (SOI) MOSFETs.
Abstract: A CMOS-compatible photodetector with high responsivity is reported. This device utilizes the unique interface coupling effect found in fully depleted silicon on insulator (SOI) MOSFETs. Unlike conventional SOI photodetectors, the proposed device shows higher photoresponsivity in thinner Si films due to stronger interface coupling, as confirmed by TCAD simulations. A prototype device fabricated with a simplified process flow achieves a record photoresponsivity up to $3.3\times 10^{4}$ A/W.
01 Oct 2018
TL;DR: A dual-mode NRZ/PAM4 silicon photonic transmitter based on a segmented-electrode Mach-Zehnder Modulator (SE-MZM) that achieves 9.5 dB extinction ratio and 12.6 pJ/bit power efficiency when driving the flip-chip bonded MZM designed in a 130 nm SOI process.
Abstract: Silicon photonic interconnects have the potential to break bandwidth-distance limitations intrinsically associated with electrical links. This paper presents a dual-mode NRZ/PAM4 silicon photonic transmitter based on a segmented-electrode Mach-Zehnder Modulator (SE-MZM). The electrical portion of the transmitter, fabricated in a 16nm FinFET process, utilizes stacked-CMOS push-pull driver stages that include a parallel asymmetric fast discharging path to compensate for the slow transition edge caused by the nonlinear capacitance of the reversed-biased MZM diode segments. High-speed PAM4 modulation is achieved with phase interpolators for coarse delay control between the MSB and LSB segments and by employing independent digital-controlled delay lines on a per-segment basis to match the optical propagation delay. The 56 Gb/s optical transmitter achieves 9.5 dB extinction ratio and 12.6 pJ/bit power efficiency, excluding laser power, when driving the flip-chip bonded MZM designed in a 130 nm SOI process.