Silicon on insulator

About: Silicon on insulator is a research topic. Over the lifetime, 19592 publications have been published within this topic receiving 302534 citations. The topic is also known as: SOI.

Introduction to microelectronic fabrication

Abstract: (NOTE: Each chapter concludes with Summary, References, and Problems) Preface 1 An Overview of Microelectronic Fabrication A Historical Perspective An Overview of Monolithic Fabrication Processes and Structures Metal-Oxide-Semiconductor (MOS) Processes Basic Bipolar Processing Safety 2 Lithography The Photolithographic Process Etching Techniques Photomask Fabrication Exposure Systems Exposure Sources Optical and Electron Microscopy Further Reading 3 Thermal Oxidation of Silicon The Oxidation Process Modeling Oxidation Factors Influencing Oxidation Rate Dopant Redistribution During Oxidation Masking Properties of Silicon Dioxide Technology of Oxidation Oxide Quality Selective Oxidation and Shallow Trench Formation Oxide Thickness Characterization Process Simulation 4 Diffusion The Diffusion Process Mathematical Model for Diffusion The Diffusion Coefficient Successive Diffusions Solid-Solubility Limits Junction Formation and Characterization Sheet Resistance Generation-Depth and Impurity Profile Measurement Diffusion Simulation Diffusion Systems Gettering 5 Ion Implantation Implantation Technology Mathematical Model for Ion Implantation Selective Implantation Junction Depth and Sheet Resistance Channeling, Lattice Damage, and Annealing Shallow Implantation Source Listing 6 Film Deposition Evaporation Sputtering Chemical Vapor Deposition Epitaxy Further Reading 7 Interconnections and Contacts Interconnections in Integrated Circuits Metal Interconnections and Contact Technology Diffused Interconnections Polysilicon Interconnections and Buried Contacts Silicides and Multilayer-Contact Technology The Liftoff Process Multilevel Metallization Copper Interconnects and Damascene Processes Further Reading 8 Packaging and Yield Testing Wafer Thinning and Die Separation Die Attachment Wire Bonding Packages Flip-Chip and Tape-Automated-Bonding Processes Yield Further Reading 9 MOS Process Integration Basic MOS Device Considerations MOS Transistor Layout and Design Rules Complementary MOS (CMOS) Technology Silicon on Insulator 10 Bipolar Process Integration The Junction-Isolated Structure Current Gain Transit Time Basewidth Breakdown Voltages Other Elements in SBC Technology Layout Considerations Advanced Bipolar Structures Other Bipolar Isolation Techniques BICMOS 11 Processes for Microelectromechanical Systems-MEMS Mechanical Properties of Silicon Bulk Micromachining Silicon Etchants Surface Micromachining High-Aspect-Ratio Micromachining: The LIGA Molding Process Silicon Wafer Bonding IC Process Compatibility Answers to Selected Problems Index

A role for graphene in silicon-based semiconductor devices

Abstract: As silicon-based electronics approach the limit of improvements to performance and capacity through dimensional scaling, attention in the semiconductor field has turned to graphene, a single layer of carbon atoms arranged in a honeycomb lattice. Its high mobility of charge carriers (electrons and holes) could lead to its use in the next generation of high-performance devices. Graphene is unlikely to replace silicon completely, however, because of the poor on/off current ratio resulting from its zero bandgap. But it could be used to improve silicon-based devices, in particular in high-speed electronics and optical modulators.

Silicon-based optoelectronics

Abstract: The decade of the 1990's is an opportune time for scientists and engineers to create cost-effective silicon "superchips" that merge silicon photonics with advanced silicon electronics on a silicon substrate. We can expect significant electrooptical devices from Column IV materials (Si, Ge, C and Sn) for a host of applications. The best devices will use strained-layer epitaxy, doped heterostructures, and bandgap engineering of quantum-confined structures. This paper reviews Si-based photonic components and optoelectronic integration techniques, both hybrid and monolithic. >

Compact efficient broadband grating coupler for silicon-on-insulator waveguides.

Abstract: We have designed a high-efficiency broadband grating coupler for coupling between silicon-on-insulator (SOI) waveguides and optical fibers. The grating is only 13 µm long and 12 µm wide, and the size of the grooves is optimized numerically. For TE polarization the coupling loss to single-mode fiber is below 1 dB over a 35-nm wavelength range when using SOI with a two-pair bottom reflector. The tolerances to fabrication errors are also calculated.

Strained silicon as a new electro-optic material

Abstract: For decades, silicon has been the material of choice for mass fabrication of electronics. This is in contrast to photonics, where passive optical components in silicon have only recently been realized. The slow progress within silicon optoelectronics, where electronic and optical functionalities can be integrated into monolithic components based on the versatile silicon platform, is due to the limited active optical properties of silicon. Recently, however, a continuous-wave Raman silicon laser was demonstrated; if an effective modulator could also be realized in silicon, data processing and transmission could potentially be performed by all-silicon electronic and optical components. Here we have discovered that a significant linear electro-optic effect is induced in silicon by breaking the crystal symmetry. The symmetry is broken by depositing a straining layer on top of a silicon waveguide, and the induced nonlinear coefficient, chi(2) approximately 15 pm V(-1), makes it possible to realize a silicon electro-optic modulator. The strain-induced linear electro-optic effect may be used to remove a bottleneck in modern computers by replacing the electronic bus with a much faster optical alternative.