Showing papers on "Silicon oxide published in 1971"

Hall Mobility in Chemically Deposited Polycrystalline Silicon

Abstract: Hall‐mobility measurements have been performed on polycrystalline silicon films deposited on a silicon oxide surface by the thermal decomposition of silane. Samples with doping impurities added during deposition or by diffusion from a doped vapor‐deposited oxide showed similar behavior. For both n‐type and p‐type samples approximately 5 μ thick, the mobility reached a maximum value of about 40 cm2/V sec at a free carrier concentration of about 1018 cm−3 and decreased for both higher and lower carrier concentrations. The observed Hall mobility was generally higher in p‐type samples than in n‐type samples. The decrease in observed mobility with decreasing carrier concentration is attributed to the effects of high resistivity space‐charge regions surrounding grain boundaries in the polycrystalline material. The mobility was seen to increase as the film thickness increased for samples with similar doping, indicating a more ordered structure in thicker films.

On electronic conduction through evaporated silicon oxide films

Abstract: A new model is proposed to explain the voltage-current characteristics of evaporated silicon oxide films in the whole range of electric field intensity, in which one sort of Poole-Frenkel effect is used and the current conduction is thought of as due to the carrier jumps over the coulomb potential wall from the occupied Poole-Frenkel sites to the empty ones. The voltage-current characteristics are calculated and compared with existing experimental data. We found good agreement between the calculated results of this model and the experimental results.

Channeling‐Effect Analysis of Thin Films on Silicon: Aluminum Oxide

Abstract: The stoichiometry of films of aluminum oxide deposited hydrolytically onto silicon substrates has been measured by using 2‐MeV He‐ion backscattering techniques. Oxygen to aluminum ratios of 1.5±0.1 are found for all films grown in the temperature range 600–830°C, despite marked differences in chlorine content and physicochemical properties. The procedures used for extracting line shapes for the two components (aluminum and oxygen) are shown to be generally applicable to many thin film systems. In the particular case of a thin amorphous film overlying a crystalline substrate, channeling effects in the substrate permit a direct determination of the individual line shapes contributing to the total backscattered particle spectrum. Examples are given for stoichiometry tests of amorphous films of aluminum oxide and silicon oxide on silicon‐crystal substrates. The composition of thin films of silicon‐metal alloys may be measured by the same procedure as illustrated by studies of chromium‐silicide formation on si...

Method of manufacturing an igfet and the product thereof

Abstract: THE INVENTION RELATES TO A METHOD OF MANUFACTURING AN INSULATED GATE FIELD EFFECT TRANSISTOR IN WHICH AN INSET SILICON OXIDE LAYER IS PROVIDED ON THE SURFACE OF A SILICON BODY BY MEANS OF A MASKING LAYER WHICH MASKS AGAINST OXIDATION.

Silicon nitride-silicon oxide etchant

Abstract: This invention discloses a chemical to etchant and a process for chemically etching silicon nitride-silicon oxide composite structure which may be used, for example in microelectronic devices. The etching process or system utilizes a mixture of phosphoric acid and a fluoborate anion containing compound such as fluoboric acid. The etch rate of the silicon nitride relative to the etch rate of the silicon oxide can be controlled to the desired etch rate by varying the temperature of the etchant and/or adjusting the ratio mixture of the phosphoric acid and the fluoboric acid.

Semiconductor device having a composite film as a passivating film

Abstract: A semiconductor device having a composite film as a passivating film formed on the surface of the device in the order of films of silicon oxide formed by thermal oxidation, phosphorous glass, silicon oxide formed by chemical vapor deposition and silicon nitride, whereby cracks, which occurs in the film when the phosphorous glass film is in contact with the silicon nitride film, can be eliminated.

Thermal emissivity and solar absorptivity of aluminum coated with double layers of aluminum oxide and silicon oxide.

Abstract: Thermal emissivity and solar absorptivity of Al coated with surface layers of aluminum oxide and silicon oxide, describing fabrication techniques and performance measurements

Nucleation and critical condensation phenomena of silver on silicon oxide

Abstract: Recent theoretical predictions of thin film nucleation are reviewed and the relationships between these and critical condensation conditions derived. Experiments of measurements of nucleation density with varying substrate temperature are described and the results compared with theory. Adsorption and surface diffusion energies of silver on silicon oxide have been obtained. Further experiments involving critical condensation are described and the results support the values of surface adsorption energy obtained by the nucleation studies.

Method of improving the radiation resistance of silicon transistors with a silicon oxide coating

Abstract: The radiation resistance of silicon transistors with a silicon oxide coating is improved by irradiating the semiconductor device with electrons at an energy below 150 keV and a dose between 109 and 1012 rad at the boundary layer between the silicon and silicon oxide coating. The temperature of the semiconductor device is maintained at a temperature of between 150 DEG and 450 DEG C during irradiation thereof.

Electronic components having improved ionic stability

Abstract: This disclosure is concerned with electronic components having improved ionic stability. The improved stability is achieved by the doping of silicon oxide films and layers in the component. Suitable doping materials are selected from a group of material having divalent large ionic radii atoms.

Surface inversion solar cell and method of forming same

Abstract: An improved semiconductor device, particularly suitable as a solar cell, has a surface inversion layer with increased charge density. A p-type semiconductor material is covered with a layer comprising oxides of silicon and chromium. The addition of the chromium oxides increases the charge density of the inversion layer by orders of magnitude over that created by the silicon oxide alone. In the fabrication process, a silicon oxide layer is formed first, followed by a layer of elemental chromium. Both layers are oxidized by placing the device in an oxygen atmosphere at temperatures in excess of 800* C.

Contact members for silicon semiconductor devices

Abstract: A contact and interconnection arrangement for a silicon semiconductor device with a silicon oxide coating, which comprises a double layer composed of a thin layer of molybdenum-nickel alloy and a thin layer of gold, or which comprises a triple layer composed of a thin layer of molybdenum-nickel alloy, a thin layer of silver or copper, and a thin layer of gold, whereby the molybdenum-nickel alloy contains 5 to 50 percent of nickel by weight.

Semiconductor device having a t o -s o composite oxide layer

Abstract: A surface protective layer or surface insulating layer of a composite oxide which is formed of silicon dioxide (SiO2) to which is added with less than 0.02 percent by weight of titanium dioxide (TiO2) stabilizes and improves the characteristics of the semiconductor device of a single layer formed of silicon oxide. The above-mentioned semiconductor device is provided by mixing small amount of gaseous organic compounds of titanium such as triisopropyl titanate with a gaseous organic compound of silicon such as tetraethoxysilane and leading the resultant gaseous mixture onto a predetermined semiconductor substrate which is heated and held at a temperature of from 300° to 500° C. to react therewith.

Integrated circuit including field effect transistor and cerment resistor

Abstract: A single integrated circuit chip includes a field effect transistor having an insulating layer of silicon nitride covering an interface between a silicon substrate and a silicon oxide layer. A thin film cermet resistor on the nitride layer is connected to an ohmic contact of a field effect transistor electrode.

Epsilon caprolactam prodn

Abstract: Epsilon-Caprolactam is prepd. by contacting epsilon-caprolactone and/or a 1-4C alkyl ester of epsilon -hydroxycaproic acid with H2 and NH3 at 200-320 degrees C. with a catalyst consisting of (I) TiO2, Al2O3, Al2O3-silicon oxide and/or silicon oxide; and (II) Cu. Gives epsilon -caprolactam with high yields and selectivity without the formation of (NH4)2SO4 as by-product.

The structure of willemite films on silicon

Abstract: Thin films have been prepared on silicon substrates by reacting manganese doped zinc fluoride with silicon oxide. A structural analysis has shown that the films consist of small crystallites of alpha-zinc orthosilicate (willemite) embedded in a matrix of silicon oxide.

Development of integral covers on solar cells

Abstract: The electron-beam technique for evaporating a dielectric material onto solar cells is investigated. A process has been developed which will provide a highly transparent, low stress, 2 mil thick cover capable of withstanding conventional space type qualification tests including humidity, thermal shock, and thermal cycling. The covers have demonstrated the ability to withstand 10 to the 15th power 1 MeV electrons and UV irradiation with minor darkening. Investigation of the cell AR coating has produced a space qualifiable titanium oxide coating which will give an additional 6% current output over similar silicon oxide coated cells when covered by glass.

Method and structure in forming electrically continuous circuit through insulating layer

Abstract: 1,240,189. Semi-conductor devices; printed circuits. TEXAS INSTRUMENTS Inc. 30 Oct., 1968 [14 Feb., 1968], No. 51454/68. Headings H1K and H1R. In a semi-conductor arrangement contact layers at different levels separated by insulation are interconnected by metal deposited electrolessly to fill apertures in the insulation. A typical integrated circuit arrangement, shown in Fig. 9, is made by first forming an insulating layer 102 over diffused transistor and diode configurations 82-88 in silicon wafer 80 and etching to expose zones to be contacted. Molybdenum 196 is then deposited overall by R.F. sputtering or vapour deposition followed by gold 194 and a further layer of molybdenum, and the metal etched back to form the first layer of contacts and interconnections. To improve adhesion a thin layer of palladiumsilicon alloy or aluminium is provided on the silicon before depositing molybdenum 196 and the deposited gold may include traces of platinum to improve its adherence to the molybdenum. A further layer of insulation 106 is next applied and apertured at 108, 110. After removing the molybdenum at the base of the holes and replacing by palladium deposited from chloride solution to improve adhesion, nickel or gold 202, 204 is deposited from an electroless plating solution to fill the holes and cover the insulation at 200. After removal of metal 200 metal 209 is vapour deposited overall and etched back to form an interconnection pattern and contact lands as desired Further layers of insulation and levels of interconnection patterns may be added by the same technique. Silicon oxide is the preferred insulating material though silicon nitride, alumina and tantalum oxide may be used. One or more of copper, gold, silver, tantalum, titanium or even aluminium may be used for the first layers of contacts and interconnections while copper, molybdenum, gold and silver are suitable for filling holes 108, 110. Alternative semi-conductors are germanium and gallium arsenide. Patterning of the layers of metal and insulation is effected by photo-resist and etching steps using cyanide to remove gold and a phosphoric-acetic-nitric acid mix to remove molybdenum. A planar diode with an electrode arrangement according to the invention is also described.

Improvements in and relating to methods of manufacturing semiconductor devices

Abstract: 1,244,759. Semi-conductor devices. ASSOCIATED SEMICONDUCTOR MFRS. Ltd. 11 Dec., 1968, No. 58828/68. Heading H1K. A method of interconnecting two devices T 1 and T 2 , in an integrated circuit, which are mutually isolated by a groove 6, comprises providing a conductive metal bridge 19 over the groove. The steps of forming the bridge comprise providing a plug of material at the surface of the semi-conductor body between the two devices T 1 and T 2 , forming a conductive metal layer between the electrodes 15 and 33 of the two devices, removing the plug by etching so that the surface of the semi-conductor body underlying the conductive metal layer is exposed, and etching a groove 6 into the semi-conductor body to isolate the two devices. An insulating layer of silicon oxide, silicon nitride, silicon carbide or aluminium oxide is provided on the surface of the semi-conductor body which may be of silicon, germanium or gallium arsenide, and serves as a mask during processing. The plug is of aluminium and is removed by etching with hot sulphuric acid. The electrodes 12, 13, 15, 32, 33 and 35 are of aluminium coated with titanium which itself is coated with gold, the gold layer later being thickened by electroplating. The plug may alternatively be of copper and the interconnections of molybdenum, nickel, platinum or silver. After the removal of the plug, the groove 6 is formed by etching the semi-conductor body with hydrazine and water in equal molecular ratio, the body having been so arranged that the groove orientation is parallel to the intersection of the crystal planes with the body surface parallel to the crystal plane so that the etching wil result in a groove of V-shape cross-section.

Fabrication of a semiconductor device

Abstract: Process as in BE 704674 for mfg a semiconductor comprising a silicon semiconductor body with at least one semiconductor component, in which a planar layer of silicon oxide is applied on one surface of the silicon body in a laminated configuration with at least part of its thickness embedded in the body and by protecting the surface of the silicon body locally by a mask during oxidation - The starting material is a layer of silicon on a substrate and during the application of the laminated configuration of silicon oxide, oxidation is carried out until the configuration extends over the whole surface of the silicon layer which is divided into a number of parts separated by the configuration - The silicon layer is applied as an epitaxial layer of one conductivity type on a semiconductor support of the opposite conductivity type