Showing papers on "Silicon oxide published in 1986"

Method of fabricating a cantilever beam for a monolithic accelerometer

Abstract: A monolithic accelerometer is fabricated with an integral cantilever beam sensing element which is etched out of a silicon wafer from the back surface. A thermal silicon oxide is formed on both surfaces of a (100) silicon wafer. Silicon oxide is removed from the back surface in a pattern which defines the sides of the cantilever beam and the sides of an alignment groove. The width and orientation of the openings in the silicon oxide are selected to control the depth of etching when the wafer is subsequently etched with an anisotropic etchant. An integrated circuit is then formed on the front surface and dry etching is used to complete the groove and separate the sides of the beam from the wafer.

Multilevel integrated circuits employing fused oxide layers

Abstract: A multilevel semiconductor integrated circuit is fabricated by providing a plurality of substrates having an epitaxial layer on one surface and a silicon oxide layer on the surface of the epitaxial layer. The substrates are sequentially stacked with the silicon oxide layers in contact and fused together. One substrate is retained as a support, and other substrates are removed by etching after the fusion of the silicon oxide layers, thereby leaving only the stacked epitaxial layers separated by silicon oxide. The stacked structure facilitates the vertical fabrication of CMOS transistor pairs sharing a common gate electrode in an epitaxial layer between the two transistors. Electrical isolation between the epitaxial layers is provided by the fused silicon oxide or by removing the silicon oxide and some of the silicon thereby forming a void between adjacent epitaxial layers. Circuit devices in the plurality of epitaxial layers are readily interconnected by forming conductive vias between the epitaxial layers.

Plasma‐enhanced growth and composition of silicon oxynitride films

Abstract: Silicon oxynitride films with varying oxygen/nitrogen ratio were grown from SiH4, N2O, and NH3 by means of a plasma‐enchanced chemical vapor deposition process. The elemental composition of the deposited films was measured by a variety of high‐energy ion beam techniques. To determine the chemical structure we used Fourier transform infrared absorption spectroscopy and electron‐spin resonance. Ellipsometric data and values for mechanical stress are also reported. We show that the entire range of compositions from silicon oxide to silicon nitride can be covered by applying two different processes and by adjusting the N2O/NH3 gas flow ratio of the respective processes. It is suggested that the N2O/SiH4 gas flow ratio is the major deposition characterization parameter, which also controls the chemical structure as far as the hydrogen bonding configuration is concerned. We found that the films contain significant amounts of excess silicon and that the mechanical stress in the oxynitrides is lower than in plasm...

A silicon-thermopile-based infrared sensing array for use in automated manufacturing

Abstract: This paper describes a new low-cost infrared detector array that has been realized using standard silicon MOS process technology and micromachining. This array uses thermopiles as infrared detecting elements and multiple layers of silicon oxide and silicon nitride for diaphragm windows measuring 0.4 mm × 0.7 mm × 1.3 µm. Each thermopile consists of 40 polysilicon-gold thermocouples. A high fill factor for this array structure has been achieved by using the boron etch-stop technique to provide 20-µm thick silicon support rims. The array shows a response time of less than 10 ms, a responsivity of 12 V/ W; and a broad-band input spectral sensitivity. The process is compatible with silicon MOS devices, and a 16 × 2 staggered array with on-chip multiplexers has been designed for applications in process monitoring. The array theoretically achieves an NETD of 0.9°C and an MRTD of 1.4°C at a spatial frequency of 0.2 Hz/mrad in a typical imaging system.

Effect of organic contaminants on the oxidation kinetics of silicon at room temperature

Abstract: The oxidation kinetics of HF‐etched n‐ and p‐doped silicon in air at room temperature have been studied by electron spectroscopy for chemical analysis. No great differences have been found between the n‐ and p‐type oxidation kinetics at the low doping level of the studied samples. The rate of oxide growth on the HF‐etched surface is much lower than that on a silicon surface obtained by fracture in air of a silicon monocrystal. The behavior of a silicon sample fractured in de‐ionized water and then oxidized in air at room temperature is intermediate. The above findings have been interpreted on the basis of surface reactions involving the plasticizers of the HF and water containers. These reactions produce carbon‐rich hydrophobic surfaces which retard the silicon oxide growth. A mechanism for the involved surface reactions is proposed.

Make-link programming of semiconductor devices using laser-enhanced thermal breakdown of insulator

Abstract: A semiconductor device is programmed by a laser beam which causes an insulator between two conductors on a silicon substrate to be permanently altered, as by breakdown of the insulator. The conductors may be metals such as aluminum or tungsten, and the insulator is a layer of deposited or thermal silicon oxide. The breakdown may be enhanced by voltage applied between the conductors while the laser beam is focused on the structure.

Manufacture of semiconductor device

Abstract: PURPOSE:To coat the roughened surface of the semiconductor substrate with an insulating film at a comparatively low temperature and to make gentle the surface by a method wherein an amorphous silicon film with a good covering property is deposited on the insulating film in an atmosphere of plasma CONSTITUTION:Impurity diffusion layers 2 are formed in a single crystal silicon substrate 1 and a silicon oxide film 3 is formed on the single crystal silicon substrate 1 Moreover, after that, polycrystalline silicon wiring layers 4, which act as the gate of a transistor and a wiring, are formed The state of the surface of the semiconductor substrate in this stage is in a state that a comparatively steep roughness of a thickness of 2-3,000Angstrom to 7-8,000Angstrom is formed on the surface An amorphous silicon film 5 of a thickness of about 4,000Angstrom is deposited by decomposing silane gas in an atmosphere of plasma in such a way that this roughness is sufficiently coated with the amorphous silicon film 5 After this, the amorphous silicon film 5 is made to completely oxidize by performing a wet oxidation at about 600 degC to form a silicon oxide film 6

Manufacture of semiconductor device

Abstract: PURPOSE:To form high melting point metal silicide with a better close adhering ability on a diffusion layer for source and drain regions of a MOS device, by forming a gate electrode, by depositing silicide, and by etching the silicide portion having silicon underlaid by using a mask of a silicon oxide film. CONSTITUTION:On the surface of a silicon substrate 11, a field oxide film 12, gate oxide film 13, polycrystalline silicon layer 14 and polycrystalline silicon gate electrode 14' are formed. After a CVD-SiO2 film is formed over the entire face, reactive ion etching forms side walls 15. Next, an N diffusion layer 16 is formed, high melting point metal silicide 17 is formed over the entire face, and then thermal oxidation forms a silicon oxide film 18. Thereafter, the portion of the silicon oxide film 18 under which there does not exist silicon is removed, only the silicon oxide film 18 on the diffusion layer 16 for the source and drain regions and on the gate electrode 14' is left, and the silicide 17 is etched using a mask of this silicon oxide film 18. Next, a PSG film 19 is evaporated, contact holes 20 are formed, and an Al film is evaporated over the entire face and is patterned to form Al wiring 21.

Manufacture of semiconductor device

Abstract: PURPOSE:To prevent the thin shoulder of a gate oxide film from generating on the boundary surface of a thick oxide film by forming a region of an oxide film thicker than the gate oxide film on the boundary between a diffusion layer region and a thick silicon oxide film forming an element isolation region. CONSTITUTION:A diffusion layer region 12 is formed by selectively opening a thick silicon oxide film 11; a comparatively thick silicon oxide film 10 whose thickness is larger than a gate oxide film 13 to be formed in the next stage is formed on the diffusion layer region 12: high concentration ion is selectively implanted in the comparatively thick silicon oxide film 10 except the boundary part of the thick silicon oxide film 11; selective etching is performed in order to eliminate from above the diffusion layer region 12, the high concentration ion implanted region of the silicon oxide film 10; a gate oxide film 13 is formed on the exposed surface of the diffusion layer region 12 by thermal oxidation. Thereby, the decrease of film thickness of the constricted part 18 of the gate oxide film 13 can be improved.

Manufacture of semiconductor device

Abstract: PURPOSE:To enable the formation of the contact holes having a step ped part by making holes on a silicon oxide film as an interlaminar insulating film by etching using a silicon nitride film which is an interlaminar insulating film as a stopper and subsequently arranging a smaller hole than that formed on the silicon nitride film and the underlying gate oxide film. CONSTITUTION:A silicon nitride film 5 as an interlaminar insulating film is spread over a gate oxide film 4 and the necessary wiring pattern is arranged, after which a silicon oxide film 6 as an interlaminar insulating film is spread over that. Under this condition, the patterning using a resist 7 is done firstly in order to open contact holes. At that time, the holes are made slightly bigger and after removing the silicon oxide film 6, the resist is also removed. The patterning is effected again by using a resist 8 and the patterning of this time makes the hole inside the hole opened before and which is smaller than that. After etching the silicon nitride film 5 and the gate oxide film 4, the resist 8 is removed thereby forming a contact hole 9 with a step ped part which is recessed gently.

Continuous vapor deposition method for producing a coated glass article

Abstract: A continuous method for producing multi-layer coated sheet glass. Molten glass (19) is cast onto a hearth (20) and flows onto the surface of the tin bath (15), from which it is picked up by rolls (22) and conveyed through the lehr (12) and the cooling section (13). A non-oxidizing atmosphere is maintained in zone (18) by introducing a gas thereinto from the conduits (23) to maintain a positive pressure. Nothing is done to control the atmosphere in the lehr; as a consequence, the oxidizing atmosphere therein is air. The glass is treated as it travels under the distributor (27) with a gas containing silane to produce a silicon coating and as it travels under the distributor (28) with an oxidizing gas containing metal compound to form a metal oxide coating. Before the silicon coated glass reach distributor (28) a silicon oxide layer is formed.

Diffusion stop method for forming silicon oxide during the fabrication of IC devices

Abstract: High quality silicon oxide is grown for integrated circuits by oxidizing poly-crystalline silicon under an oxygen gas flow. A diffusion stop layer of thermal silicon nitride is formed on the underlying substrate prior to the deposition of the poly layer to be oxidized. The nitride layer isolates the substrate from diffused oxygen within the poly layer during oxidation, permitting a non-critical, oxidation time. Extension of the oxidation period elimates extended imperfect or "loose" chemical bonds throughout the oxide layer formed. Corner stress common in trench applications is minimized because the nitride prevents oxidation in the substrate. The oxidation of undoped poly over doped poly proceeds conformally because the nitride layer therebetween inhibits the enhanced oxidation effect of impurities in the doped poly.

Manufacture of semiconductor device

Abstract: PURPOSE:To realize a resistor of a desired high resistance value without affecting transistor characteristics by a method wherein an oxide film formed on an impurity layer is locally removed for the formation of an opening and the semiconductor substrate is subjected to thermal oxidation for the formation of an oxidized impurity layer on top of the impurity layer just under the opening. CONSTITUTION:On a semiconductor substrate 1 of one conductivity type, an insulating film 3 equipped with a first opening is formed. Through the first opening, an impurity opposite to the substrate 1 in conductivity is diffused into the semiconductor substrate 1 for the formation of an impurity layer 5. Next, an oxide film formed on the impurity layer 5 is locally removed for the formation of a second opening 6, which is followed by a process wherein the semiconductor substrate 1 is subjected to thermal oxidation for the formation of a oxidized impurity layer 3 on top of the impurity layer 5 just under the second opening 6. For example, a lowresistance P-type impurity layer 5 is formed on an N-type silicon substrate 1 and a second opening 6 is provided in an silicon oxide film on top of a region to develop into a high-resistance layer. After this, wet thermal oxidation is accomplished for the conversion of the low-resistance layer upper portion into a silicon oxide layer 3. Such a low-resistance layer is thin enough to allow the formation of a high-resistance layer 5.

Method of fabricating recessed gate static induction transistors

Abstract: A low resistivity N-type layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. Parallel grooves are etched through the low resistivity N-type layer into the high resistivity N-type layer forming interposed ridges of silicon. When fabricating junction gate devices, P-type zones are formed at the end walls of the grooves by ion implantation. A layer of silicon oxide is formed on the side walls of the grooves exposing the silicon at the end walls of the grooves and at the surfaces of the ridges. A layer of a silicide-forming metal, specifically cobalt, is deposited. A rapid thermal annealing treatment is performed which causes the cobalt to react with the silicon and form cobalt silicide at the cobalt-silicon interfaces. The cobalt does not react with the silicon oxide at the side walls of the grooves. The unreacted cobalt is removed by an etching solution which does not attack the cobalt silicide. Metal layers are placed on the cobalt silicide to increase its conductivity as contact members.

High toughness silicon nitride cutting tools

Abstract: A silicon nitride cutting tool primarily for cutting cast iron comprises a granular phase consisting essentially of silicon nitride and an intergranular amorphous phase consisting essentially of magnesium oxide, yttrium oxide and silicon oxide wherein the components are present in specified amounts and ratios.

Formation of multilayer interconnection

Abstract: PURPOSE:To eliminate a junction breakdown caused by mutual diffusion of silicon of a silicon substrate and metal of a wiring in a multilayer interconnection and make the etching of the first layer wiring stable and easy by composing the first layer wiring of the three-layer composition of a polycrystalline silicon layer, an aluminum layer and a silicon nitride layer from the bottom to the top CONSTITUTION:A silicon oxide film 3 is formed on the surface of a silicon substrate 1 which has a P-N junction 2 and an aperture 4 is selectively provided in the film 3 A polycrystalline silicon layer 5 is formed over the silicon oxide film 3 including the surface of the silicon substrate 1 exposed in the aperture 4 by a chemical vapor deposition method An aluminum layer 6 is formed on the layer 5 by sputtering Further, titanium is sputtered over the layer 6 in a nitrogen atmosphere The predetermined pattern of the first layer wiring is formed on the titanium nitride layer 7 with a photoresist film 8 by a photoetching technology After the titanium nitride film 7 is etched by a reactive ion etching method by utilizing the resist film 8 as a mask, the aluminum layer 6, the polycrystalline silicon layer 5 and the silicon oxide film 3 are etched with the respective etching speeds which are largely different from each other The photoresist film 8 is removed and the first layer aluminum wiring is formed

Manufacture of thin film transistor

Abstract: PURPOSE:To perform stable operation characterized by high mobility, by using a silicon film made by thermal CVD of high-order silane such as trisilane or higher as a channel semiconductor film of a thin film transistor. CONSTITUTION:On an insulating substrate 1, a gate 2 comprising Ni, W, Mo and the like is formed by evaporation, sputtering and the like. A gate insulating film 3 such as a silicon oxide film and silicon nitride film is laminated by a CVD method and the like on the gate 2. A silicon film 4 of high-order silane such as trisilane or higher is formed by a thermal CVD method on the film 3. A source 5 and a drain 6, which have doublelayer structure of a P-or N-type low resistance semiconductor film and a metal film, are formed. An inverted staggered type thin film transistor is formed. The silicon film 4 is formed as follows: the substrate is heated to a temperature of about 400 deg.C; the high order silane such as the trisilane or higher is introduced in a chamber 7; and the film 4 is formed on the surface of the substrate by thermal decomposition reaction on the substrate.

Silicon nitride sintered body and process for preparation thereof

Abstract: Disclosed is a silicon nitride sintered body comprising 70 to 99 mole % of silicon nitride, 0.1 to 5 moles % of a rare earth element oxide and up to 25 moles % of silicon oxide and having a silicon oxide-to-rare earth element oxide molar ratio of from 2 to 25, wherein silicon nitride crystal grains have a fine acicular structure having an average particle major axis of up to 7 μm and an average aspect ratio of at least 3.

Synthetic, crystalline, porous material containing silicon oxide, titanium oxide and aluminum oxide

Abstract: A crystalline, porous, synthetic material is disclosed, together with its related preparation process. Such a material of zeolitic character, containing silicon, titanium and aluminum oxides, corresponds, in its calcined and anhydrous state, to the following empirical formula: p HAlO.sub.2.q TiO.sub.2.SiO.sub.2 wherein p has a value greater than zero and lower than or equal to 0.050, q has a value greater than zero and lower than or equal to 0.025, and the H + of HAlO 2 can be at least partly replaceable or replaced by cations.

Formation of thin silicon oxide films by rapid thermal heating

Abstract: Rapid thermal heating of silicon samples in a dry O2 ambient has been used to form thin SiO2 films. Compared to conventional furnace oxidation, an increased growth rate was observed which is linearly dependent on the square root of time. Activation energies of 1.99 and 2.26 eV for 〈111〉 and 〈100〉 orientation, respectively, have been determined in the range 1000–1200 °C.

Production of thin metallic film

Abstract: PURPOSE:To form a smooth thin metallic film by removing an air oxidized film on the surface of a metal or a semiconductor in a through hole in an insulator and by selectively depositing Al from an org. compound of Al so as to flatten the insulator. CONSTITUTION:An insulating silicon oxide film 2 is formed on the surface of an Si substrate 1 by oxidation under heating or other method. A resist pattern is formed on the film 2 and the film 2 is etched to pierce a through hole 3. After an air oxidized film 4 on the substrate 1 in the hole 3 is removed by slight etching with a dil. aqueous soln. of hydrofluoric acid or the like, the substrate 1 is heated together with a gas contg. an org. compound of Al such as triisobutyl aluminum to selectively deposit Al 5 only on the surface of the substrate 1. A smooth Al film 6 is then formed on the flattened silicon oxide film 2 by sputtering. Thus, a semiconductor device having high performance can be obtd.

Manufacture of semiconductor thin film crystal layer

Abstract: PURPOSE:To obtain a silicon single crystal layer having the excellent crystallizability and smoothness on an insulating film by a method wherein a metal film is provided on the silicon (SOI) film located on an interlayer insulating film, and the generation of superheating is prevented by increasing the heat conduction of the SOI part when a beam annealing is performed. CONSTITUTION:A silicon oxide film 12, which is an interlayer insulating film, is formed on a single crystal silicon substrate 11. Then, the silicon oxide film 12 is exposed to a CF4 gas atmosphere for five minutes, an ordinary resist patterning is performed, and then a selective etching is performed on the silicon oxide film 12 using the mixed solution of antimony fluoride and hydrofluoric acid. As a result, an aperture 13 having a gentle-sloped stepping is formed on the oxide film 12. Then, a polycrystalline silicon film 14 is deposited, a silicon nitride film 15 (a protective insulating film) is coated thereon, and a tungsten film (a metal film) 16 is coated on the silicon nitride film 15 in the device, wherein Ar is flowed in, after the device is evacuated to a high degree of vacuum state by performing a sputtering method. Then, an electron beam 17 is scanned, a silicon epitaxial growing method is performed, and a silicon single crystal layer 14' is formed.

Process of fabricating silicon oxide and gettering films on polycrystalline silicon resistance element

Abstract: Multi-layer film including a silicon oxide film formed by the CVD method and a film having a gettering function is used as a layer insulation film in a semiconductor device having a resistance constituted by polycrystalline silicon, so that an impurity is not introduced into a resistance element formed in the (intrinsic) polycrystalline silicon, which is thereby stabilized, resulting in an improved characteristic of the semiconductor device. A third layer, of Spin on Glass, can be formed on the film having a gettering function so as to improve the flatness of the layer insulation film.

Manufacture of semiconductor device

Abstract: PURPOSE:To level the surface of a first polycrystalline silicon layer and to improve the reliability of a wiring structure formed in an upper layer, by providing a process of forming the first polycrystalline silicon layer which can be buried in a recess and doping an impurity into this layer, a process of forming a second polycrystalline silicon layer thereon, and a process of etching back these layers under a specific condition. CONSTITUTION:Recesses 2 are formed in the surface of a P-type silicon substrate 1, a silicon oxide film 3 is formed on the surface of the silicon substrate 1 including the inside of each recess, and a first polycrystalline silicon layer 4 is formed by deposition. Thereafter phosphorus is diffused (doped) into the first polycrystalline silicon layer 4, and a second polycrystalline silicon layer 5 is deposited on the first polycrystalline silicon layer 4. Then, the etch back of the first and second polycrystalline silicon layers 4 and 5 is started. By adopting an etching condition that the etching speed of the polycrystalline silicon doped with an impurity is larger than the intrinsic etching speed of polycrystalline silicon, the etching of the flat portion of the first polycrystalline silicon layer 4 proceeds more thereafter than the etching of the first polycrystalline silicon layer 5 on the recess 6.

Semiconductor isolation using trenches and oxidation of anodized silicon sublayer

Abstract: A method of fabricating an island of isolated semi­ conductor material is disclosed. An epitaxial layer (34) of heavily doped N⁻ material is uniformly grown on an N type silicon substrate (10), of thickness between about 0·5 and 5·0 microns. A lightly doped N⁻ epitaxial layer (14) is grown atop the first layer (34). Trenches (24, 26) are etched through the N⁻ epitaxial layer (14) into contact with the heavily doped N⁺ sublayer (34), or to the underlying substrate, depending upon the thickness of the first layer. The structure is anodized by bringing an anodizing solution (30) into contact with the heavily doped layer within the trenches, to convert the heavily doped N⁺ sublayer (34) into porous silicon. The porous silicon sublayer (34) is then oxidized and converted into an insulating silicon oxide sublayer. An N⁻ epitaxial is­ land (28) is thereby formed, insulated vertically from the sub­ strate (10) and laterally from other islands by the insulating sublayer (34).

Time effective method for preparing ferrierite

Abstract: This invention concerns a time-effective method of manufacture for a sodium ferrierite precursor of a hydrogen ferrierite catalytic composition of matter by crystallizing an aqueous admixture of sodium hydroxide, an aluminum compound, a silicon compound and a nitrogen-containing compound, which mixture possesses 1.60 to 3.40 moles of sodium oxide and 0.70 to 1.60 moles of aluminum oxide per 25 moles of silicon oxide. The ultimate use of the resultant catalyst is for excising wax from a lubricating oil (preferably a light lubricating oil) with or without the presence of metals of Group VIII and Group VIB on the catalyst.

Photoenhanced Deposition of Silicon Oxide Thin Films Using an Internal Nitrogen Discharge Lamp

Abstract: This paper describes the optical and electrical properties of silicon oxide thin films produced using a novel photoenhanced deposition technique. Since there is no damage to the growing film surface from energetic ions, this process has the potential to produce better semiconductor/insulator interfaces than those grown using conventional RF glow discharge techniques. The deposition system is comprised of a windowless nitrogen discharge lamp contained within the reaction vessel. This unified approach allows the low wavelength UV light from the lamp to couple directly into the reaction gases without attenuation by a window material or the need for mercury sensitisation. Thin films of silicon oxide have been deposited onto single crystal silicon wafer substrates from a nitrous oxide/monosilane reaction gas mixture. The deposition rate and physical properties of films produced in this way are comparable to those of high quality insulator films deposited by plasma enhanced CVD techniques. The results of electrical tests indicate that this material could be used as a low temperature deposited insulator for thin film devices.

Method of fabricating silicon-on-insulator like devices

Abstract: A process for forming MOS transistors in which the source and drain regions essentially interface only the channel portion of the silicon substrate to keep parasitic capacitances low. To this end, a monocrystalline silicon substrate has one major planar surface covered with a layer of silicon oxide and a hole formed in the oxide layer of a size suited for the channel of the transistor. Then silicon is epitaxially grown vertically to fill the hole. The grown silicon is then covered. Next, portions of the oxide layer are removed to expose a pair of opposed vertical sidewalls of the vertically grown silicon and silicon is epitaxially grown laterally out of said exposed sidewalls. Such laterally grown regions serve as the source and drain of the transistor and an upper portion of the vertically grown silicon serves as the channel. A gate oxide is grown over a top portion of the vertically grown silicon and a polysilicon gate region is formed over the gate oxide. The gate region then serves as a mask which allows the laterally grown drain and source regions to be doped and to be self-aligned to the gate region.

Thin film transistor

Abstract: PURPOSE:To enhance mobility of a thin film transistor to improve the transistor characteristics and reliability of the transistor by a method wherein the surface roughness of the interface between a gate insulating film and a channel region is lessened. CONSTITUTION:A metal gate electrode 12 is formed on a glass substrate 11 and an oxide metal film 13, which is chemically formed by an anodic oxidation, is formed on the surface of the electrode 12. Moreover, a gate insulating film 14 is formed on the film 13 and a channel region 15 consisting of a polycrystalline silicon film is formed on the film 14 over the electrode 12. Source and drain regions 17 and 18 are respectively formed on both sides of the region 15. The film 14 consists of a laminated material formed by laminating a silicon nitride film 21 and a silicon oxide film 22.