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Showing papers on "Silicon oxide published in 1987"


Patent
24 Mar 1987
TL;DR: In this paper, a process of growing conformal and etch resistant silicon dioxide on a surface by forming a conformal layer of polysilicon and subjecting it to thermal oxidation is described.
Abstract: Disclosed is a process of growing a conformal and etch-resistant silicon dioxide on a surface by forming a conformal layer of polysilicon and subjecting the polysilicon to thermal oxidation to completely convert the polysilicon into (poly) silicon oxide. Disclosed also is a method of forming an isolation trench in a semiconductor substrate having a high integrity oxide sidewall. After forming the trench in the substrate surface using a suitable etch mask and RIE, a single (thermal) oxide or dual (thermal) oxide and (CVD) nitride liner is formed on all trench surfaces. A conformal layer of undoped polysilicon is then formed (by. e.g. LPCVD) on the liner. By subjecting to thermal oxidation, the polysilicon is completely converted into a conformal (poly) silicon oxide layer having a thickness about 2.5 times that of the polysilicon layer. The resulting (poly) silicon oxide has the conformality of CVD oxide and the high etch resistance of thermally grown oxide. Alternatively, prior to forming the (poly) silicon oxide, the polysilicon layer is removed from the trench floor and the substrate surface in order to limit volume expansion of the polysilicon to a single direction perpendicular to the trench walls. The trench is filled with oxide, epitaxial silicon, polysilicon, polymers or metal, as desired. For achieving substrate contract through the trench, the trench bottom is opened up by RIE. Polysilicon is deposited with in-situ doping at a high temperature to fill the trench and simultaneously diffuse the dopant from the polysilicon fill into the underlying substrate to form a channel stop.

167 citations


Journal ArticleDOI
TL;DR: Park et al. as mentioned in this paper investigated the titanium disilicide formation on heavily doped silicon substrates with sheet resistance measurements, elemental depth profiling, and transmission electron microscopy, and concluded that dopant and knock-on oxygen atoms in solid solution in both the silicide and the silicon retard TiSi2 growth.
Abstract: Titanium disilicide formation on heavily doped silicon substrates was investigated with sheet resistance measurements, elemental depth profiling, and transmission electron microscopy. As found in a previous study [H.K. Park, J. Sachitano, M. McPherson, T. Yamaguchi, and G. Lehman, J. Vac. Sci. Technol. A 2, 264 (1984)], the TiSi2 growth rate depended on the dopant concentration. The growth rate was highest on undoped substrates, intermediate on heavily phosphorus‐doped substrates, and lowest on heavily arsenic‐doped substrates. However, the critical dopant concentration effect reported by Park et al. was not observed. The uniformity of the titanium‐silicon reaction was not seriously affected by heavy substrate doping. For heavily arsenic‐doped substrates (3.0×1021 As/cm3), TiAs precipitates formed at C49 TiSi2 grain boundaries, and the C49‐to‐C54 transformation temperature increased to 850 °C. For heavily phosphorus‐doped substrates (1.0×1021 P/cm3), no phosphides were unambiguously detected, and the C49‐to‐C54 transformation temperature remained below 800 °C. Discrete blocking layers at the silicide‐silicon interface, such as the native silicon oxide or a dopant‐rich phase, did not cause the reduction in silicide growth. Thus, it is concluded that dopant and knock‐on oxygen atoms in solid solution in both the silicide and the silicon retard TiSi2 growth.

122 citations


Journal ArticleDOI
TL;DR: In this paper, a theoretical expression describing the influence of extrinsic and intrinsic point defect concentration and the strain energy on the critical radius of precipitates is derived, and an exponential distribution of the precipitate radii leads to analytical expressions for the content of precipitating species present under the form of sub− and supercritical precipitate nuclei.
Abstract: A theoretical expression is derived describing the influence of the extrinsic and intrinsic point‐defect concentration and of the strain energy on the critical radius of precipitates. It is shown that an exponential distribution of the precipitate radii leads to analytical expressions for the content of precipitating species present under the form of sub‐ and supercritical precipitate nuclei. The application of the obtained theoretical results is illustrated by a few case studies on silicon‐oxide precipitates in silicon. Excellent agreement between the calculated and observed subcritical oxygen content in as‐grown Czochralski silicon is obtained.

121 citations


Journal ArticleDOI
TL;DR: In this paper, the authors propose that a reactive layer of a distinct reactive oxide separates the silicon from the amorphous silica during the oxidation process, and this reactive layer is stabilized by stress generated with the underlying silicon during oxidation at the interface.
Abstract: We propose that, in the oxidation of silicon a thin layer of a distinct ‘reactive’ oxide separates the silicon from the amorphous silica. This reactive layer is stabilized by stress generated with the underlying silicon during oxidation at the interface. Our hypothesis resolves some apparent anomalies in recent oxidation studies using oxygen isotopes, and integrates observations of microcrystallinity early in an oxidation process, and pulsed-laser atom probe analyses of intermediate layers at later stages in the oxide growth, into a consistent picture of the mechanism of the early stages of thermal oxidation.

75 citations


Patent
18 Sep 1987
TL;DR: A thin-film EL device of which the surface is coated with a protective film of a two-layer structure consisting of an insulating film (10) and a metallic film (20) in order to obtain good airtightness and high reliability is described in this article.
Abstract: A thin-film EL device of which the surface is coated with a protective film of a two-layer structure consisting of an insulating film (10) and a metallic film (20) in order to obtain good air-tightness and high reliability. The insulating film (10) consists of any one of a silicon oxide film, a silicon nitride film, an aluminum oxide film or a tantalum oxide film, and the metallic film consists of a thin film of either aluminum or tantalum.

59 citations


Patent
14 May 1987
TL;DR: In this paper, the scanning velocity at a beam spot diameter X 5,000/sec or above when an amorphous semiconductor thin film is irradiated with laser beams such as Cw Ar laser beams by scanning.
Abstract: PURPOSE:To contrive the lowering of a process temperature by determining a scanning velocity at a beam spot diameter X 5,000/sec or above when an amorphous semiconductor thin film is irradiated with laser beams such as Cw Ar laser beams by scanning. CONSTITUTION:On a substrate 4 made of soda-lime glass, a silicon oxide film 3 is deposited to 2,000Angstrom at 350 deg.C of substrate temperature by plasma CVD technique using SiH4 and N2O as material gases. Subsequently, an amorphous silicon film 2 is deposited to 3,000Angstrom at the same substrate temperature 350 deg.C by using SiH4 as a material gas. Next,this amorphous silicon film is irradiated with CW Ar laser beams 1 by scanning. The diameter of a beam spot is 100mum and the scanning velocity 1.2m/sec (beam spot diameter X 12,000/sec) and laser power 9W. The diameter of a crystal grain of the obtained polysilicon film 5 is 0.2-3.0mum and the amorphous silicon film which is dark red and almost opaque at that time becomes to show a light yellow color and an almost transparent state by the scanning irradiation with the laser beams.

56 citations


Journal ArticleDOI
TL;DR: In this paper, the authors showed that surface carbon quantitatively accounted for surface deactivation, as evidenced by the inverse correlation of the number of surface sites active towards CO adsorption with the surface carbon concentration and by the demonstration that, at the oscillation temperatures, carbon can diffuse from the bulk to the surface, oxygen can remove surface carbon and adsorbed CO can block carbon diffusion.

53 citations


Patent
Ki W. Lee1, Il-Hyun Choi1
23 Dec 1987
TL;DR: A mass airflow sensor is fabricated on a semiconductor substrate and which includes a dielectric diaphragm, p-etch-stopped silicon rim, thin-film heating and temperature sensing elements, and tapered chip edges.
Abstract: A mass airflow sensor is fabricated on a semiconductor substrate and which includes (1) a dielectric diaphragm, (2) p-etch-stopped silicon rim, (3) thin-film heating and temperature sensing elements, and (4) tapered chip edges. The dielectric diaphragm is formed with thin silicon oxide and silicon nitride in a sandwich structure and provides excellent thermal insulation for the sensing and heating elements of the sensor. The diaphragm dimensions, including thickness, are accurately controlled through the use of the heavily-p-doped silicon rim to help ensure uniform and reproducible sensor performance.

48 citations


Journal ArticleDOI
TL;DR: In this article, the behavior of Fe impurities at the SiO2−Si interface of metal-oxide-semiconductor (MOS) capacitors was studied with electrical measurements and transmission electron microscopy.
Abstract: The behaviors of Fe impurities at the SiO2‐Si interface of metal‐oxide‐semiconductor (MOS) capacitors was studied with electrical measurements and transmission electron microscopy. The MOS capacitors were fabricated on silicon wafers which had been intentionally contaminated by Fe+ ion implantation. It is confirmed that Fe impurities either scattered uniformly, or nucleated at the interface of SiO2‐Si. Uniformly scattered Fe impurities lower the barrier height of the SiO2‐Si interface. The nucleated Fe precipitates are in a metallic α‐FeSi2 phase, penetrating both the silicon oxide and the silicon substrate. They degrade the MOS capacitors not only by reducing the barrier height of the SiO2‐Si interface, but also by inducing weak spots in the silicon oxide where the electric field is strengthened and local tunneling currents are enhanced.

46 citations


Journal ArticleDOI
TL;DR: The thermomechanical properties of glow-dischargedeposited silicon and silicon oxide films were measured between room temperature and 100°C as a function of composition and substrate temperature during deposition as discussed by the authors.
Abstract: The thermomechanical properties of glow‐discharge‐deposited silicon and silicon oxide films were measured between room temperature and 100 °C as a function of composition and substrate temperature during deposition A cantilevered beam measurement technique, allowing the simultaneous measurement of the linear thermal expansion coefficient of thin films and their mechanical compliance, was used and verified Hydrogenated amorphous silicon films, deposited at 250 °C with a density of 20 g/cm3 and 20 at % of hydrogen, exhibit a linear thermal expansion coefficient of about 44×10−6/°C and a biaxial elastic modulus of 150 GPa The expansion coefficient of silicon oxide films deposited at 250 °C shows a systematic dependence on the fabrication conditions and ranges from about 10−5/°C to negative values Strong correlations between the hydrogen concentration of the films, the film density, and thermal expansion coefficient were observed and are discussed The biaxial elastic modulus of the oxide films is not

44 citations


Journal ArticleDOI
TL;DR: In this article, a method for low-temperature in situ cleaning of the Si 100 surfaces utilizing a sub-monolayer coverage of germanium atoms was examined, and the results were used to investigate the mechanisms by which adsorbed Ge atoms can be used to produce oxide free Si100 surfaces at 625°C.
Abstract: Silicon surface optimization prior to film growth is central to the fields of chemical vapor deposition and molecular beam epitaxy. We have examined a method for low‐temperature in situ cleaning of the Si (100) surfaces utilizing a submonolayer coverage of germanium. Synchrotron excited x‐ray photoemission data indicate that Ge atoms arriving at a Si (100) surface can break silicon–oxygen bonds, thereby producing new chemical species which sublimate at 625 °C. In the absence of Ge, the observed silicon oxide species were stable at temperatures well in excess of 750 °C. These results are used to investigate the mechanisms by which adsorbed Ge can be used to produce oxide‐free Si (100) surfaces at 625 °C.

Journal ArticleDOI
TL;DR: In this article, high-resolution transmission electron microscopy (HRTEM) and ellipsometry techniques have been employed to measure thicknesses of silicon oxide, grown at 800°C in dry oxygen, in the thickness range of 2-20 nm.
Abstract: High-resolution transmission electron microscopy (HRTEM) and ellipsometry techniques have been employed to measure thicknesses of silicon oxide, grown at 800°C in dry oxygen, in the thickness range of 2–20 nm. While the oxide growth data measured from TEM obey a nearly linear behavior, those obtained from ellipsometry are seen to vary nonlinearly. The interface structure as function of the increasing oxide thickness was studied using HRTEM. At these oxidation temperatures, the earlier reported variations of roughness at the interface on the oxide thickness for oxides grown at 900°C are not seen. Attempts aimed at correlating the high-resolution transmission electron micrographs with some physical parameters like the refractive index and the dielectric breakdown lead to considerations of the importance of the effect of protrusions of silicon atoms of 1 mm size into SiO2 layers on the interface properties. These findings lead to explanations of some key features concerning the refractive index and density of thin SiO2.

Patent
Robert J. Mattox1, Steven Fong1
17 Nov 1987
TL;DR: In this article, a structure and method for forming an isolation wall in an etched trench are described, where the trench walls are covered by a thin silicon oxide layer and the trench conformally filled with an oxy-nitride mixture having a particular range of composition.
Abstract: A structure and method for forming an isolation wall in an etched trench are described. The trench walls are covered by a thin silicon oxide layer and the trench conformally filled with an oxy-nitride mixture having a particular range of composition so as to produce a neutral to slight tensile stress in the oxy-nitride relative to silicon. The structure is very simple to fabricate and creates fewer defects in the silicon substrate than prior art techniques. Buried voids in the filled trench are eliminated.

Patent
31 Jan 1987
TL;DR: In this paper, an aperture was formed by anisotropic etching of Freon system using RIE method, and a gate electrode was created by selective and successive etching using the same method.
Abstract: PURPOSE:To prevent the plasma damage and the contamination of an operating layer surface, by laminating an insulating film on the operating layer formed on a semiinsulating semiconductor substrate, via an aluminum dielectric layer or a high resistance aluminum mixed crystal layer, and forming an aperture by anisotropically etching the insulating film, using the aluminum thin film as an etching stopper CONSTITUTION:By selectively ion-implanting N-type impurity like silicon an N-type operating layer 2 and an N type diffusion layers 3, 4 are formed Thereon an aluminum nitride film 5 is deposited, and further a silicon oxide film 6 is deposited by CVD method or the like A photo resist film 7 is arranged on the silicon oxide film 6, and an aperture 8 is formed by anisotropic etching of Freon system RIE method The photo resist film 7 is eliminated, the aluminum nitride film 6 as a mask is etched and eliminated by using phosphoric acid, and high melting point metal silicide is stuck on the surface containing the aperture 8 Then low melting point metal is deposited in order, and laminated, and a gate electrode 9 is formed by selective and successive etching using RIE method An aperture for contact of the N type diffusion layer 3, 4 is formed by successively etching and eliminating the silicon oxide film 6 and the aluminum nitride film 5 Finally, an interlayer insulating film 12 of silicon oxide film is deposited on the surface containing the gate electrode 9, and apertures for contact of a source electrode 10 and a drain electrode 11 are formed

Patent
09 Dec 1987
TL;DR: In this article, a silicon oxide layer is provided on the surface of a semiconductor substrate and light is applied to the silicon oxide layers while removing it by etching, and an intensity detection signal is extracted.
Abstract: A silicon oxide layer is provided on the surface of a semiconductor substrate. Light is applied to the silicon oxide layer while the silicon oxide layer is removed by etching. Intensity of reflected light is detected to obtain an intensity detection signal. The time that would be required for a decrease in thickness of the silicon oxide layer through etching by half of the wavelength of the light is previously obtained to define a reference time period. Within the intensity detection signal, a component periodically changed with a cycle time period equal to the reference time period is extracted. On the basis of the time change of the value of the component, a termination time of silicon oxide layer removal processing is detected.

Patent
25 Jul 1987
TL;DR: In this paper, the mesa etching operation was used to prevent a thin part and a chipped-off part in a protective film from being produced and to prevent stray capacitance from being increased even when an upper-part electrode is plated with gold by a method wherein, after an undercut has been formed under a mask of a silicon nitride film and an exposed part of the silicon layer has been thermally oxidized, the mask is removed and the upper part electrode is formed on the exposed surface of the Silicon layer.
Abstract: PURPOSE:To prevent a thin part and a chipped-off part in a protective film from being produced and to prevent stray capacitance from being increased even when an upper-part electrode is plated with gold by a method wherein, after an undercut has been formed under a mask of a silicon nitride film and an exposed part of the silicon layer has been thermally oxidized, the mask is removed and the upper-part electrode is formed on the exposed surface of the silicon layer. CONSTITUTION:When a semiconductor device whose chip is mesa-shaped is to be manufactured, a P-N junction 4 is formed on a semiconductor substrate 1; a mask composed of a silicon nitride film 81 and a silicon oxide film 82 on its upper part is formed on the surface; a mesa etching operation is executed; a mesa structure is formed. Then, a high-concentration doped layer 3 of the mesa structure of the semiconductor substrate 1 is etched selectively; an undercut is formed under the mask of the silicon nitride film 81. Then, an exposed part of the silicon layer of the semiconductor substrate 1 is thermally oxidized selectively; a silicon oxide film 5 is formed. Then, the silicon nitride film 81 of the semiconductor substrate 1 is etched selectively and is removed; a first electrode 6 is formed on the exposed surface of the silicon layer and a second electrode 7 is formed on the rear of the semiconductor substrate 1.

Journal ArticleDOI
TL;DR: In this paper, the effects of oxygen mixing into argon sputtering gas on the properties of silicon oxide films are presented, showing that the film properties of sputterdeposited films can be considerably improved to the same level as those of thermal oxide film.
Abstract: The effects of oxygen mixing into argon sputtering gas on the properties of silicon oxide films are presented. The silicon oxide films were deposited from an target at low temperature (200°C). The oxygen mixing confirms that the film properties of sputter‐deposited films can be considerably improved to the same level as those of thermal oxide film. Moreover, the oxygen mixing improves the electrical characteristics of sputter‐deposited films resulting in a high resistivity of >1015 Ω cm and a high breakdown field of >7.5 MV/cm. In addition, measurements of MOS capacitors featuring sputter‐deposited films as gate oxide films indicate that an excellent surface‐state density can be achieved. Oxygen‐argon sputter deposition is thus proved very useful for low temperature silicon dioxide film formation in MOSFET fabrication.

Patent
23 Oct 1987
TL;DR: In this paper, an interlayer insulating film made of silicon oxide is formed on lower wirings at the position on the lower wirs to flatten the surface in case of manufacturing the device having a multilayer interconnection structure.
Abstract: PURPOSE:To prevent upper interconnections of a semiconductor device from being disconnected by surface-etching an interlayer insulating film formed on lower wirings at the position on the lower wirings to flatten the surface in case of manufacturing the device having a multilayer interconnection structure to improve the step coverage of the upper wirings. CONSTITUTION:An interlayer insulating film 3 made of silicon oxide is formed on first aluminum wirings 2 of lower wirings of predetermined pattern formed on a substrate 1, and a negative type photoresist film 4 is formed on the entire surface. Then, a photomask formed with the pattern of the interconnections 2 is reused to expose and develop to open a window 4a, with it as a mask it is etched to reduce the film 3 exposed in the window 4a substantially equal to the thickness of the wirings 2 and the film 4 is removed. Then, the surface of the film 3 is substantially flattened. After a photoresist film 5 is again formed on the entire surface, a window 5a is opened with the photomask, with it as a mask the film 3 is etched to open a through-hole 6 on the wirings 2. When the film 5 is removed and second aluminum interconnections 7 are formed as upper interconnections in a desired pattern, they are connected via the hole with the interconnections 2 to form a 2-layer interconnection structure.

Patent
28 Apr 1987
TL;DR: In this paper, a method of forming an isolated semiconductor, preferably of the vertical bipolar variety, is described, where a porous highly doped semiconductor layer is oxidized and, with a trench containing silicon oxide therein, forms a region encasing a moderately doped epitaxial layer disposed beneath a lightly doped ionic layer.
Abstract: The disclosure relates to a method of forming an isolated semiconductor, preferably of the vertical bipolar variety, wherein a porous highly doped semiconductor layer is oxidized and, with a trench containing silicon oxide therein, forms a region encasing a moderately doped epitaxial layer disposed beneath a lightly doped epitaxial layer. The vertical bipolar device is formed in the moderately doped and lightly doped layers with the highly doped epitaxially deposited layer, which is now a silicon oxide layer, forming a portion of the isolation. The anodization of the highly doped layer takes place using an anodizing acid at a temperature of from about 0 to about 10 degrees C.

Patent
27 Oct 1987
TL;DR: In this article, a method for the manufacture of silicon layers containing boron and phosphorus dopants was proposed, where the silicon wafers are positioned in a reaction chamber into which there is introduced, from separate sources, tetraethylorthosilicate as a source of silicon dioxide, trimethylborate as source of borons, and a phosphorus source.
Abstract: A method for the manufacture of silicon layers containing boron and phosphorus dopants wherein the silicon wafers are positioned in a reaction chamber into which there is introduced, from separate sources, (a) tetraethylorthosilicate as a source of silicon dioxide, (b) trimethylborate as a source of boron, and (c) a phosphorus source. The three reactants are decomposed in the reaction chamber to deposit silicon dioxide doped with boron and phosphorus onto the wafers, the decomposition being carried out at a temperature of at least 600° C. and at a substantially subatmospheric pressure.

Patent
25 Sep 1987
TL;DR: In this article, a process for forming deep (>6µm) trenches in a silicon substrate is described, where the substrate is etched through a silicon oxide mask in a plasma having 75%-86% HCl, 9%-16% O₂, and 1%-8% BCl₃.
Abstract: A process for forming deep (>6µm) trenches in a silicon substrate. The substrate is etched through a silicon oxide mask in a plasma having 75%-86% HCl, 9%-16% O₂, and 1%-8% BCl₃. The resulting trenches have substantial­ly vertical sidewalls and rounded bottom surfaces. The plasma etch is performed at high power and low pressure, so that it achieves a high aspect ratio at a minimum etch bias.

Patent
09 Feb 1987
TL;DR: In this paper, the side wall and the bottom of a contact hole are covered with a conductive layer made of refractory metal or its silicide and the upper part of the hole is made flat by depositing polycrystalline silicon into the concave part of a surface of the contact hole.
Abstract: PURPOSE:To suppress the increase in the contact resistance value by a method wherein the side wall and the bottom of a contact hole are covered with a conductive layer made of refractory metal or its silicide and the upper part of the hole is made flat by depositing polycrystalline silicon into the concave part of the surface of the contact hole CONSTITUTION:An n-type diffused region 2 is formed on a P-type single-crystal silicon substrate 1, and an interlayer silicon oxide film 3 having a contact hole 4 on its main surface is formed A tungsten silicide film 5 is formed so that the surface of the interlayer silicon oxide film 3 as well as the side wall and the bottom of the contact hole 4 can be covered Polycrystalline silicon 7 is deposited in the concave part on the tungsten silicide film 5 of the contact hole 4 so that the upper part can be made flat Then an aluminium wire 8 is formed on the flat surface Through this constitution, there is no concern for the breaking of the aluminium wire 8, and the electrical connection of the aluminium wire 8 with the n-type diffused region 2 is achieved via the tungsten silicide film 5 of low resistance so that the resistance can be reduced

Patent
01 Jun 1987
TL;DR: In this article, a SiO2 mask is used as a mask of a silicon nitride film to reduce the step between the final silicon oxide film surface and the substrate surface.
Abstract: PURPOSE:To improve the flatness and to prevent the characteristics of a semiconductor device from deteriorating by removing a silicon oxide film once formed by a mask of a silicon nitride film to form a recess on a silicon substrate to reduce a step between the final silicon oxide film surface and the substrate surface. CONSTITUTION:An Si3N4 film 2 is formed on a silicon substrate 1, and a window is opened on a portion 5 to form an SiO2 film 3. The exposed surface is then selectively oxidized, and the film 3 is grown. An SiO2 film 4 is so grown as to bury a recess 6 by selective oxidation with the film 2 as a mask. Thereafter, the film 2 used as the mask is removed. The SiO2 film formed as above is removed, and element separating deep SiO2 film 4 having less step with the substrate 1 surface can be formed by selectively oxidizing again and the characteristics of a semiconductor element are not damaged.

Patent
05 Oct 1987
TL;DR: In this paper, a three region dielectric film on silicon and a semiconductor device employing such a film is described, which can be fabricated in substantially less time and/or at lower temperatures than prior art methods.
Abstract: A process of forming a three region dielectric film on silicon and a semiconductor device employing such a film are disclosed. Silicon is oxidized in an oxygen-containing ambient. The oxidation step forms a first region of silicon oxide. Once oxidation has begun, reactive sputtering of aluminum in an oxygen plasma is initiated. This forms a second region of said dielectric film which comprises a mixture of silicon and aluminum oxides. A third region comprising substantially aluminum oxide is formed by the continuing reactive sputtering step. A semiconductor device comprising said three region dielectric film interposed between an electrode and a semiconductor body has little or no shift in threshold voltage providing good stability and can be fabricated in substantially less time and/or at lower temperatures than prior art methods.

Journal ArticleDOI
TL;DR: In this paper, the breakdown time of thin thermally grown oxide films was investigated and the defect density of the initial short mode increases, while that of the weak-spot mode decreases.
Abstract: To evaluate the reliability of thin thermally grown oxide films, we examined their intrinsic breakdown characteristics and investigated oxide defects in them using ultra-thin oxides (3-10 nm). It is demonstrated that the breakdown time of oxide films becomes longer as the film thickness is decreased. Through the use of an electron trap generation model, we were able to explain this phenomenon and estimate the breakdown time under low electric field or low current conditions. Furthermore, we were able to determine that, with decreasing film thickness, the defect density of the initial short mode increases, while that of the weak-spot mode decreases.

Patent
06 Apr 1987
TL;DR: In this paper, a multilayer structure consisting of polycrystalline silicon with an overlying layer of a refractory metal silicide such as MoSi 2 or WSi 2 is proposed.
Abstract: A process for making a semiconductor integrated circuit which has electrodes, contacts and interconnects composed of a multilayer structure including a layer of polycrystalline silicon with an overlying layer of a refractory metal silicide such as MoSi 2 or WSi 2 . Adhesion of the metal silicide to the polysilicon is enhanced by forming a thin silicon oxide coating on the polysilicon before sputtering the metal silicide. The resulting structure has low resistance but retains the advantages of polysilicon on silicon.

Patent
24 Jul 1987
TL;DR: In this paper, a photo CVD method was used to form a high quality insulating film without a steep difference in level between uneven parts by a method wherein a process to form the insulating material uniformly on the surface of a substrate having the steep difference between the uneven parts and a process of etch back one part of the formed insulating surface by a plasma etching operation are executed at least more than once.
Abstract: PURPOSE:To form a high-quality insulating film without a steep difference in level between uneven parts by a method wherein a process to form the insulating film uniformly on the surface of a substrate having the steep difference in level between the uneven parts and a process to etch back one part of the formed insulating film by a plasma etching operation are executed at least more than once. CONSTITUTION:A silicon oxide film 10 is formed on an unevenly shaped substrate 1 by a photo CVD method; the unevenly shaped substrate is covered uniformly. Then, a pressure inside a reaction chamber is adjusted to 10Pa; a high-frequency electric power of 300W is impressed on a part between a mesh electrode and a substrate support substance. A ratio of SiH4 to N2O of a reaction gas is set to 0.5-0.05; other conditions are identical to those of the photo CVD method; a silicon oxide film 11 of a thickness of about 1.5mum-2.0mum is formed. Then, an organic halogenide gas is introduced into the reaction chamber; the pressure is adjusted to 10Pa; the electric power is impressed on the part between the mesh electrode and the substrate support substance; a plasma discharge is generated; the formed film 11 is etched; a steep part of the difference in level between the uneven parts is removed.

Journal ArticleDOI
TL;DR: In this paper, a model with the considerations of the ac equivalent circuit and low-frequency leakage characteristic of tantalum oxide was proposed for these observations, and theoretical examples, with their parameters being suitably given according to the measured data, were shown.
Abstract: Thermal tantalum oxide with a thickness of 620 A was studied. The dc leakage resistance and high‐frequency (1‐MHz) resistance of a metal–tantalum‐oxide–silicon capacitor were found to be on the order of 108 and 1 Ω cm2, respectively. The C‐V behavior of the capacitor, with its initial states being carefully treated, was reproduced and observed to be dependent on the return voltage and hold time (at return point) of the measurement conditions. And only negative charges were observed to be responsible for the conduction current through tantalum oxide. A model with the considerations of the ac equivalent circuit and low‐frequency leakage characteristic of tantalum oxide was proposed for these observations. Theoretical examples, with their parameters being suitably given according to the measured data, were shown, and they explained the experimental observations quite well. It is found that the measurement conditions and effect of the ac resistance of tantalum oxide on the determination of flat‐band capacitance are important and should be carefully considered when one is interpreting the interface charges from C‐V curves.

Patent
07 Jan 1987
TL;DR: In this article, a gate electrode is made on the gate insulating film and an n-layer 28 and a p-layer 30 for serving as a source and a drain, respectively, are made within the semiconductor substrate 2 on both sides of the gate electrode 22.
Abstract: PROBLEM TO BE SOLVED: To provide the manufacture of a semiconductor device, which can cope with micronization by enabling a thin oxide film to be formed on the surface of a silicon substrate by the same thermal oxidation process before ion implantation process for formation of source and drain diffused layers, and enabling an oxide film of sufficient thickness to secure reliability to be formed at the sidewall of a gate electrode, and the end of a gate. SOLUTION: A silicon oxide film 20 as a gate insulating film is made on a silicon semiconductor substrate 2, and a gate electrode 22 is made on the gate insulating film. Furthermore, element to delay the oxidation of silicon is introduced into the semiconductor substrate 2 on both sides of the gate electrode 22, and after this introduction, the thermal oxidation is performed to form a silicon oxide film 26a on the semiconductor substrate 2, and to form a silicon oxide film 26b which is thicker than the silicon oxide film 26a on the sidewall of the electrode 22, at the same time. Furthermore, an n- layer 28 and a p- layer 30 for serving as a source and a drain, respectively, are made within the semiconductor substrate 2 on both sides of the gate electrode 22.

Patent
18 Aug 1987
TL;DR: A shutter with no moving parts and intended for use at infrared wavelengths includes a thin film of vanadium dioxide deposited on an insulative layer of silicon oxide that has been grown on a thin substrate of semiconductive silicon as mentioned in this paper.
Abstract: A shutter having no moving parts and intended for use at infrared wavelengths includes a thin film of vanadium dioxide deposited on an insulative layer of silicon oxide that has been grown on a thin substrate of semiconductive silicon. The layers are in good thermal contact, but the vanadium dioxide film is electrically insulated from the silicon substrate. The vanadium dioxide film is heated by passing a heating current through the semiconductive substrate, and is cooled by radiation. The resistance of the vanadium dioxide film is sensed continuously, and is used for turning on and turning off the heating current.