Showing papers on "Silicon oxide published in 1993"

Method of manufacturing silicon oxide film containing fluorine

Abstract: Disclosed is a method of manufacturing a semiconductor device, in which a silicon oxide film containing fluorine, said film exhibiting a low dielectric constant and a low hygroscopicity and acting as an insulating film for electrically isolating wirings included in a semiconductor device, is formed by a plasma CVD method using a source gas containing at least silicon, oxygen and fluorine, under the conditions that the relationship between the gas pressure P (Torr) and the ion energy E (eV) satisfies formula A given below: P≧5×10.sup.-4,P≦10.sup.-1 ×10.sup.-E/45(A) and the relationship between the ion energy E (ev) and the plasma density D (/cm 3 ) satisfies the formula B given below: D≧2×10.sup.11 ×10.sup.-E/45, 10≦E(B)

Forming multi-layered interconnections with fluorine compound treatment permitting selective deposition of insulator

Abstract: A method of manufacturing a semiconductor device, incorporates the steps of: performing reactive ion etching using a fluorine compound gas to surface-treat the lower level wirings which permits selective deposition of the second silicon oxide film; selectively depositing a second silicon oxide film between said lower level wirings by a CVD method using an organic silicon compound gas and an oxidizable gas as source gases; depositing a third silicon oxide film on an entire surface and forming through holes connected to the lower wirings; and forming upper level wirings connected to the lower level wirings. Further, an additional silicon oxide film can be deposited on the major surface so as to form a side wall thereof on the lower level wirings. The reactive ion etching is then performed.

Topical hydrophobic composition and method

Abstract: Drag is reduced during swimming by topically applying a film of rough particles of hydrophobic metal oxide such as organo silicon modified silicon oxide particles to certain skin surfaces of the swimmer. A uniform suspension of a long acting composition is formed by a mixture of 2 hydrophobic metal oxides in vaporizable liquid carrier such as ethanol containing a vaporizable plasticizer such as propylene glycol in which the amount of the larger hydrophobic metal oxide particles in the mixture predominates over the amount of smaller particles of hydrophobic metal oxide.

Process for producing semiconductor substrate

Abstract: A process for producing a semiconductor substrate is provided which comprises providing a first substrate made of silicon having a porous silicon layer formed thereon by making porous the substrate silicon and a nonporous monocrystalline silicon layer epitaxially grown on the porous silicon layer, laminating the first substrate onto a second substrate in a state that at least one of lamination faces of the first and the second substrates has a silicon oxide layer and the nonporous monocrystalline silicon layer is interposed between the laminated substrates, and removing the porous silicon layer by etching, wherein the porous silicon layer is removed by etching with an etchant which etches the nonporous monocrystalline silicon layer and the silicon oxide layer at respective etching rates of not more than 10 angstroms per minute.

Optical properties and environmental stability of oxide coatings deposited by reactive sputtering

Abstract: Refractory metal-oxide coatings are deposited by reactive dc magnetron sputtering in an oxygen environment. The optical constants and the environmental stability of silicon oxide, aluminium oxide, hafnium oxide, zirconium oxide, tantalum oxide, titanium oxide, and a blend of hafnium oxide with silicon oxide are investigated. Properties of both single-layer and multilayer interference filters are examined.

Chemical vapor deposition method for forming SiO2

Abstract: A silicon oxide film is deposited on a substrate by chemical vapor deposition (CVD) using an organosilicon compound such as tetraethylorthosilicate (TEOS) and ozone as the principal reactants. The organosilicon compound gas and an ozone-oxygen gas which is relatively low in ozone concentration such as 0.1-1% are mixed in a gas mixer outside the CVD reaction chamber, and the resultant gas mixture is fed into the reaction chamber. Separately, another ozone-oxygen gas which is relatively high in ozone concentration such as 1-10% is introduced directly into the reaction chamber so as to come into contact with and mix with the aforementioned gas mixture in the vicinity of the substrate surface. The obtained silicon oxide film is good in film properties and step coverage, and the CVD operation does not suffer from deposition of reaction products in the gas feeding pipes and gas injecting nozzles.

Si/SiO2 interface: New structures and well-defined model systems.

Abstract: A well-defined silicon oxide/silicon interface was synthesized by the reaction of the precursor cluster H 8 Si 8 O 12 with a Si(100) surface and characterized using Si 2p core level photoemission spectroscopy. Information gained regarding the assignments of silicon oxide group shifts and peak widths is used to evaluate assumptions and assignments of photoemission spectra of silicon oxide interfaces

Process for forming thin films by plasma CVD for use in the production of semiconductor devices

Abstract: A silicon oxide film is formed by a CVD process, with the use of a silane group gas and water as a main feed gas. Further, a film including silanol is formed by the plasma CVD process with a specific plasma energy, using the silane group gas and water as the main feed gas. The specific plasma energy is selected at 40 (W·°C./cm 2 ) or below. By annealing this film including silanol, or by performing the oxygen plasma process or the ammonia plasma process, the oxide film or the nitride film is formed.

Method for the formation of a silicon oxide film

Abstract: Disclosed is a method for the formation of a thick silicon oxide film on the surface of a substrate. The method comprises forming a hydrogen silsesquioxane resin film on the surface of a substrate followed by converting the hydrogen silsesquioxane resin into silicon oxide ceramic by heating the resin film-bearing substrate in a mixed gas atmosphere of above 0 volume % up to 20 volume % oxygen and 80 volume % up to, but not including, 100 vol % inert gas until the content of silicon-bonded hydrogen in the silicon oxide product has reached ≦80% of the content of silicon-bonded hydrogen in the hydrogen silsesquioxane resin.

Low temperature deposition of silicon oxides for device fabrication

Abstract: Conformal layers of a silicon oxide, such as silicon dioxide, are deposited at temperatures below 600 degrees C. through the decomposition of compounds such as diacetoxyditertiarybutoxysilane. The required temperatures do not significantly affect temperature-sensitive structures. Therefore, it is possible to form silicon oxide regions in the processing of devices having these structures.

Silicon resonant tunneling

Abstract: A resonant tunneling diode (400) made of a silicon quantum well (406) with silicon oxide tunneling barriers (404, 408). The tunneling barriers have openings (430) of size smaller than the electron wave packet spread to insure crystal alignment through the diode without affecting the tunneling barrier height.

Increases in photovoltage of ‘‘indium tin oxide/silicon oxide/mat‐textured n‐silicon’’ junction solar cells by silicon preoxidation and annealing processes

Abstract: Indium‐tin‐oxide (ITO)/silicon oxide/mat‐textured n‐Si junction solar cells having an energy conversion efficiency of 15% are fabricated by the spray pyrolysis method. Their characteristics and the junction properties are compared with the same junction solar cells having a flat Si surface. In cases where the ITO film is deposited on a hydrofluoric acid‐etched mat‐textured Si surface, the open circuit photovoltage (Voc) is low (405 mV). Scanning electron microscopy observation shows that high‐density dislocations are formed near the Si surface, and the temperature dependence of the current‐voltage characteristics suggests that the trap‐assisted multistep tunneling through the Si depletion layer is a dominant current flow mechanism. In cases where the ITO film is deposited on a thermal silicon oxide‐covered mat‐textured Si surface, the formation of the dislocations is suppressed, and consequently Voc is increased to 485 mV. For this solar cell, a surface recombination current takes the dominant part of the dark current in the bias region below ∼250 mV, and a thermionic‐assisted tunneling current is dominant in the higher bias region. For a cell where the thermal silicon oxide‐covered mat‐textured Si surface is annealed at 800 °C under nitrogen before the deposition of the ITO film, Voc is further increased to 540 mV, and the energy conversion efficiency of 15% is achieved. In this case, the thermionic‐assisted tunneling current density is decreased by an increase in the barrier height due probably to a reduction in the density of the positive charge in the silicon oxide layer. The surface recombination current density is also reduced by the removal of interface states, leading to the improvement of the fill factor.

Method of producing semiconductor devices of a MONOS type

Abstract: A method of producing a semiconductor device of the type which includes a semiconductor substrate; a gate insulating layer of a triplex structure formed on the semiconductor substrate and composed of a first oxide layer, an oxidation-resistant layer and a second oxide layer, and a gate electrode formed on the gate insulating layer, includes the steps of: forming the first oxide layer, the oxidation-resistant layer, and the second oxide layer successively on the semiconductor substrate; adjusting the thickness of the oxidation-resistant layer during or after the formation thereof in such a way that the entire oxidation-resistant layer can be oxidized in a post-process in which the oxidation-resistant layer is oxidized except for that region which corresponds to the gate electrode; and oxidizing the oxidation-resistant layer except for the region corresponding to the gate electrode and forming an oxide layer around the gate electrode, whereby the oxidation-resistant layer is entirely oxidized except for the region corresponding to the gate electrode. The resulting silicon oxide layer can be used as an address gate or as the gate insulating layer of an MOS transistor gate for a peripheral circuit.

Anodic bonding of silicon to silicon wafers coated with aluminium, silicon oxide, polysilicon or silicon nitride

Abstract: Silicon to silicon wafer bonding by use of sputter deposited borosilicate film is a promising mounting method for micromechanical components. This method has been developed to bond 3 inch borosilicate sputter coated silicon wafers to silicon wafers coated either with aluminium, silicon dioxide, polysilicon or silicon nitride. The bondings were performed at temperatures ranging from 300 to 400 °C which enables application of this technique on metallised devices. The bond strengths of the different samples bonded with these methods are all in the region 5–25 MPa. Some samples were exposed to water for 300 h to test the media compatibility, and some samples were thermal shock tested by repeatedly exposing to liquid nitrogen. No significant difference in bond strength has yet been verified statistically for the different sample configurations. We have also observed good correlation between destructive bond strength testing and non-destructive infrared microscope inspection.

Thin-film transistor and its manufacture

Abstract: PURPOSE:To remove the problem of deterioration of step coverage by forming a thin-film semiconductor, which has a crystal semiconductor region and a not crystal semiconductor region, on a substrate, and forming a gate insulating film to cover the thin-film semiconductor, and forming a gate electrode thereon, which crosses the crystal semiconductor region. CONSTITUTION:A base film 21 of silicon oxide is formed on a substrate 20, and further an amorphous silicon film 22 is stacked. Continuously, regions 23a and 23b are formed by stacking and patterning a silicon nickel film, and then, crystallized regions 24a and 24b are formed selectively by annealing them thereby crystallizing them. Next, a silicon oxide film 25 is stacked as a gate insulating film. Successively, a silicon film is deposited and patterned to form wirings 26a and 26b. Impurity regions 27a and 27b are formed by implanting phosphorus into the silicon region, with the wiring 26b as a mask, and wirings 29a and 29b are formed of metallic materials. That is, this does not have an island- shaped semiconductor region, the step coverage does not become the least problem.

Boron Diffusion Through Pure Silicon Oxide and Oxynitride Used for Metal‐Oxide‐Semiconductor Devices

Abstract: We studied boron diffusion in thin silicon oxides including pure SiO 2 and oxynitride that are used for metal-oxide-semiconductor transistors. We measured the boron penetration using secondary ion mass spectrometry. By comparing simulated and experimental results, we found that the boron diffusivity in pure SiO 2 , D PO , is 3.96 × 10 -2 exp (-3.65eVLkT) cm 2 /s, and that in oxynitride containing 4% nitrogen, D NO , is 3.42 × 10 -2 exp (-3.75 eV.kT) cm 2 /s

Self-aligned trenched contact (satc) process

Abstract: A method of forming a self-aligned trenched contact in the fabrication of an integrated circuit is described. Semiconductor device regions are formed in and on a semiconductor substrate wherein the semiconductor device regions include gate electrodes on the surface of the semiconductor substrate and source/drain regions within the semiconductor substrate. Spacers are formed on the sidewalls of the gate electrodes. A layer of silicon oxide is deposited over the surface of the substrate wherein the silicon oxide contacts the source/drain regions within the substrate between the gate electrodes. The substrate is covered with a layer of photoresist which is patterned to provide an opening over the planned self-aligned trenched contact between the gate electrodes. The silicon oxide is etched away to provide an opening to the silicon substrate using the patterned photoresist and the sidewall spacers as a mask. A trench is etched into the silicon substrate within the opening using the photoresist and the sidewall spacers as a mask to form the self-aligned trenched contact opening. A conducting layer is deposited within the trenched opening to complete the contact in the manufacture of the integrated circuit device.

First observation of strained siloxane bonds on silicon oxide thin films

Abstract: We provide the first experimental evidence that edge-shared tetrahedra (>Si Si<) can exist on the surface of silicon oxide thin films. These sites are characterized by infrared active Si-O-Si bending modes at 888 and 908 cm -1 and by their high reactivity toward both water and triethylsilanol. They are formed by annealing at high temperature (≥1400 K) and not by the recombination of surface silanol groups. Our observations confirm recent theoretical predictions

Thin film transistor

Abstract: PURPOSE:To lower the resistance of a source and a drain, and to obtain high withstand voltage by the effect of electric field relaxation by a method wherein a source electrode and a drain electrode are composed of an impurity-doped polysilicon film. CONSTITUTION:A silicon oxide film 2 is formed on an Si substrate 1, and a source electrode 3 and a drain electrode 4 are formed by patterning an impurity- doped amorphous silicon film. Then, amorphous silicon is crystallized by heat- treating the amorphous silicon film, and an active layer polysilicon film 5 is formed. Then, after a gate oxide film 6 has been deposited, a gate electrode 7 is formed by patterning. Subsequently, an insulating film 8 and an interlayer film 9 are formed, and a source and drain junction is formed on the active layer polysilicon film 5 by conducting a heat treatment. At this time, a source and drain junction, in which impurities are diffused from the impurity-doped polysilicon film of the source electrode 3 and the drain electrode 4 to the side of the polysilicon film of the active layer, is formed.

Neutralization-reionization mass spectrometry experiments confirm the predicted existence of cyclic silicon oxide (Si2O) and silicon nitride (Si2N) cluster molecules

Abstract: Collision experiments are reported for Si 2 X + (X=O, N) generated by dissociative ionization of (SiH 2 ) 2 O and (SiH 3 ) 3 N in the gas phase. It is argued that both the ionic and the neutral Si 2 X clusters have a triangular geometry as predicted for Si 2 O by a recent, thorough ab initio MO study (Boldyrev, A. I.; Simons, J. J. Phys. Chem. 1993, 97, 5875). While the linear connectivity SiSiX cannot rigorously be ruled out, the symmetrical linear structure SiXSi is certainly not generated in the present experiment

Ultraviolet radiation absorbing coating

Abstract: An organoalkoxysilane/metal oxide sol-gel composition and method for its production are disclosed whereby an organoalkoxysilane of the general formula R.sub.x Si(OR').sub.4-x wherein R is an organic radical, R' is a low molecular weight alkyl radical, and x is less than 4 and may be zero, is partially hydrolyzed in organic solution and reacted with a titanium alkoxide of the general formula Ti(OR'') 4 wherein R'' is a lower alkyl radical. The composition is hydrolyzed, dried and heat treated to form a silicon oxide/titanium oxide abrasion-resistant coating on a substrate with high ultraviolet radiation absorbance.

Buried plate type DRAM

Abstract: A trench of a buried plate type DRAM has a bottom portion wider than an opening portion. A silicon oxide film is formed on an upper portion of the side wall of the trench. An N-type impurity diffusion region is formed around the bottom portion of the trench. Impurity diffusion regions of adjacent trenches are integrally connected with each other as one portion. A first polycrystalline silicon layer is formed on the impurity diffusion region in the trench and the silicon oxide film. The polycrystalline silicon layer is coated with a laminated film consisting of a silicon nitride film and a silicon oxide film. The trench is filled with a second polycrystalline silicon layer covering the laminated film. The impurity diffusion region serves as a plate diffusion region of a capacitor, the first polycrystalline silicon layer serves as a plate electrode, the laminated film serves as a capacitor insulating film, and the second polycrystalline silicon layer serves as a storage node electrode. The capacitor is formed in the trench.

Method of making self-aligned double density polysilicon lines for EPROM

Abstract: A method of forming a closely spaced self-aligned polysilicon pattern of conductive lines is achieved. The method involves forming semiconductor device structures in and on a semiconductor substrate. An insulating layer is formed over the device structures. An insulating layer structure is formed over the semiconductor device structures. A conductive polysilicon layer is formed over the insulating layer. A silicon oxide layer is formed over the polysilicon layer. The oxide layer is now patterned by lithography and etching. The patterning of the oxide layer leaves a first pattern of the oxide over a first designated plurality of polysilicon conductor lines and a second pattern between the oxide which exposes the polysilicon layer over a second designated plurality of polysilicon conductor lines plus the planned spacing between the first and second plurality of polysilicon conductor lines. A uniform thickness silicon nitride layer is deposited over the oxide layer and the exposed polysilicon layer wherein the thickness is the width of the planned spacing. The nitride layer is anisotropically etched to produce sidewall structures having the width of the planned spacing. The exposed polysilicon layer is oxidized to form a silicon oxide layer thereon. The sidewall structures are removed by etching. The exposed polysilicon layer is anisotropically etched to form the closely spaced polysilicon conductor lines. The oxide layers over the polysilicon conductor lines are removed as by etching.

Deposition of silicon oxide films from TEOS by low frequency plasma chemical vapor deposition

Abstract: Recently, TEOS has been studied as a silicon source of silicon oxide films deposited by plasma chemical vapor deposition (CVD) because the deposited films show good step coverage compared with films deposited from SiH4. In this work, the authors deposited silicon oxide films using TEOS as a silicon source by using a low frequency (50 Hz) plasma CVD. It has been demonstrated in previous articles that low frequency (50 Hz) plasma CVD can deposit high quality silicon nitride films and amorphous carbon films without substrate heating. It is found in the present work that the substrate heating at deposition is required to obtain acceptable electrical properties when silicon oxide films are deposited from a TEOS and oxygen mixture, even by low frequency (50 Hz) plasma CVD. The films deposited at 200 °C from the plasma of a 3% TEOS mixture were found to be high quality insulating films; the resistivity was 1016 Ω cm and the breakdown strength 7×106 V/cm. Moreover, Auger electron spectrum analysis revealed that c...

Oxidative diesel control catalyst

Abstract: An oxidative diesel control catalyst is disclosed which has a high conversion rate for hydrocarbons and carbon monoxide and an inhibited oxidation effect on nitrogen oxides and sulfur dioxides and which contains a monolithic catalyst element with throughflow passages of ceramic or metal coated with an activity-promoting dispersion coating of the fine-particle metal oxides aluminum oxide, titanium oxide, silicon oxide, zeolite or mixtures thereof as support of the catalytically active components, the active components being present in the form of platinum, palladium, rhodium and/or iridium doped with vanadium or in contact with an oxidic vanadium compound. The reduced oxidation effect on sulfur dioxide is obtained by virtue of the fact that the fine-particle metal oxides are surface-modified aluminum oxide, titanium oxide, silicon oxide, zeolite or mixtures thereof. The surface modification is a coating of the specific surface of the metal oxides with a layer of titanium dioxide or silicon dioxide of 1 to 5 monolayers.

Semiconductor and manufacture of semiconductor device

Abstract: PURPOSE:To provide a method by which the crystallizing time of amorphous silicon is reduced by lowering the crystallizing temperature of the amorphous silicon and another method by which a thin film transistor is manufactured by using the method. CONSTITUTION:After depositing a base insulating film (e.g. silicon oxide film 22), the insulating film is subjected to plasma treatment by exposing the film to a plasma atmosphere, and then, an amorphous silicon film 25 is deposited and the amorphous silicon is crystallized at 400-600 deg.C. In addition, a part 26 having excellent crystallinity is arbitrary formed by selectively exposing the film 25 to the plasma atmosphere so as to control the part where a crystal core is produced. The semiconductor thus manufactured is used for a thin film transistor.

Method for improving erase characteristics and coupling ratios of buried bit line flash EPROM devices

Abstract: A new method of obtaining a consistent controllable tunnel oxide near the source/drain edge of a contactless memory cell is described. A thick gate oxide layer is grown on a semiconductor substrate. A first polysilicon layer is deposited overlying the thick gate oxide layer. A silicon nitride layer followed by a silicon oxide layer are deposited overlying the first polysilicon layer. The silicon oxide, silicon nitride, and first polysilicon layers are patterned and etched. Arsenic ions are implanted through the thick gate oxide layer into the substrate to form buried source and drain bit lines within the substrate. A second layer of silicon nitride is deposited over the patterned layers and anisotropically etched to form sidewall spacers. SATO (self-aligned thick oxide) oxidation is performed over the N+ area. The silicon nitride spacers are etched away whereby a portion of the thick gate oxide underlying the spacers is exposed. The silicon oxide layer is removed along with the exposed thick gate oxide. The thin tunnel oxide is regrown in the region where the silicon nitride spacers were removed. The silicon nitride layer is removed followed by deposition of a second layer of polysilicon overlying the first polysilicon layer. This layer is patterned such that it is overlying the SATO area to form the floating gate. An interpoly dielectric layer is deposited followed by a third polysilicon layer which is deposited and patterned to form the control gate completing formation of the memory cell.

Process for forming scratch-resistant silicon oxide layers on plastics by plasma-coating

Abstract: In order to produce scratch-resistant silicon oxide layers (coatings) on plastics, such as polymethyl methacrylate or polycarbonate by plasma coating by means of a gaseous organosilane and/or organosiloxane, a plasma treatment with a gaseous or vapour-form unsaturated organic compound whose unsaturated group preferably contains more than one pi -electron pair bonded to carbon or nitrogen atoms, for example acetylene, or with nitrogen, optionally together with oxygen or hydrogen, is carried out before or during the plasma coating.

Method for the formation of silicon oxide films

Abstract: Disclosed is a method for the formation of a thick silicon oxide film on the surface of a substrate. The method comprises forming a hydrogen silsesquioxane resin film on the surface of a substrate and converting the hydrogen silsesquioxane resin into silicon oxide ceramic by heating the resin film-bearing substrate in an inert gas atmosphere at 250°C to 500°C until the content of silicon-bonded hydrogen in the silicon oxide product has reached ≦ 80% of the content of silicon-bonded hydrogen in the hydrogen silsesquioxane.