Showing papers on "Silicon oxide published in 1995"

Deposit-etch-deposit ozone/teos insulator layer method

Abstract: A method for forming a gap-filling and self-planarizing silicon oxide insulator spacer layer within a patterned integrated circuit layer. Formed upon a semiconductor substrate is a patterned integrated circuit layer which is structured with a titanium nitride upper-most layer. The patterned integrated circuit layer also has at least one lower-lying layer formed of a material having a growth rate with respect to ozone assisted Chemical Vapor Deposited (CVD) silicon oxide layers greater than the growth rate of ozone assisted Chemical Vapor Deposited (CVD) silicon oxide layers upon titanium nitride. Formed within and upon the patterned integrated circuit layer is a silicon oxide insulator spacer layer deposited through an ozone assisted Chemical Vapor Deposition (CVD) process. The silicon oxide insulator spacer layer is formed until the surface of the titanium nitride upper-most layer is passivated with the silicon oxide insulator spacer layer. The silicon oxide insulator spacer layer is then etched from the surface of the titanium nitride upper-most layer. Finally, additional portions of the silicon oxide insulator spacer layer are sequentially deposited and etched until the surface of the silicon oxide insulator spacer layer over the lower layer(s) of the patterned integrated circuit layer is planar with the upper surface of the titanium nitride upper-most layer of the patterned integrated circuit layer.

Method and apparatus for forming silicon oxide film by chemical vapor deposition

Abstract: The subject is a plasma-enhanced CVD process for depositing a silicon oxide film on a substrate by using an organosilicon compound such as tetraethoxysilane and oxygen or ozone as the essential reactants. The disclosed CVD method uses a plasma containing oxygen ions, and the density of oxygen ions impinging on the substrate surface is cyclically decreased and increased with a short period such as, e.g., 1 sec. In extreme cases which are rather preferable, the effect of the oxygen plasma is cyclically nullified and returned to a maximum to thereby alternate plasma CVD and plain thermal CVD. The obtained film is comparable in film properties to silicon oxide films deposited by known plasma CVD methods and, when the substrate has steps such as aluminum wiring lines, is better in step coverage and gap filling capability. The film exhibits a still better profile when hydrogen peroxide gas or an alternative hydrogen containing gas is added to the reactant gas mixture.

Multilayer ceramic chip capacitor

Abstract: A multilayer ceramic chip capacitor includes alternately stacked dielectric layers and internal electrode layers. The dielectric layers contain barium titanate as a major component and magnesium oxide, manganese oxide, barium oxide and/or calcium oxide, silicon oxide and optionally, yttrium oxide as minor components in such a proportion that there are present 0.1-3 mol of MgO, 0.05-1.0 mol of MnO, 2-12 mol of BaO+CaO, 2-12 mol of SiO 2 and up to 1 mol of Y 2 O 3 per 100 mol of BaTiO 3 . The capacitor satisfies the standard temperature dependence of capacitance and shows a minimized change of capacitance with time under an applied DC electric field and a long insulation resistance life. Where the dielectric layers contain 0.1-3 mol of MgO, 1-5 mol of Y 2 O 3 , 2-12 mol of BaO+CaO, and 2-12 mol of SiO 2 per 100 mol of BaTiO 3 , the capacitor shows improved DC bias performance.

Silicon-Neuron Junction: Capacitive Stimulation of an Individual Neuron on a Silicon Chip.

Abstract: An identified nerve cell of the leech is attached to a planar silicon microstructure of p-doped silicon covered by a thin layer of insulating silicon oxide. A voltage step, applied between silicon and electrolyte, induces a capacitive transient in the cell which elicits an action potential. The capacitive extracellular stimulation is described by an equivalent electrical four-pole.

Modified wurtzite structure oxide compounds as substrates for III-V nitride compound semiconductor epitaxial thin film growth

Abstract: Semiconductor light emitting and sensing devices are comprised of a lattice matching wurtzite structure oxide substrate and a III-V nitride compound semiconductor single crystal film epitaxially grown on the substrate. Single crystals of these oxides are grown and the substrates are produced. The lattice matching substrates include Lithium Aluminum Oxide (LiAlO 2 ), Lithium Gallium Oxide (LiGaO 2 ), Lithium Silicon Oxide (Li 2 SiO 3 ), Lithium Germanium Oxide (Li 2 GeO 3 ), Sodium Aluminum Oxide (NaAlO 2 ), Sodium Gallium Oxide (NaGaO 2 ), Sodium Germanium Oxide (Na 2 GeO 3 ), Sodium Silicon Oxide (Na 2 SiO 3 ), Lithium Phosphor Oxide (Li 3 PO 4 ), Lithium Arsenic Oxide (Li 3 AsO 4 ), Lithium Vanadium Oxide (Li 3 VO 4 ), Lithium Magnesium Germanium Oxide (Li 2 MgGeO 4 ), Lithium Zinc Germanium Oxide (Li 2 ZnGeO 4 ), Lithium Cadmium Germanium Oxide (Li 2 CdGeO 4 ), Lithium Magnesium Silicon Oxide (Li 2 MgSiO 4 ), Lithium Zinc Silicon Oxide (Li 2 ZnSiO 4 ), Lithium Cadmium Silicon Oxide (Li 2 CdSiO 4 ), Sodium Magnesium Germanium Oxide (Na 2 MgGeO 4 ), Sodium Zinc Germanium Oxide (Na 2 ZnGeO 4 ) and Sodium Zinc Silicon Oxide (Na 2 ZnSiO 4 ). These substrates are used to grow single crystal epitaxial films of III-V nitride compound semiconductors with the composition Al x In y Ga 1-x-y N 0≦x≦1, 0≦y≦1, and 0≦x+y≦1. The semiconductor light devices can also include mixed combinations of any two or more of the above listed compounds. Furthermore, the preferred lattice matching substrates can include all the above listed modified wurtzite structure oxide compounds and their mixed crystals with substitution of the following elements, Be, B, N, Cr, Mn, Fe, Co, Ni, Cu, In and Sb. With the exception of N which can partially replaces oxygen only, all the rest elements are able to replace partially the cations of the above mentioned wurtzite structure oxide compounds. The types of semiconductor light devices that use this invention include light emitting devices, laser diodes, optical pumped laser diodes and optical detectors such as photoluminescence sensors and photo detectors. The laser diode devices can include a lateral or vertical Fabry-Perot resonant cavity, with or without metal electrodes.

Microstructural evolution of a silicon oxide phase in a perfluorosulfonic acid ionomer by an in situ sol-gel reaction

Abstract: Nanocomposites were produced via sol–gel reactions for tetraethylorthosilicate within the cluster morphology of perfluorosulfonic acid films. Small-angle x-ray scattering revealed that the polar/nonpolar nanophase-separated morphological template persists despite invasion by the silicon oxide phase. Scanning electron microscopy (ESEM–EDAX) studies have indicated that the greatest silicon oxide concentration occurs near the surface and decreases to a minimum in the middle. Optical and ESEM micrographs revealed a brittle, surface-attached silica layer at high silicon oxide contents. © 1995 John Wiley & Sons, Inc.

Semiconductor electrode having improved grain structure and oxide growth properties

Abstract: The use of nitrogen doped amorphous silicon as an electrode material for a semiconductor integrated circuit is described. A preferred embodiment is a single transistor flash EPROM cell is disclosed having a tunnel dielectric (202), a floating gate (206), an intergate dielectric having three layers (208, 210, 212), and a control gate (218). The floating gate (206) is composed of in-situ nitrogen doped amorphous silicon. Due to the nitrogen doping the floating gate (206) retains its microcrystalline structure under high temperatures, eliminating large grain boundaries in the floating gate (206). As a result, arrays composed of the disclosed EPROM cell have improved memory cell threshold (V TM ) distributions. In addition, silicon oxide grown from the the floating gate (206) has fewer stress induced defects reducing leakage paths that contribute to data retention errors. An alternate embodiment uses nitrogen doped amorphous silicon as the capacitor plates (304 and 306) in a DRAM cell (300). The nitrogen doped amorphous silicon oxidizes at a slower rate than undoped amorphous silicon and has less inherent stress resulting in thinner a capacitor dielectric (308) of fewer defects. The capacitor plates (304 and 306) maintain their microcrystalline structure throughout subsequent temperature cycling resulting in increased capacitor area.

Planarized interlayer insulating film formed of stacked BPSG film and ozone-teos NSG film in semiconductor device and method for forming the same

Abstract: A semiconductor device formed at a substrate surface region is coated with a non-doped CVD silicon oxide film, and an interlayer insulating film composed of a BPSG film, a first ozone-TEOS NSG film and a second ozone-TEOS NSG film is formed on the silicon oxide film. The BPSG film has a thickness of not less than 50 nm but not greater than 200 nm, and is heat-treated at a temperature of not lower than 700° C. but not higher than 800° C. In addition, the first and second zone-TEOS NSG films are also heat-treated at a temperature of not lower than 700° C. but not higher than 800° C.

Visible electroluminescence from semitransparent Au film/extra thin Si‐rich silicon oxide film/p‐Si structure

Abstract: Visible electroluminescence (EL) has been reported from semitransparent Au film/extra thin Si-rich silicon oxide film/p-Si diodes at room temperature. The Si-rich silicon oxide films, with thickness of about 40 Angstrom, were grown using the magnetron sputtering technique. At forward bias of 4 V, EL spectra with peak energy of 1.9 eV and full width at half maximum of 0.5 eV can be observed from diodes with such extra thin Si-rich oxide films having not been annealed. EL peak energy shows a small red shift under low forward bias but does not shift again when increasing the bias further. Annealing at 800 degrees C, EL spectra widen and show several shoulders at about 1.5, 2.2, and 2.4 eV, and the EL peak energy shows blue shift with increasing forward bias. These results are shown to be consistent with light emission at several types of luminescence centers in the Si-rich silicon oxide films. (C) 1995 American Institute of Physics.

Method of forming insulating film

Abstract: The present invention relates to a film forming method of forming a silicon containing insulating film by plasma CVD. Objects of the present invention are to form, using a highly safe reaction gas, an insulating film which is dense, has excellent step coverage and is low in moisture and in organic residues such as carbon. The insulating film has good affinity for the silicon oxide film formed by the thermal CVD method. The invention also enables control of the refractive index and stress etc. of the insulating film formed. The mixed gas, including the organic compound having Si-H bonds and the oxidizing gas, is converted to a plasma and the silicon containing insulating film is formed on a deposition substrate from the plasma.

Are electrical properties of an aluminum-porous silicon junction governed by dangling bonds?

Abstract: Using an aluminum–porous p+ silicon junction, we have realized a sensor which dc current increases up to two orders of magnitude in the presence of ammonia, as for a series of various gases. To interpret quantitatively this phenomenon, we assume that the conductivity is governed by the width of a channel resulting from the partial depletion of silicon located between two pores. This depleted region is due to the charges trapped on surface states associated with the Si–SiO2 interface where SiO2 is the native silicon oxide. When some gas is adsorbed, mainly on Si–H bonds, we propose there is an electrical screening of the interface states (mainly dangling bonds located in the neighborhood of the Si–H bonds), leading to a decrease of the depleted region, i.e., an increase of the width of the channel and thus an increase of the current.

Silicon oxide germanium resonant tunneling

Abstract: A resonant tunneling diode (400) made of a germanium quantum well (406) with silicon oxide tunneling barriers (404, 408). The silicon oxide tunneling barriers (404, 408) plus germanium quantum well (406) may be fabricated by oxygen segregation from germanium oxides to silicon oxides.

Zinc oxide/n‐Si junction solar cells produced by spray‐pyrolysis method

Abstract: Zinc oxide (ZnO)/n‐Si junction solar cells were fabricated by a spray‐pyrolysis method and high short‐circuit photocurrent densities and relatively high photovoltages were obtained by adjusting the conditions of the deposition and the post‐deposition heat treatment. Consequently, relatively high conversion efficiencies ranging between 6.9% and 8.5% were obtained. The efficiency of the solar cells with ZnO/n‐Si structure decreases slowly with time when they are kept in air in the dark because of the increase in the thickness of the silicon oxide layer between Si and the ZnO film. This degradation can be avoided by forming an indium‐tin‐oxide (ITO) overlayer on the ZnO film, indicating that the silicon oxide layer grows through the reaction of Si with oxygen diffusing from the atmosphere, not with ZnO. The efficiency of the ZnO/n‐Si junction solar cells decreases rapidly with the illumination time. Capacitance‐voltage measurements show that this degradation is caused by a decrease in the work function of th...

Vertical field effect transistor with a trench structure

Abstract: A polycrystalline silicon film which is to be a channel is in a trench provided in a main surface of a silicon substrate. A gate insulating film is on the periphery of a polycrystalline silicon film. A gate electrode is on the periphery of the gate insulating film. A silicon oxide film is on the periphery of the gate electrode. A source/drain film is on the periphery of the silicon oxide film. A silicon oxide film is on the periphery of the source/drain film. A source/drain film is electrically connected to the polycrystalline silicon film. A source/drain film is electrically connected to the polycrystalline silicon film. Since the polycrystalline silicon film extends along the depth direction of trench, a channel length can be sufficient to prevent a short channel effect. Also, compared to the case in which an epitaxial layer is used as a channel, since the polycrystalline silicon film is used as a channel, the time required for manufacturing the device can be shortened.

Atomic force microscope lithography using amorphous silicon as a resist and advances in parallel operation

Abstract: Lithography on (100) single‐crystal silicon and amorphous silicon is performed by electric‐field‐enhanced local oxidation of silicon using an atomic force microscope (AFM). Amorphous silicon is used as a negative resist to pattern silicon oxide, silicon nitride, and selected metals. Amorphous silicon is used in conjunction with chromium to create a robust etch mask, and with titanium to create a positive AFM resist. All lithographies presented here were patterned in parallel by arrays of two piezoresistive silicon or two silicon‐nitride cantilevers. Parallel arrays of five piezoresistive cantilevers were fabricated and used in imaging and lithographic applications. A 400 μm×100 μm parallel image is obtained in the time it would normally take to obtain a 100 μm×100 μm image. In our method of parallel operation, it is only possible to image and lithograph in modes that do not require feedback. In imaging, this limits the possible applications of the parallel AFM. During parallel lithography, discrepancies a...

Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC

Abstract: A process for forming an integrated circuit calls for the provision of at least one matrix of non-volatile memory cells including an intermediate dielectric multilayer comprising a lower silicon oxide layer, an intermediate silicon nitride layer and an upper silicon oxide layer. The process calls for the simultaneous provision in zones peripheral to the memory cells of at least one first and one second transistor type each having a gate dielectric of a first and a second thickness respectively. After formation of the floating gate of the cells with a gate oxide layer and a polycrystalline silicon layer and the formation of the lower silicon oxide layer and of the intermediate silicon nitride layer, the process in accordance with the present invention includes removal of said layers from the zones peripheral to the matrix, and formation of a first silicon oxide layer over the substrate in the areas of both types of transistor. The process further includes removal of the preceding layer from areas assigned only to the transistors of the second type; deposition of said upper silicon oxide layer over the memory cells, over the first silicon oxide layer in the areas of the transistors of the first type and over the substrate in the areas of the transistors of the second type; and formation of a second silicon oxide layer in the areas of both types of peripheral transistors.

Nanometer‐scale oxidation of Si(100) surfaces by tapping mode atomic force microscopy

Abstract: The nanometer‐scale oxidation of Si(100) surfaces in air is performed with an atomic force microscope working in tapping mode. Applying a positive voltage to the sample with respect to the tip, two kinds of modifications are induced on the sample: grown silicon oxide mounds less than 5 nm high and mounds higher than 10 nm (which are assumed to be gold depositions). The threshold voltage necessary to produce the modification is studied as a function of the average tip‐to‐sample distance.

Chemical Structures of the SiO2Si Interface

Abstract: As a result of considerable progress in microfabrication technology for ultra-large scale integration (ULSI), it has become necessary to control oxide formation on an atomic scale in order to produce defect-free SiO2/Si interfaces. However, the possibility of forming an atomically flat interface by oxidizing an atomically flat silicon surface without introducing structural defects is not yet clarified. In this article the present understanding of chemical structures of SiO2/Si interfaces and initial stage of oxidation of silicon surfaces are reviewed.

Plasma-deposited passivation layers for moisture and water protection

Abstract: The barrier properties of electron cyclotron resonance plasma deposited silicon oxide (SiO), silicon oxynitride (SiON) and silicon nitride (SiN) films against moisture and water penetration were studied as a function of the deposition parameters gas flux ratios, microwave power and reactor pressure. Three methods were used to quantify these barrier properties: measurement of film etch rate in water at different temperatures and pH values, determination of moisture permeation coefficient and electrical characterization of samples during humidity exposure. Although the dissolution rate of SiN in water is slightly higher compared with SiO the lower moisture permeation coefficient and the higher electrical stability during exposure to humidity of silicon nitride make it an attractive passivation material for different applications.

Method and device for etching silicon nitride film

Abstract: PURPOSE: To set the selective ratio of a silicon nitride film to a silicon substrate or a silicon oxide film at a relatively high value in the case of removing the silicon nitride film on the silicon substrate or the silicon oxide film by selective etching by using CDE. CONSTITUTION: In the case of removing a part of or the whole silicon nitride film formed on a silicon substrate or a silicon oxide film, mixed gas, which is composed of a gas containing fluorine, oxygen gas and a gas containing hydrogen atoms, is introduced into a discharge part 2 to generate plasma, and only the radical of the plasma active species is introduced into a process chamber 5 wherein the silicon substrate is stored. Thus, the silicon nitride film on the silicon substrate is selectively removed by etching.

In Situ Characterization of Anodic Silicon Oxide Films by AC Impedance Measurements

Abstract: Anodic oxide films grown on Si in an aqueous solution have been characterized by in situ ac impedance techniques, and their behavior compared to thermal oxides. Mott‐Schottky analysis of oxide‐free p‐ and n‐type Si leads to doping concentrations which are in excellent agreement with independent data of conductivity measurements. The growth of anodic oxides can be monitored with in situ impedance measurements. Anodic oxide films exhibit a nonideal capacitive behavior and hence a constant‐phase element has to be introduced for the evaluation of the experimental results in terms of an equivalent circuit. For oxides thicker than ≈ 50 A the roughness factor for the oxide surface can be determined by a comparison of the capacitance results with the film thickness obtained from x‐ray photoelectron spectroscopy (XPS) measurements. For thinner oxides the space‐charge capacitance in the Si and the effect of the surface roughness have to be considered to obtain a good agreement of impedance and XPS data. A comparison of impedance spectra of anodic and thermal oxides shows that anodic oxides not only exhibit less ideal capacitive behavior but also show a drastically lower charge‐transfer resistance indicating a relatively high mobility of ions in the anodic oxide film. The nonideality of the anodic oxides is also evident from cyclic capacitance‐voltage (C‐V) measurements in which a strong hysteresis is observed in contrast to thermal oxides for the anodic oxide films. Furthermore, the dielectric constant of the anodic oxides is higher than for ideal films, which can most probably be attributed to the presence of hydroxides in the film. The quality of the anodic oxide films can be significantly improved by annealing. The imperfect nature of the as‐grown anodic oxide films is also reflected in a lower chemical resistance to etching in solutions compared to thermal oxides. By postoxidation annealing also the chemical resistance of anodic oxides is greatly improved.

Magnetic recording medium and a method of manufacturing the same

Abstract: This invention relates to a magnetic recording medium having a structure in which an undercoating film, a magnetic thin film, a protective film, and an organic film are stacked on a substrate in the order named. Since the protective film contains carbon and silicon and a portion of silicon in at least an interface in contact with the organic film consists of a silicon oxide, the surface of the magnetic recording medium is not degraded even by frequent contact with a magnetic head upon driving or stopping of the magnetic recording medium. This invention also relates to a method of manufacturing the same.

Process for manufacturing a semiconductor substrate comprising laminated copper, silicon oxide and silicon nitride layers

Abstract: A process for manufacturing a plastic package type semiconductor device composed of a rolled metal substrate made of copper or copper alloy and an insulating film formed on the surface of the substrate The film may be a single-layer film made of silicon oxynitride or a composite film formed by laminating a silicon oxide layer and a silicon oxynitride layer (or a silicon nitride layer) A semiconductor element is mounted on the film or on the exposed surface of the substrate Other passive elements are provided on the film After connecting these elements with bonding wires, the entire device is sealed in a resin molding This device is thus free of cracks due to difference in thermal expansion between the film and the substrate, or peeling due to moisture absorption

Field effect transistor

Abstract: A high-resistant p-silicon layer is formed on a silicon substrate through a silicon oxide film. N-source and n-drain layers are selectively formed in the surface of the high-resistant p-silicon layer. A gate electrode is formed through a gate insulating film on a channel region between the source and drain layers. To induce an n-inverted layer under the gate electrode, a p-base layer is formed in the high-resistant p-silicon layer. A depletion layer extending from a pn junction between the n-drain layer and the high-resistant p-silicon layer reaches the silicon oxide film in a thermal equilibrium state. Part of the high-resistant p-silicon layer extends into a channel region between the drain and base layers. The drain and base layers are connected to each other through part of the depletion layer in the thermal equilibrium state. A field effect transistor having a high-speed operation is provided.

SOI substrate having a high heavy metal gettering effect for semiconductor device

Abstract: An SOI substrate comprises a buried silicon oxide layer formed directly under an active silicon layer, and a layer containing phosphorus therein formed under the buried silicon oxide layer. The layer containing phosphorus therein acts as the getter layer, so that an effective gettering of heavy metals can be obtained in a wide temperature range from a low temperature region to a high temperature region. In addition, since the silicon oxide layer exists between the active layer and the getter layer, the diffusion of the phosphorus into the active layer is effectively prevented, and therefore, the phosphorus scarely diffuses to the active layer, so that the device manufactured is subjected to almost no adverse influence of the diffusion of the phosphorus.

Processing of Silicon Carbide‐Mullite‐Alumina Nanocomposites

Abstract: Nanocomposite materials in the form of nanometer-sized second-phase particles dispersed in a ceramic matrix have been shown to display enhanced mechanical properties. In spite of this potential, processing methodologies to produce these nanocomposites are not well established. In this paper, we describe a new method for processing SiC-mullite-Al2O3 nanocomposites by the reaction sintering of green compacts prepared by colloidal consolidation of a mixture of SiC and Al2O3 powders. In this method, the surface of the SiC particles was first oxidized to produce silicon oxide and to reduce the core of the SiC particles to nanometer size. Next, the surface silicon oxide was reacted with alumina to produce mullite. This process results in particles with two kinds of morphologies: nanometer-sized SiC particles that are distributed in the mullite phase and mullite whiskers in the SiC phase. Both particle types are immersed in an Al2O3 matrix.

Diffusion limited oxygen precipitation in silicon: Precipitate growth kinetics and phase formation

Abstract: Published experimental data on silicon oxide precipitate growth kinetics are interpreted in the framework of the theory of Ham for diffusion limited precipitation. A growth law for plate‐like, octahedral and spherical precipitates is derived showing a size dependence which varies as the square root of time. Using well accepted data for the solubility and the diffusion constant of oxygen in silicon, the calculations suggest that the precipitated phase is closer to SiO than to SiO2.

Modified silicon oxide barrier coatings produced by microwave CVD deposition on polymeric substrates

Abstract: A method of depositing, by microwave plasma enhanced chemical vapor deposition, a modified, silicon oxide, barrier coating atop a temperature sensitive substrate; said barrier coating having barrier properties to at least gaseous oxygen and water vapor. The precursor gaseous mixture includes at least a silicon-hydrogen containing gas, an oxygen containing gas and a gas containing at least one element selected from the group consisting of germanium, tin, phosphorus, and boron. The method requires introducing a sufficient flow rate of oxygen-containing gas into the precursor gaseous mixture to eliminate the inclusion of silicon-hydrogen bonds into the deposited coating. The preferred modifier is germanium. Also, a composite material having a microwave-plasma-enhanced-chemical-vapor-deposited silicon oxide (modified or non-modified) barrier coating. The barrier coating has barrier properties to at least gaseous oxygen and water vapor and is substantially free of Si--H bonds. The barrier coating is deposited by the instant method on a temperature sensitive substrate.

Chemical Approach to Nanofabrication: Modifications of Silicon Surfaces Patterned by Scanning Probe Anodization

Abstract: Scanning probe microscope-induced local oxidation of a material surface with adsorbed water is a recent nanolithographic technology. We applied this technique to the nanoscale patterning of hydrogen-terminated silicon (Si-H) surfaces. Using the silicon oxide (SiO x ) patterns as masking, examples of two types of pattern transfer method through area-selective chemical modification were demonstrated. Nanostructures of substrate Si or deposited gold were fabricated by wet chemical etching or electroless plating, respectively. These area selectivities arose from the difference in surface chemical reactivities between anodic SiO x and the surrounding Si-H. The oxidation chemistry is discussed in terms of anodization.

Ultra thin silicon oxide and metal oxide films and a method for the preparation thereof

Abstract: Ultra thin organo-ceramic and metal oxide films are prepared under room temperature and atmospheric conditions by exposing α,ω-functional siloxane oligomers and fatty acid metal soaps, respectively, to a combination of ultraviolet light (UV) and ozone (O3). The process includes the steps of preparing ultra thin α,ω-functional polysiloxane and fatty acid metal soap films using, but not limited to, the Langmuir-Blodgett (LB) technique. The LB technique permits construction of molecular monolayer or multilayer films on a variety of substrates. By using carboxylic acid end groups on the siloxane oligomers, metal ions can be incorporated into the SiOx film after UV-ozone exposure. This technique can be used to make electronically, optically, and chemically important organo-ceramic and metal oxide films on temperature sensitive substrates.