Showing papers on "Silicon oxide published in 2003"

Fabrication of solid-state nanopores with single-nanometre precision.

Abstract: Single nanometre-sized pores (nanopores) embedded in an insulating membrane are an exciting new class of nanosensors for rapid electrical detection and characterization of biomolecules. Notable examples include α-hemolysin protein nanopores in lipid membranes1,2 and solid-state nanopores3 in Si3N4. Here we report a new technique for fabricating silicon oxide nanopores with single-nanometre precision and direct visual feedback, using state-of-the-art silicon technology and transmission electron microscopy. First, a pore of 20 nm is opened in a silicon membrane by using electron-beam lithography and anisotropic etching. After thermal oxidation, the pore can be reduced to a single-nanometre when it is exposed to a high-energy electron beam. This fluidizes the silicon oxide leading to a shrinking of the small hole due to surface tension. When the electron beam is switched off, the material quenches and retains its shape. This technique dramatically increases the level of control in the fabrication of a wide range of nanodevices.

ReaxFFSiO Reactive Force Field for Silicon and Silicon Oxide Systems

Abstract: To predict the structures, properties, and chemistry of materials involving silicon and silicon oxides; interfaces between these materials; and hydrolysis of such systems, we have developed the ReaxFFSiO, reactive force field. The parameters for this force field were obtained from fitting to the results of quantum chemical (QC) calculations on the structures and energy barriers for a number of silicon oxide clusters and on the equations of state for condensed phases of Si and SiO2 from QC. We expect that ReaxFFSiO will allow accurate dynamical simulations of bond breaking processes in large silicon and silicon oxide systems. ReaxFFSiO is based closely on the potential functions of the ReaxFFCH reactive force field for hydrocarbons, so that it should also be useful for describing reactions of organics with Si and SiO2 systems.

Lanthanide oxide / hafnium oxide dielectric layers

Abstract: Dielectric layers containing an atomic layer deposited hafnium oxide and an electron beam evaporated lanthanide oxide and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO 2 . Forming a layer of hafnium oxide by atomic layer deposition and forming a layer of a lanthanide oxide by electron beam evaporation, where the layer of hafnium oxide is adjacent and in contact with the layer of lanthanide, provides a dielectric layer with a relatively high dielectric constant as compared with silicon oxide. The dielectric can be formed as a nanolaminate of hafnium oxide and a lanthanide oxide.

Very Small Bubble Formation at the Solid−Water Interface

Abstract: The formation of very small gas bubbles (so-called “nanobubbles”) at structured solid−water interfaces has been studied using the tapping mode atomic force microscopy (TMAFM) imaging technique. Silicon oxide wafer surfaces were prepared with different degrees of nanometer scale surface roughness and hydrophobicity. Small bubbles do not form on smooth, hydrophilic, or dehydroxylated silicon oxide wafer surfaces immersed in aqueous solutions under known levels of gas supersaturation. Randomly distributed small bubbles were observed over the whole surface of observation on methylated surfaces of controlled roughness. Bubbles formed on rough, methylated surfaces were larger and less-densely distributed than those on a smooth surface of similar hydrophobicity. The process of bubble coalescence was observed as a function of time. The macroscopic contact angle, measured with respect to the aqueous or gas phase, is very different from the microscopic contact angle detected by TMAFM and appears to be due to the in...

Atomic layer deposited ZrTiO4 films

Abstract: Dielectric layers having an atomic layer deposited oxide containing titanium and zirconium and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO 2 . Pulsing a titanium-containing precursor onto a substrate, and pulsing a zirconium-containing precursor to form an oxide containing Zr and Ti by atomic layer deposition provides a dielectric layer with a relatively high dielectric constant as compared with silicon oxide. The pulsing of the titanium-containing precursor and the pulsing of the zirconium-containing precursor is controlled to provide a dielectric layer with a predetermined zirconium to titanium ratio. A zirconium-containing precursor to form the oxide containing Zr and Ti can include zirconium tertiary-butoxide.

Hydrogen assisted hdp-cvd deposition process for aggressive gap-fill technology

Abstract: A method of depositing a silicon oxide layer over a substrate having a trench formed between adjacent raised surfaces. In one embodiment the silicon oxide layer is formed in a multistep process that includes depositing a first portion of layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a first process gas comprising a silicon source, an oxygen source and helium and/or molecular hydrogen with highD/S ratio, for example, 10-20 and, thereafter, depositing a second portion of the silicon oxide layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a second process gas comprising a silicon source, an oxygen source and molecular hydrogen with a lowerD/S ratio of, for example, 3-10.

Direct-write dip-pen nanolithography of proteins on modified silicon oxide surfaces.

Abstract: [*] Prof. C. A. Mirkin, J.-H. Lim, D. S. Ginger, K.-B. Lee, J. Heo, J.-M. Nam Department of Chemistry and Institute for Nanotechnology Northwestern University 2145 Sheridan Road, Evanston, IL 60208-3113 (USA) Fax: (+1)847-467-5123 E-mail: camirkin@chem.northwestern.edu [**] C.A.M. acknowledges the AFOSR, DARPA, and NSF for support of this research. D.S.G. thanks the NIH for an NRSA Postdoctoral Fellowship (1 F32 HG02463). Angewandte Chemie

Towards the First Silicon Laser

Abstract: Preface. Photograph of Participants. Introduction. Part I: Light emitting diodes. High efficiency silicon light emitting diodes M.A. Green, et al. Dislocation-based silicon light emitting devices M.A. Lourenco, et al. Efficient electroluminescence in alloyed silicon diodes O.B. Gusev, et al. Light emitting devices based on silicon nanocrystals A. Irrera, et al. Optical and electrical characteristics of LEDs fabricated from Si-nanocrystals embedded in SiO2 B. Garrido, et al. Electroluminescence in Si/SiO2 Layers L. Heikkilo, et al. Reverse biased porous silicon light emitting diodes S. Lazarouk. Strong blue light emission from ion implanted Si/SiO2 structures W. Skorupa, et al. Si/Ge nanostructures for LED G.E. Cirlin, et al. Part II: Silicon nanocrystals. Optical spectroscopy of single silicon quantum dots J. Valenta, et al. Luminescence from Si/SiO2 nanostructures Y. Kanemitsu. Electronic and dielectric properties of porous silicon D. Kovalev, J. Diener. Silicon technology used for size-controlled silicon nanocrystals M. Zacharias, et al. Structural and optical properties of silicon nanocrystals embedded in Silicon Oxide films M. Miu, et al. Part III: Optical gain in silicon nanocrystals. Stimulated emission in silicon nanocrystals L. Dal Negro, et al. Lasing effects in ultrasmall silicon nanoparticles M.H. Nayfeh. On fast optical gain in silicon nanostructures L. Khriachtchev, M. Rasanen. Experimental observation of optical amplification in silicon nanocrystals M. Ivanda, et al. Optical amplification in nanocrystalline silicon superlattices P.M. Fauchet, Jinhao Ruan.Optical gain from silicon nanocrystals: a critical perspective A. Polman, R.G. Elliman. Optical gain measurements with variable stripe length technique J. Valenta, et al. Part IV: Theory of silicon nanocrystals. Theory of silicon nanocrystals C. Delerue, et al. Gain theory and models in silicon nanostructures S. Ossicini, et al. Part V: Silicon/Germanium quantum dots and quantum cascade structures. Si-Ge quantum dot laser: What can we learn from III-V experience? N.N. Ledentsov. Promising SiGe superlattice and quantum well laser candidates G. Sun, et al. Optical properties of arrays of Ge/Si quantum dots in electric field A.V. Dvurechenskii, A.I. Yakimov. MBE of Si-Ge heterostructures with Ge nanocrystals P.P. Pchelyakov, et al. Strain compensated Si/SiGe quantum cascade emitters grown on SiGe pseudosubstrates L. Diehl, et al. Part VI: Terahertz silicon laser. Terahertz silicon laser: Intracenter optical pumping S.G. Pavlov, et al. Silicon lasers based on shallow donor centers: Theoretical background and experimental results V.N. Shastin, et al. Resonant states in modulation doped SiGe Heterostructures as a source of THz lasing A.A. Prokofiev, et al. THz lasing of strained p-Ge and Si/Ge structures M.S. Kagan. Terahertz emission from Silicon-Germanium quantum cascade R.W Kelsall, et al. Part VII: Optical gain in Er doped Si nanocrystals. Towards an Er-doped Si nanocrystal sensitized waveguide laser: The thin line between gain and loss P.G. Kik, A. Polman. Optical gain using nanocrystal sensitized Erbium Jung H. Shin, et al. Excitation mechanism of Er photoluminescence in bulk Si and SiO2 with nanocryst

Mechanism of Selective Growth of Carbon Nanotubes on SiO2/Si Patterns

Abstract: During the chemical vapor deposition of multiwalled carbon nanotubes using the vapor phase delivery of a metal-organic (ferrocene) catalyst precursor, a strong selectivity for growth on patterned SiO2/Si substrates has been observed. A mechanism for this selective growth is described here. Delivered metal particles (Fe) on Si and SiO2 regions were investigated using several high-resolution characterization techniques. Active iron catalyst (γ iron) particles were formed on the silicon oxide surface resulting in the formation of highly aligned nanotubes on this substrate. However, in the Si regions, stable FeSi2 and Fe2SiO4 particles were formed due to chemical reactions between silicon surface and Fe particles at high temperature leading to an inhibition of nanotube growth in the Si regions.

Fabrication of Sub-10-nm Silicon Nanowire Arrays by Size Reduction Lithography

Abstract: A photolithography-based method capable of size reduction to produce sub-10-nm Si nanowire arrays on a wafer scale is described. By conformally depositing a material (silicon oxide or silicon) that...

Semiconductor device and method of manufacturing the same

Abstract: A semiconductor device has a pair of impurity regions in a semiconductor substrate. A silicon layer is formed on the impurity region. A gate insulating film is formed between the impurity regions. A gate electrode is formed on the gate insulating film. A first silicon nitride film is formed on the gate electrode. A silicon oxide film is formed on a side surface of the gate electrode. A second silicon nitride film is partially formed on the silicon layer and on a side surface of the silicon oxide film. A conductive layer is formed on the silicon layer.

Method of forming fine patterns using silicon oxide layer

Abstract: Provided is a method of forming a fine pattern, in which a silicon oxide layer is formed on a photoresist pattern and dry etching is performed on the resultant structure. According to the method, a photoresist pattern is formed on a material layer on which a fine pattern is to be formed, a silicon oxide layer is conformally deposited on the photoresist pattern without damaging the photoresist pattern, and dry etching is performed on a lower layer. During the dry etching, spacers are formed along the sidewalls of the photoresist pattern, and then, a polymer layer is formed on the photoresist pattern. Accordingly, it is possible to prevent the thinning of the photoresist pattern so that a desired pattern can be obtained, and further, to prevent striation or wiggling from occurring on the patterned material layer.

Semiconductor device fabrication method

Abstract: A reduction of a leakage current as well as a decrease in the thickness of an insulating film is realized in a semiconductor device. To this end, a silicon oxide film and a silicon nitride film are formed on a substrate, which is then heated to a temperature within a range of 20° C.-600° C. so that a plasma nitridation process can be performed on the silicon nitride film. Further, a thermal process is performed in a non-oxide gas atmosphere. By performing these processes, the gate leakage current can be significantly reduced in the formed gate insulator, and the silicon oxide-equivalent thickness of the insulating film can be significantly decreased as well.

Effect of Solvents and Concentration on the Formation of a Self-Assembled Monolayer of Octadecylsiloxane on Silicon (001)

Abstract: We have explored the effects of solvent, adsorber concentration, and environment on the formation of high-coverage monolayers of alkylsiloxanes on silicon oxide surfaces from alkylsiloxane solutions. Specifically, we have varied the solvent polarity and the concentration of octadecyltrichlorosilane (OTS) used for the deposition process. We found that for a wide range of concentrations (25 μM to 2.5 mM) and normal laboratory air humidity (RH 45−85%) OTS dissolved in heptane causes the formation of a full-coverage self-assembled monolayer on hydrophilic silicon oxide. The resulting self-assembled layers were studied by atomic force microscopy, ellipsometry, and X-ray reflectometry. Deposition of OTS from dodecane solutions resulted in multilayered films. In contrast, the use of heptane as solvent (in which the solubility of water is at intermediate level between toluene and dodecane) caused the formation of high-quality monolayers. We found consistent and reproducible results for the effect of solvents (dod...

Boundary lubrication of oxide surfaces by Poly(L-lysine)-g-poly(ethylene glycol) (PLL-g-PEG) in aqueous media

Abstract: In this work, we have explored the application of poly(L-lysine)-g-poly(ethylene glycol) (PLL-g-PEG) as an additive to improve the lubricating properties of water for metal-oxide-based tribo-systems. The adsorption behavior of the polymer onto both silicon oxide and iron oxide has been characterized by optical waveguide lightmode spectroscopy (OWLS). Several tribological approaches, including ultra-thin-film interferometry, the mini traction machine (MTM), and pin-on-disk tribometry, have been employed to characterize the frictional properties of the oxide tribo-systems in various contact regimes. The polymer appears to form a protective layer on the tribological interface in aqueous buffer solution and improves both the load-carrying and boundary-layer-lubrication properties of water.

Semiconductor device with boron containing carbon doped silicon oxide layer

Abstract: A method of forming a carbon doped oxide layer on a substrate is described. That method comprises introducing into a chemical vapor deposition apparatus a source of carbon, silicon, boron, and oxygen. That apparatus is then operated under conditions that cause a boron containing carbon doped oxide layer to form on the substrate.

Temperature Dependence of Morphologies of Aligned Silicon Oxide Nanowire Assemblies Catalyzed by Molten Gallium

Abstract: Silicon oxide nanowire assemblies with fishbonelike, gourdlike, spindlelike, badmintonlike, and octopuslike morphologies were synthesized by the chemical vapor deposition of silane at 1150 °C with molten gallium as the catalyst via a vapor−liquid−solid process. The morphologies of the nanowire assemblies were temperature-dependent so that within a specific temperature range nanowire assemblies with a specific morphology were formed. Although the nanowire assemblies formed in different temperature ranges have different morphologies, they all are composed of a spherical liquid-gallium ball (3 to 5 μm in diameter) and a silicon oxide nanowire bunch that grows out from the lower-hemisphere surface of the gallium ball. Branching-growth and batch-growth phenomena were observed in the samples and were believed to be responsible for the formation of the unique morphologies described here. The growth mechanism of the nanowire assemblies is discussed.

Method for forming a silicon oxide layer using spin-on glass

Abstract: A method is provided for forming silicon oxide layers during the processing of semiconductor devices by applying a SOG layer including polysilazane to a substrate and then substantially converting the SOG layer to a silicon oxide layer using an oxidant solution. The oxidant solution may include one or more oxidants including, for example, ozone, peroxides, permanganates, hypochlorites, chlorites, chlorates, perchlorates, hypobromites, bromites, bromates, hypoiodites, iodites, iodates and strong acids.

Room temperature nanocrystalline silicon single-electron transistors

Abstract: Single-electron transistors operating at room temperature have been fabricated in 20-nm-thick nanocrystalline silicon thin films. These films contain crystalline silicon grains 4 – 8 nm in size, embedded in an amorphous silicon matrix. Our single-electron transistor consists of a side-gated 20 nm×20 nm point contact between source and drain electrodes. By selectively oxidizing the grain boundaries using a low-temperature oxidation and high-temperature argon annealing process, we are able to engineer tunnel barriers and increase the potential energy of these barriers. This forms a “natural” system of tunnel barriers consisting of silicon oxide tissues that encapsulate sub-10 nm size grains, which are small enough to observe room-temperature single-electron charging effects. The device characteristics are dominated by the grains at the point contact. The material growth and device fabrication process are compatible with silicon technology, raising the possibility of large-scale integrated nanoelectronic sys...

Semiconductor processing equipment having improved process drift control

Abstract: A plasma processing chamber including a slip cast part having a surface thereof exposed to the interior space of the chamber The slip cast part includes free silicon contained therein and a protective layer on the surface which protects the silicon from being attacked by plasma in the interior space of the chamber The slip cast part can be made of slip cast silicon carbide coated with CVD silicon carbide The slip cast part can comprise one or more parts of the chamber such as a wafer passage insert, a monolithic or tiled liner, a plasma screen, a showerhead, dielectric member, or the like The slip cast part reduces particle contamination and reduces process drift in plasma processes such as plasma etching of dielectric materials such as silicon oxide

Stress measurements of germanium nanocrystals embedded in silicon oxide

Abstract: Ge nanocrystals embedded in thermal SiO2 on top of a Si substrate are investigated using Raman spectroscopy and transmission electron microscopy. We observe that the Raman peak frequency of the Ge nanocrystals is strongly affected by compressive stress. In the case of large particles for which the phonon confinement-induced Raman shift can be neglected, the stress is measured taking into account isotopic composition effects induced by the ion implantation process used to produce the nanocrystals. The stress is proposed to originate from a liquid–solid phase transition in Ge.

Synthesis of gold-silica composite nanowires through solid-liquid-solid phase growth.

Abstract: Nanoscale wires of silicon oxide, and silicon oxide with embedded gold-silicide nanospheres, are synthesized by heating of a gold-coated silicon wafer at temperatures of 1000 degrees C or above, with the resulting wires having diameters ranging from 30 to 150 nm and lengths of approximately 1 mm. This simple fabrication process should make possible economical bulk production of nanowires. Studies indicate that the growth of these gold-silica composite nanowires occurs directly on the silicon wafer by a solid-liquid-solid mechanism.

Atmospheric pressure PE-CVD of silicon based coatings using a glow dielectric barrier discharge

Abstract: The aim of this work is to determine the properties and to understand the growth mechanisms of silicon-based coatings realised with an atmospheric pressure glow dielectric barrier discharge. Mixtures of SiH 4 and N 2 O, diluted in N 2 to reach the atmospheric pressure are used to obtain silicon oxide thin films. A longitudinal gas injection allows to study the coating properties as a function of the reactive gas decomposition and transformations level. The other parameters of this study are the silane rate and the plasma power. The thickness profile as a function of the gas residence time in the discharge clearly shows two maxima. SEM observations, ellipsometry and infrared results show that the first maximum which typically corresponds to a 400 μs residence time is due to radicals directly interacting with the surface while the second one observed for 10 ms residence time is due to the accumulation of aggregates formed in the gas phase following the interaction of radicals in the gas bulk. The first mechanism leads to dense silicon oxide coatings. Higher is the plasma power, denser is the coating: values of 98% of SiO 2 are reached. The growth rate increases with the silane concentration and the plasma power but saturation is observed around some tens of nanometers per minute. The second mechanism leads to porous deposit typically made of 30% of SiO 2 and 70% of void. The growth rate is proportional to the power and increases as the square of the silane concentration. The maximum coating roughness is observed when the two mechanisms significantly contribute to the film growth leading to the formation of ‘cauliflower’ type structure.

Reaction of SiO2 with hafnium oxide in low oxygen pressure

Abstract: A dynamic process consisting of a series of reactions during deposition of HfO2 films on SiO2-covered silicon under oxygen-deficient conditions is identified. The oxygen-deficient HfOx<2 layer absorbs the oxygen in the SiO2 layer to form fully oxidized metal oxide film. As a result, there is no silicate and silicon oxide formed at the interface with silicon substrate. Thermodynamic analysis indicates that even if there is a layer of silicate forming at the initial stage of deposition, the silicate layer will be decomposed with the progress of HfOx<2 deposition.

Method for atomic layer deposition (ALD) of silicon oxide film

Abstract: The present invention relates to a method for forming silicon oxide films on substrates using an atomic layer deposition process. Specifically, the silicon oxide films are formed at low temperature and high deposition rate via the atomic layer deposition process using a Si 2 Cl 6 source unlike a conventional atomic layer deposition process using a SiCl 4 source. The atomic layer deposition apparatus used in the above process can be in-situ cleaned effectively at low temperature using a HF gas or a mixture gas of HF gas and gas containing —OH group.

Photoluminescence mechanism model for oxidized porous silicon and nanoscale-silicon-particle-embedded silicon oxide

Abstract: There is much debate about the photoluminescence (PL) mechanisms of the nanoscale Si/Si oxide systems containing oxidized porous silicon and a nanoscale-Si-particle (NSP)-embedded Si oxide deposited by chemical vapor deposition, sputtering, or Si-ion implanting into Si oxide. In this paper, we suggest that two competitive processes, namely, the quantum confinement (QC) process and the quantum confinement-luminescence center (QCLC) process, take place in the PL. The photoexcitation occurs in the NSPs for both of the processes, while the photoemission occurs either in the NSPs for the QC process or in the luminescence centers (LCs) in Si oxide adjacent to the NSPs for the QCLC process. The rates of the two processes are compared quantitatively. Which process plays the major role in PL is determined by the capture cross section, the luminescence efficiency, and the density of the LCs, and the sizes of the NSPs. For a nanoscale Si/Si oxide system with the LCs having certain capture cross-section and luminescence efficiency, the higher the LC density and the larger the sizes of NSPs, the more beneficial for the QCLC process to surpass the QC process, and vice versa. For certain LC parameters, there is a critical most probable size for the NSPs. When the most probable size of the NSPs is larger than the critical one, the QCLC process dominates the PL, and when the most probable size of the NSPs is smaller than the critical one, the QC process dominates the PL. When the most probable size of the NSPs is close to the critical one, both the QC and QCLC processes should be taken into account. We have used this model to discuss PL experimental results reported for some nanoscale Si/Si oxide systems.

Manufacturing method of a semiconductor substrate provided with a through hole electrode

Abstract: A manufacturing method of a semiconductor substrate provided with a through hole electrode is proposed. In accordance with the methods, it is possible to effectively form a through hole electrode in a semiconductor substrate in which a device and a wiring pattern have been already fabricated. This manufacturing method includes the steps of forming a first silicon oxide film 12 on a principal surface of the semiconductor substrate 11, forming a small hole 13 through the semiconductor substrate 11 from the opposite the step to reach to the first silicon oxide film 12, covering the inside of the small hole 13 with the second silicon oxide film 14, forming a first thin metal film 15 and a second thin metal film 16 on the first silicon oxide film 12, partially removing the first silicon oxide film 12 corresponding to the end of the small hole 13, and filling the small hole 13 with the conductive material to form a through hole electrode 17.

Method for fabricating semiconductor device

Abstract: After forming a gate insulating film on a semiconductor substrate, a silicon film is deposited on the gate insulating film, and a high-melting point metal film is deposited on the silicon film. After forming a hard mask made of a silicon oxide film or a silicon nitride film on the high-melting point metal film, the high-melting point metal film is dry etched by using the hard mask as a mask. After removing a residue or a natural oxide film present on the silicon film through dry etching, the silicon film is dry etched by using the hard mask as a mask. The residue or the natural oxide film is removed while suppressing excessive etching of the silicon film.