Showing papers on "Silicon oxide published in 2004"

Semiconductor device and method for forming the same

Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer A thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO x N y Also, a thin film comprising SiO x N y is formed under the active layer The active layer includes a metal element at a concentration of 1×10 15 to 1×10 19 cm −3 and hydrogen at a concentration of 2×10 19 to 5×10 21 cm −3

Very low dielectric constant plasma-enhanced CVD films

Abstract: The present invention provides a method for depositing nano-porous low dielectric constant films by reacting an oxidizable silicon containing compound or mixture comprising an oxidizable silicon component and an oxidizable non-silicon component having thermally liable groups with nitrous oxide, oxygen, ozone, or other source of reactive oxygen in gas-phase plasma-enhanced reaction. The deposited silicon oxide based film is annealed to form dispersed microscopic voids that remain in a nano-porous silicon oxide based film having a low-density structure. The nano-porous silicon oxide based films are useful for forming layers between metal lines with or without liner or cap layers. The nano-porous silicon oxide based films may also be used as an intermetal dielectric layer for fabricating dual damascene structures. Preferred nano-porous silicon oxide based films are produced by reaction of methylsilyl-1,4-dioxinyl ether or methylsiloxanyl furan and 2,4,6-trisilaoxane or cyclo-1,3,5,7-tetrasilylene-2,6-dioxy-4,8 dimethylene with nitrous oxide or oxygen followed by a cure/anneal that includes a gradual increase in temperature.

DNA-Mediated Fluctuations in Ionic Current through Silicon Oxide Nanopore Channels. Nano Lett., 4(8), 1551-1556

Abstract: Single molecule sensors in which nanoscale pores within biological or artificial membranes act as mechanical gating elements are very promising devices for the rapid characterization and sequencing of nucleic acid molecules. The two terminal electrical measurements of translocation of polymers through single ion channels and that of ssDNA molecules through protein channels have been demonstrated, and have sparked tremendous interest in such single molecule sensors. The prevailing view regarding the nanopore sensors is that there exists no electrical interaction between the nanopore and the translocating molecule, and that all nanopore sensors reported to-date, whether biological or artificial, operate as a coulter-counter, i.e., the ionic current measured across the pore decreases (is mechanically blocked) when the DNA molecule transverses through the pore. We have fabricated nanopore “channel” sensors with a silicon oxide inner surface, and our results challenge the prevailing view of exclusive mechanica...

Method of increasing deposition rate of silicon dioxide on a catalyst

Abstract: Methods for forming dielectric layers, and structures and devices resulting from such methods, and systems that incorporate the devices are provided. The invention provides an aluminum oxide/silicon oxide laminate film formed by sequentially exposing a substrate to an organoaluminum catalyst to form a monolayer over the surface, remote plasmas of oxygen and nitrogen to convert the organoaluminum layer to a porous aluminum oxide layer, and a silanol precursor to form a thick layer of silicon dioxide over the porous oxide layer. The process provides an increased rate of deposition of the silicon dioxide, with each cycle producing a thick layer of silicon dioxide of about 120 Å over the layer of porous aluminum oxide.

Nonvolatile semiconductor memory device

Abstract: PROBLEM TO BE SOLVED: To provide a reliable nonvolatile semiconductor storage device free from occurrence of interference between adjacent cells. SOLUTION: As for the ONO film of a slit 205 on an element separation area 202, a silicon nitride film is cut off at its center. Since the ends of the cut off silicon nitride films are covered with a silicon oxide film formed thereon, electrons are trapped in the silicon nitride film. Thus, even when the electrons are spread and drifted in the silicon nitride film, the electrons never reach the adjacent cells. COPYRIGHT: (C)2004,JPO

Zirconium oxide and hafnium oxide etching using halogen containing chemicals

Abstract: A method is described for selectively etching a high k dielectric layer that is preferably a hafnium or zirconium oxide, silicate, nitride, or oxynitride with a selectivity of greater than 2:1 relative to silicon oxide, polysilicon, or silicon. The plasma etch chemistry is comprised of one or more halogen containing gases such as CF 4 , CHF 3 , CH 2 F 2 , CH 3 F, C 4 F 8 , C 4 F 6 , C 5 F 6 , BCl 3 , Br 2 , HF, HCl, HBr, HI, and NF 3 and leaves no etch residues. An inert gas or an inert gas and oxidant gas may be added to the halogen containing gas. In one embodiment, a high k gate dielectric layer is removed on portions of an active area in a MOS transistor. Alternatively, the high k dielectric layer is used in a capacitor between two conducting layers and is selectively removed from portions of an ILD layer.

Method and apparatus for forming silicon oxide film

Abstract: A method for forming a silicon oxide film includes disposing a silicon oxide film on a surface of a target substrate, and performing a reformation process on the silicon oxide film. The reformation process is performed by annealing the silicon oxide film while exposing the silicon oxide film to oxygen radicals and hydroxyl group radicals.

Semiconductor device and method of manufacturing the same

Abstract: The present invention provides a semiconductor device capable of preventing deterioration in carrier mobility of a semiconductor layer, which is a quality of the interface between the semiconductor layer and an insulating layer, and a method of manufacturing the semiconductor device. In the semiconductor device, an interface layer is provided between a semiconductor layer made of active polycrystalline silicon and an insulating layer made of silicon oxide. The nitrogen element in silicon nitride diffuses into the semiconductor layer made of active polycrystalline silicon to compensate for lattice strain of the active polycrystalline silicon film, to satisfy the desired quality of the interface between the semiconductor layer and the insulating layer.

Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Electronic structure and optical properties of silicon nanowires: A study using x-ray excited optical luminescence and x-ray emission spectroscopy

Abstract: We report a soft x-ray excited optical luminescence (XEOL) and x-ray emission spectroscopy (XES) study of silicon nanowires (SiNW) with excitations at the silicon $K$ and ${L}_{3,2}$ edge, respectively. It is found that the XEOL of SiNW exhibits several luminescence bands at $\ensuremath{\sim}460$, $\ensuremath{\sim}530$, and $\ensuremath{\sim}630\phantom{\rule{0.3em}{0ex}}\mathrm{nm}$. These luminescence bands are broad and are sensitive to the $\mathrm{Si}\phantom{\rule{0.2em}{0ex}}1s$ excitation channel (Si versus $\mathrm{Si}{\mathrm{O}}_{2}$ whiteline). These chemical- and morphology-dependent luminescences are attributable to the emission from the encapsulating silicon oxide, the quantum-confined silicon crystallites of various sizes embedded in the oxide layer, and the silicon-silicon oxide interface. XES clearly shows the presence of a relatively thick oxide layer encapsulating the silicon nanowire and the densities of states tailing across the Fermi level. The implications of these findings to the electronic and optical properties of silicon nanowires are discussed.

Silicon carbide semiconductor device and its manufacturing method

Abstract: PROBLEM TO BE SOLVED: To prevent the growth of stacking faults in an epitaxial layer stacked on a silicon carbide substrate in a silicon carbide semiconductor device. SOLUTION: On the silicon carbide single crystal substrate 1, an n-type epitaxial layer 2 made of silicon carbide and a p-type semiconductor region 3 made of silicon carbide are stacked. From the front surface of the p-type semiconductor region 3 to an interface between the n-type epitaxial layer 2 and the substrate 1, a groove 12 having a lattice-like plane shape is formed. By filling up the groove 12 with a silicon oxide film 5, a fault stop region 10 which stops the growth of stacking faults is formed. The n-type epitaxial layer 2 and the p-type semiconductor region 3 are divided into a plurality of insular regions 11 by the fault stop region 10. COPYRIGHT: (C)2005,JPO&NCIPI

Gap-fill depositions in the formation of silicon containing dielectric materials

Abstract: A method to form a silicon oxide layer, where the method includes the step of providing a continuous flow of a silicon-containing precursor to a chamber housing a substrate, where the silicon-containing precursor is selected from TMOS, TEOS, OMTS, OMCTS, and TOMCATS. The method may also include the steps of providing a flow of an oxidizing precursor to the chamber, and causing a reaction between the silicon-containing precursor and the oxidizing precursor to form a silicon oxide layer. The method may further include varying over time a ratio of the silicon-containing precursor:oxidizing precursor flowed into the chamber to alter a rate of deposition of the silicon oxide on the substrate.

Method of manufacturing semiconductor device

Abstract: PROBLEM TO BE SOLVED: To provide a technology of fully removing foreign substances produced by removing a film formed on the end of a semiconductor wafer from the wafer in a washing step. SOLUTION: The method comprises a step of forming a hydrophobic SiOC film 8 having a lower dielectric constant than a silicon oxide film on a semiconductor wafer 1, forming a hydrophilic silicon oxide film 9 on the SiOC film 8 which may be made by the CVD method using TEOS as a raw material, polishing and removing the laminate film formed on the end 1A of the wafer 1 using e.g. a polishing drum, and removing foreign substances produced by removing the film formed on the end 1A of the wafer 1 using a washing solution 15. This solution 15 completely removes the foreign substances, since the substances deposit on the hydrophilic silicon oxide film. COPYRIGHT: (C)2008,JPO&INPIT

Method for fabricating semiconductor device

Abstract: An underlying insulting film of silicon oxide, a gate insulating film of hafnium oxide, a gate electrode of polysilicon, and side walls of silicon oxide are formed above an element formation region of a semiconductor substrate In the upper portion of the element formation region of the semiconductor substrate, source and drain areas and extension areas are formed by implantations of respective types Thereafter, the scan speed of the semiconductor substrate and the pulse interval and the peak power of laser beam are adjusted to irradiate only the vicinity of the surface of the semiconductor substrate with laser beam for 01 second so that the vicinity of the surface of the semiconductor substrate has a temperature of 1150 to 1250° C Thus, heat treatments for the gate insulating film and the source and drain areas are performed

Method for Manufacturing Bonded Wafer

Abstract: A thickness of silicon oxide film of a wafer for active layer is controlled to be thinner than that of buried silicon oxide film. Consequently, uniformity in film thickness of the active layer of a bonded wafer is improved even if a variation in the in-plane thickness of the silicon oxide film is large at a time of ion implantation. Furthermore, since the silicon oxide film is rather thinner and thereby the ion implantation depth is relatively deeper, damages to the active layer and the buried silicon oxide film caused by the ion implantation can be reduced.

Stable trapping of electrons and holes in deposited insulating oxides: Al2O3, ZrO2, and HfO2

Abstract: Charge trapping in high-permittivity metal oxides (Al2O3, ZrO2, and HfO2) grown on (100)Si using various types of chemical vapor deposition (CVD) was studied using generation of electron-hole pairs in the oxide by 10 eV photons For most of the CVD methods, thin (≈5 nm) oxide films exhibit positive charging suggesting hole trapping as most efficient charge trapping process Negative charge is observed only in as-deposited nitrogen-containing films grown from Hf(NO3)4 The trapped positive charge depends only weakly on the HfO2 thickness indicating that holes are trapped in a silicon oxide interlayer grown between the Si and HfO2 during deposition, which is further affirmed by enhanced positive charging after additional oxidation of the samples at high temperatures The work function of the metal electrode material has a large influence on hole trapping in thin oxides, indicating electron exchange between the metal and defect states in the oxide In addition, trapping of positive charge correlates with lib

Intense blue-white luminescence from carbon-doped silicon-rich silicon oxide

Abstract: The effect of carbon doping on the enhancement of visible luminescence from silicon-rich silicon oxide (SRSO), which consists of Si nanoclusters embedded inside a SiO2 matrix, is investigated. C-doped SRSO films were fabricated by electron cyclotron resonance-plasma enhanced chemical vapor deposition method using SiH4, O2, and CH4 source gases followed by a high-temperature anneal. Intense blue-white visible luminescence, visible to the naked eye under daylight conditions, was observed from the film with a nearly equal amount of C and excess Si (∼16 at. %) after an anneal at 950 °C. Furthermore luminescence could be tuned from 1.8 to 2.5 eV by controlling the C to excess Si ratio, the C content, and the anneal temperature. Taken together with the infrared absorption spectra, these results indicate that the luminescence is attributed to exciton recombination in C-incorporated Si nanoclusters.

Effect of nitride passivation on the visible photoluminescence from Si-nanocrystals

Abstract: The effect of nitride passivation on the visible photoluminescence from nanocrystal Si (nc-Si) is investigated. Silicon-rich silicon nitride (SRSN) and silicon-rich silicon oxide (SRSO), which consist of nc-Si embedded in silicon nitride and silicon oxide, respectively, were prepared by reactive ultrahigh vacuum ion beam sputter deposition followed by a high temperature anneal. Both SRSN and SRSO display photoluminescence peaks after high temperature annealing, coincident with the formation of Si nanocrystals, and similar changes in the peak luminescence position with the excess Si content. However, the luminescence peak positions from SRSN are blueshifted by about 0.6 eV over that of comparable SRSO such that its luminescence peaks in the visible range. The results demonstrate that control of the surface passivation is critical in controlling the nc-Si luminescence, and indicate the possibility of using nitride-passivated nc-Si for visible luminescence applications including white luminescence.

Guided self-assembly of metallic nanowires and channels

Abstract: A method is presented to form metallic nanowires and nanochannels by guided self-assembly. The method relies on an initial plasma-enhanced chemical vapor deposition of a silicon oxide film with altered chemistry on a silicon wafer, and the cracking of the film due to tensile stresses upon annealing. The fabricated stress concentration features on the Si substrate control the number of cracks and their orientation. These cracks are then filled with electroless nickel, and the subsequent removal of SiO2 produces a controlled network of nanowires of about 100 nm in dimension. In addition to nanowires, nanobridges, and nanocantilevers have also been fabricated by releasing the wires, confirming that the resulting structures are rather robust.

Size and Shape Controlled Growth of Molecular Nanostructures on Silicon Oxide Templates

Abstract: A new process for nanoscale fabrication of ordered monolayer films of conjugated organic molecules is presented. The process makes it possible to grow sexithiophene monolayers (T6) at precise locations on a silicon substrate with a high degree of order while preserving the orientation of growth. The process is based on the integration of local oxidation nanolithography of the substrate and template growth of the molecular thin film. The former is used to fabricate silicon oxide arrays of parallel lines of 30−50 nm in width and several microns in length. Template growth arises from the interplay between kinetic growth parameters and preferential interactions with the patterned surface. The result is a monolayer film of organic molecules that conformally mimicks the features of the fabricated motives. This approach could be used to connect molecular domains of well-defined size between metallic electrodes.

Etched ion tracks in silicon oxide and silicon oxynitride as charge injection or extraction channels for novel electronic structures

Abstract: The impact of swift heavy ions onto silicon oxide and silicon oxynitride on silicon creates etchable tracks in these insulators. After their etching and filling-up with highly resistive matter, these nanometric pores can be used as charge extraction or injection paths towards the conducting channel in the underlying silicon. In this way, a novel family of electronic structures has been realized. 1 The basic characteristics of these “TEMPOS” (=tunable electronic material with pores in oxide on silicon) structures are summarized. Their functionality is determined by the type of insulator, the etch track diameters and lengths, their areal densities, the type of conducting matter embedded therein, and of course by the underlying semiconductor and the contact geometry. Depending on the TEMPOS preparation recipe and working point, the structures may resemble gatable resistors, condensors, diodes, transistors, photocells, or sensors, and they are therefore rather universally applicable in electronics. TEMPOS structures are often sensitive to temperature, light, humidity and organic gases. Also light-emitting TEMPOS structures have been produced. About 37 TEMPOS-based circuits such as thermosensors, photosensors, humidity and alcohol sensors, amplifiers, frequency multipliers, amplitude modulators, oscillators, flip-flops and many others have already been designed and successfully tested. Sometimes TEMPOS-based circuits are more compact than conventional electronics.

Charge storage and photoluminescence characteristics of silicon oxide embedded Ge nanocrystal trilayer structures

Abstract: Metal-oxide-semiconductor capacitors with a trilayer structure consisting of the cap gate oxide, sputtered SiGe layers and thermally grown tunnel oxide were fabricated on p-Si substrates. The trilayer structures were rapid thermal annealed at 1000 °C in nitrogen atmosphere for different durations. Cross-sectional transmission electron micrographs revealed the complete isolation of Ge nanocrystals in the sandwiched structure annealed for a longer duration. The optical and charge storage characteristics of trilayer structures were studied through photoluminescence spectroscopy and capacitance-voltage measurements, respectively. Under optimized annealing conditions, an enhancement of the charge storage capability of nanocrystals was observed in agreement with the optical emission characteristics.

Two-dimensional simulation of pattern-dependent oxidation of silicon nanostructures on silicon-on-insulator substrates

Abstract: Pattern-dependent oxidation (PADOX) of silicon nanostructures fabricated on silicon-on-insulator (SOI) substrates is simulated. In order to reproduce the characteristic features of PADOX in the simulation, the volume expansion due to silicon oxidation is treated as a dilational strain, and the strain is applied to a transition region in which silicon is converted to oxide. In addition, the silicon oxide and transition layer are treated as viscoelastic solids, and the stress dependencies of the oxidation reaction, oxygen self-diffusion in the oxide, and oxide viscosity are taken into account. The simulated silicon and oxide shapes after oxidation satisfactorily reproduce the experimental results. The simulation results suggest that the rounded silicon shapes that appear after oxidation are mainly caused by the stress-induced reduction of oxide viscosity. Moreover, we obtain oxidation-induced strain and stress from the simulation. Based on the strain obtained, the electron potential profile responsible for the operation of single-electron transistor (SET) is investigated. The compressive strain in the silicon wire region of SETs reduces the bandgap, and this reduction is critical for the formation of the potential profile responsible for SET operation.

Carbon nanotube memory cell for integrated circuit structure with removable side spacers to permit access to memory cell and process for forming such memory cell

Abstract: A carbon nanotube memory cell for an integrated circuit wherein a chamber is constructed in a layer of a dielectric material such as silicon nitride down to a first electrical contact. This chamber is filled with polysilicon. A layer of a carbon nanotube mat or ribbon is formed over the silicon nitride layer and the chamber. A dielectric material, such as an oxide layer, is formed over the nanotube strips and patterned to form an upper chamber down to the ribbon layer to permit the ribbon to move into the upper chamber or into the lower chamber. The upper chamber is then filled with polysilicon. A silicon nitride layer is formed over the oxide layer and a contact opening is formed down to the ribbon and filled with tungsten that is then patterned to form metal lines. Any exposed silicon nitride is removed. A polysilicon layer is formed over the tungsten lines and anisotropically etched to remove polysilicon on the horizontal surfaces but leave polysilicon sidewall spacers. A silicon oxide layer is deposited over the structure and also anisotropically etched forming silicon oxide sidewall spacers on the polysilicon sidewall spacers. The polysilicon is wet etched with an etchant selective to adjacent materials to remove the polysilicon sidewalls spacers and all of the polysilicon in the chambers. Silicon oxide is formed over the structure and into the upper portion of the openings to seal the now empty chambers. A passivation layer may then be formed.

Charge decay characteristics of silicon-oxide-nitride-oxide-silicon structure at elevated temperatures and extraction of the nitride trap density distribution

Abstract: We investigated the charge decay characteristics of a silicon-oxide-nitride-oxide-silicon type nonvolatile memory at elevated temperatures Based on the amphoteric trap model and the thermal emission model of the trapped charge, we propose an advanced charge decay model which includes the effect of the bottom oxide, and apply it to extraction of the trap density distribution in energy levels of the nitride layer The samples prepared have nitride films deposited simultaneously and are classified into two groups according to the thickness of the bottom oxide The trap density distributions extracted from two groups showed good consistency

Microstructure and Oxidation Behavior of Silicon Carbide Fibers Derived from Polycarbosilane

Abstract: Polycarbosilane-derived SiC fibers (CG Nicalon, Hi-Nicalon, and Hi-Nicalon type S) were exposed for 1–100 h at 1273–1673 K in air. Oxide layer growth and changes in tensile strength for these fibers were examined after exposure. The three types of SiC fibers decreased in strength as the oxide layer thickness increased. Fracture origins were located near the oxide layer–fiber interface. The Hi-Nicalon type S showed better oxidation resistance than the other polycarbosilane-derived SiC fibers after exposure in air at 1673 K for 10 h. This result was attributed to the nature of the silicon oxide layer on the surface of the SiC fibers.

Interface bonding structure of hafnium oxide prepared by direct sputtering of hafnium in oxygen

Abstract: The interface properties of the hafnium gate oxide films prepared by direct sputtering of hafnium in oxygen with rapid thermal annealing have been investigated in detail. X-ray photoelectron spectroscopy reveals that the interface silicate layer is a random mixture of Hf–O, Si–O, Hf–Si, and excess Hf and Si atoms. The contributions of these bonds to the composition of silicate layer are governed by the Si/Hf ratio. At low Si/Hf ratio ( 9) and close to the substrate, Hf–Si dominates and the high strain Hf–Si bonds govern the electrical properties of the interface. These results explain the observed high interface trap density at the HfO2/Si interface and the soft breakdown behavior which is different from the silicon oxide film.

Semiconductor device with effective heat-radiation

Abstract: The semiconductor device has a silicon layer (SOI layer) (12) formed through a silicon oxide film (11) on a support substrate (10). A transistor (T1) is formed in the SOI layer (12). The wiring (17 a) is connected with a source of the transistor (T1) through a contact plug (15 a). A back metal (18) is formed on an under surface (back surface) of the support substrate (10) and said back metal (18) is connected with the wiring (17 a) through a heat radiating plug (16). The contact plug (15 a), the heat radiating plug (16) the wiring (17 a) and the back metal (18) is made of a metal such as aluminum, tungsten and so on which has a higher thermal conductivity than that of the silicon oxide film (11) and the support substrate (10).

Silicon Monoxide Clusters: The Favorable Precursors for Forming Silicon Nanostructures

Abstract: Using density-functional calculations, we show that the energetically favorable configurations of silicon monoxide clusters $(\mathrm{S}\mathrm{i}\mathrm{O}{)}_{n}$ for $n\ensuremath{\ge}5$ facilitate the nucleation and growth of silicon nanostructures as the clusters contain $s{p}^{3}$ silicon cores surrounded by silicon oxide sheaths. The frontier orbitals of $(\mathrm{S}\mathrm{i}\mathrm{O}{)}_{n}$ clusters are localized to a significant degree on the silicon atoms on the surface, providing high reactivity for further stacking with other clusters. The oxygen atoms in the formed larger clusters prefer to migrate from the centers to the exterior surfaces, leading to the growth of $s{p}^{3}$ silicon cores.