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Showing papers on "Silicon oxide published in 2007"


Journal ArticleDOI
TL;DR: Atomic structures and nanoscale morphology of graphene-based electronic devices are revealed for the first time and a strong spatially dependent perturbation is revealed which breaks the hexagonal lattice symmetry of the graphitic lattice.
Abstract: We employ scanning probe microscopy to reveal atomic structures and nanoscale morphology of graphene-based electronic devices (i.e., a graphene sheet supported by an insulating silicon dioxide substrate) for the first time. Atomic resolution scanning tunneling microscopy images reveal the presence of a strong spatially dependent perturbation, which breaks the hexagonal lattice symmetry of the graphitic lattice. Structural corrugations of the graphene sheet partially conform to the underlying silicon oxide substrate. These effects are obscured or modified on graphene devices processed with normal lithographic methods, as they are covered with a layer of photoresist residue. We enable our experiments by a novel cleaning process to produce atomically clean graphene sheets.

1,497 citations


Journal ArticleDOI
TL;DR: In this article, the effect of VC as electrolyte additive on the electrochemical performance of Si film anode was studied and it was found that the SEI layer formed in VC-containing electrolyte possessed better properties.

382 citations


Patent
30 May 2007
TL;DR: In this paper, the authors described methods of depositing a silicon oxide layer on a substrate, which may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber and introducing the atomic oxygen precursors into the chamber.
Abstract: Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.

380 citations


Patent
29 May 2007
TL;DR: In this article, the authors described methods of making a silicon oxide layer on a substrate, which may include forming the silicon oxide on the substrate in a reaction chamber by reacting an atomic oxygen precursor and a silicon precursor.
Abstract: Methods of making a silicon oxide layer on a substrate are described. The methods may include forming the silicon oxide layer on the substrate in a reaction chamber by reacting an atomic oxygen precursor and a silicon precursor and depositing reaction products on the substrate. The atomic oxygen precursor is generated outside the reaction chamber. The methods also include heating the silicon oxide layer at a temperature of about 600°C or less, and exposing the silicon oxide layer to an induced coupled plasma. Additional methods are described where the deposited silicon oxide layer is cured by exposing the layer to ultra-violet light, and also exposing the layer to an induced coupled plasma.

337 citations


Patent
22 Oct 2007
TL;DR: In this article, the authors proposed a method of forming a silicon oxide layer on a substrate by providing a substrate and forming an oxide layer overlying at least a portion of the substrate including residual water, hydroxyl groups, and carbon species.
Abstract: A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

278 citations


Patent
22 Oct 2007
TL;DR: In this paper, a method of depositing a silicon and nitrogen containing film on a substrate was proposed, where the radical nitrogen and silicon-containing precursors react and deposit the silicon-and nitrogen-containing film on the substrate.
Abstract: A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.

272 citations


Patent
Jingmei Liang1
22 Oct 2007
TL;DR: In this article, a method for forming a semiconductor structure includes reacting a silicon precursor and an atomic oxygen or nitrogen precursor at a processing temperature of about 150° C. or less to form a silicon oxide or silicon-nitrogen containing layer over a substrate.
Abstract: A method for forming a semiconductor structure includes reacting a silicon precursor and an atomic oxygen or nitrogen precursor at a processing temperature of about 150° C. or less to form a silicon oxide or silicon-nitrogen containing layer over a substrate. The silicon oxide or silicon-nitrogen containing layer is ultra-violet (UV) cured within an oxygen-containing environment.

262 citations


Journal ArticleDOI
TL;DR: In this paper, SiO-based intermediate reflectors (SOIRs) can be fabricated in the same reactor and with the same process gases as used for thin-film silicon solar cells.
Abstract: We show that SiO-based intermediate reflectors (SOIRs) can be fabricated in the same reactor and with the same process gases as used for thin-film silicon solar cells. By varying input gas ratios, SOIR layers with a wide range of optical and electrical properties are obtained. The influence of the SOIR thickness in the micromorph cell is studied and current gain and losses are discussed. Initial micromorph cell efficiency of 12.2% (Voc=1.40V, fill factor=71.9%, and Jsc=12.1mA∕cm2) is achieved with top cell, SOIR, and bottom cell thicknesses of 270, 95, and 1800nm, respectively.

244 citations


Patent
25 Sep 2007
TL;DR: In this paper, an oxide film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas, including a silicon source gas and a second process gas including an oxidizing gas.
Abstract: An oxide film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including a silicon source gas and a second process gas including an oxidizing gas. The oxide film is formed by performing cycles each alternately including first and second steps. The first step performs supply of the first process gas, thereby forming an adsorption layer containing silicon on a surface of the target substrate. The second performs supply of the second process gas, thereby oxidizing the adsorption layer on the surface of the target substrate. The silicon source gas is a univalent or bivalent aminosilane gas, and each of the cycles is arranged to use a process temperature lower than that used for a trivalent aminosilane gas.

222 citations


Patent
23 May 2007
TL;DR: In this article, a silicon oxide layer is deposited on a substrate by chemical vapor deposition (CVD) by reacting an organoaminosilane precursor, selected from specified categories, with an oxidizing agent under conditions for the formation of a silicon dioxide film.
Abstract: A silicon oxide layer is deposited on a substrate by chemical vapor deposition (CVD) by reacting an organoaminosilane precursor, selected from specified categories, with an oxidizing agent under conditions for the formation of a silicon oxide film. Diisopropylaminosilane is the preferred organoaminosilane precursor for the formation of the silicon oxide film.

190 citations


Journal ArticleDOI
TL;DR: In this article, the electron transport in graphene at different carrier densities was investigated at different gate voltages and different temperature dependent resistivity behaviors were found in samples with high and low mobilities.
Abstract: We have investigated the electron transport in graphene at different carrier densities. Single layer graphene was fabricated into Hall bar shaped devices by mechanical extraction onto a silicon oxide/silicon substrate followed by standard microfabrication techniques. From magnetoresistance and Hall measurements, we measure the carrier density and mobility at different gate voltages. Different temperature dependent resistivity behaviors are found in samples with high and low mobilities.

Patent
27 Aug 2007
TL;DR: In this article, the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, including carbon species as a byproduct of formation are described.
Abstract: Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods may also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may also include removing the acidic vapor from the semiconductor processing chamber. Systems to deposit a silicon oxide layer on a substrate are also described.

Patent
28 Nov 2007
TL;DR: In this paper, a process for depositing a carbon containing silicon oxide film, or a silicon nitride film having enhanced etch resistance was described. But this process was performed using an organosilane precursor and a chemical modifier.
Abstract: The present invention discloses a process for depositing a carbon containing silicon oxide film, or a carbon containing silicon nitride film having enhanced etch resistance The process comprises using a silicon containing precursor, a carbon containing precursor and a chemical modifier The present invention also discloses a process for depositing a silicon oxide film, or silicon nitride film having enhanced etch resistance comprising using an organosilane precursor and a chemical modifier

Journal ArticleDOI
TL;DR: In this paper, a balanced-mass double-ended tuning fork (BDETF) was fabricated from 3C-SiC on a silicon substrate, achieving a selectivity of 5:1 and etch rate of 2500 Aring/min.
Abstract: In this paper, we present a silicon carbide MEMS resonant strain sensor for harsh environment applications. The sensor is a balanced-mass double-ended tuning fork (BDETF) fabricated from 3C-SiC deposited on a silicon substrate. The SiC was etched in a plasma etch chamber using a silicon oxide mask, achieving a selectivity of 5:1 and etch rate of 2500 Aring/min. The device resonates at atmospheric pressure and operates from room temperature to above 300degC. The device was also subjected to 10 000 g shock (out-of-plane) without damage or shift in resonant frequency. The BDETF exhibits a strain sensitivity of 66 Hz/muepsiv and achieves a strain resolution of 0.11 muepsiv in a bandwidth from 10 to 20 kHz, comparable to state-of-the-art silicon sensors

Journal ArticleDOI
TL;DR: In this paper, the authors performed a plasma diagnosis by means of optical emission spectroscopy in the plasma-enhanced chemical vapor deposition process for preparation of hydrocarbon-doped silicon oxide films.
Abstract: Plasma diagnosis was performed by means of optical emission spectroscopy in the plasma-enhanced chemical vapor deposition process for preparation of hydrocarbon-doped silicon oxide films. The chemical bonding states were characterized by a fourier-transform infrared spectrometer. Based on the results of the diagnosis in organosilane plasma and the chemical bonding states, a reaction model for the formation process of hydrocarbon-doped silicon oxide films was discussed. From the results of optical emission spectroscopy, we found that the oxygen atoms of methoxy groups in TMMOS molecules can be dissociated easily in the plasma and behave as a kind of oxidizing agent. Siloxane bondings in HMDSO, on the other hand, hardly expel oxygen atoms.

Journal ArticleDOI
TL;DR: In this article, a significant dependence of the morphology and charge carrier mobility of poly(2,5-bis(3-dodecylthiophene-2-yl)thieno[3,2-b]thionhene) (pBTTT) films on the substrate surface chemistry upon heating into its liquid crystal phase was reported.
Abstract: The authors report a significant dependence of the morphology and charge carrier mobility of poly(2,5-bis(3-dodecylthiophene-2-yl)thieno[3,2-b]thiophene) (pBTTT) films on the substrate surface chemistry upon heating into its liquid crystal phase. In contrast with films on bare silicon oxide surfaces, pBTTT films on oxide functionalized with octyltrichlorosilane exhibit substantial increases in the lateral dimensions of molecular terraces from nanometers to micrometers, increased orientational order, and higher charge carrier mobility. The large-scale crystallinity of this polymer plays an important role in the high carrier mobility observed in devices, but renders it more sensitive to substrate surface chemistry than other conjugated polymers.

Journal ArticleDOI
TL;DR: In this paper, the gate hysteresis of carbon nanotube field effect transistors (CNFETs) on silicon oxide substrates in an ultrahigh vacuum (UHV) at low temperatures was investigated.
Abstract: We have studied gate hysteresis of carbon nanotube field-effect transistors (CNFETs) on silicon oxide substrates in an ultrahigh vacuum (UHV) at low temperatures. It is found that the hysteresis is neither reduced by thermal annealing at temperatures over 300 °C under UHV nor significantly affected by independent adsorption of ammonia or water at T = 56 K. However, the hysteresis decreases greatly upon coadsorption of water and ammonia below condensation temperatures and restores completely with desorption of the adsorbed water layer. On the basis of these results, it is concluded that the main cause of gate hysteresis in CNFETs on silicon oxide substrate is charge transfer between the carbon nanotube and charge traps at the silicon oxide/ambient interface. We propose a mechanism for gate hysteresis that involves surface silanol groups as the major sources of screening charges. This surface silanol model is supported by results from scanning surface potential microscopy (SSPM).

Journal ArticleDOI
TL;DR: In this paper, a comparative analysis of the performance of garnet, aluminum oxide and silicon carbide during abrasive water-jet machining of glass was presented, which showed that the width of cut increases as the standoff distance of the nozzle from the work is increased.

Patent
Peter John Cousins1
09 Feb 2007
TL;DR: A silicon solar cell has doped amorphous silicon contacts formed on a tunnel silicon oxide layer on a surface of a silicon substrate as mentioned in this paper, which is unnecessary in fabricating the solar cell.
Abstract: A silicon solar cell has doped amorphous silicon contacts formed on a tunnel silicon oxide layer on a surface of a silicon substrate. High temperature processing is unnecessary in fabricating the solar cell.

Patent
19 Jul 2007
TL;DR: In this paper, the authors describe a producing method of a semiconductor device including loading at least one substrate into a processing chamber, forming a metal oxide film or a silicon oxide film on a surface of the substrate by repeatedly supplying a metal compound or silicon compound, each is a first material, an oxide material which is a second material including an oxygen atom, and a hydride material which are a third material, into the processing chamber predetermined times.
Abstract: Disclosed is a producing method of a semiconductor device including: loading at least one substrate into a processing chamber; forming a metal oxide film or a silicon oxide film on a surface of the substrate by repeatedly supplying a metal compound or a silicon compound, each of which is a first material, an oxide material which is a second material including an oxygen atom, and a hydride material which is a third material, into the processing chamber predetermined times; and unloading the substrate from the processing chamber.

Patent
20 Dec 2007
TL;DR: In this article, a pattern-forming method is proposed to form an objective pattern having a second line width finer than the first line width on the target object, which is then removed by a plasma oxidation process.
Abstract: A pattern forming method includes preparing a target object including silicon with an initial pattern formed thereon and having a first line width; performing a plasma oxidation process on the silicon surface inside a process chamber of a plasma processing apparatus and thereby forming a silicon oxide film on a surface of the initial pattern; and removing the silicon oxide film. The pattern forming method is arranged to repeatedly perform formation of the silicon oxide film and removal of the silicon oxide film so as to form an objective pattern having a second line width finer than the first line width on the target object.

Journal ArticleDOI
09 Jan 2007-Langmuir
TL;DR: The paper reports on the preparation of superhydrophobic amorphous silicon oxide nanowires (a-SiONWs) on silicon substrates with a contact angle greater than 150 degrees by means of surface roughness and self-assembly.
Abstract: The paper reports on the preparation of superhydrophobic amorphous silicon oxide nanowires (a-SiONWs) on silicon substrates with a contact angle greater than 150° by means of surface roughness and self-assembly. Nanowires with an average mean diameter in the range 20−150 nm and 15−20 μm in length were obtained by the so-called solid−liquid−solid (SLS) technique. The porous nature and the high roughness of the resulting surfaces were confirmed by AFM imaging. The superhydrophobicity resulted from the combined effects of surface roughness and chemical modification with fluorodecyl trichlorosilane.

Patent
30 Jul 2007
TL;DR: In this article, a method of forming a dielectric layer on a substrate includes providing a substrate having an exposed silicon oxide layer, treating an upper surface of the silicon oxide surface with a plasma, and depositing a silicon nitride layer on the treated silicon oxide sheet via atomic layer deposition.
Abstract: Methods of forming dielectric layers on a substrate comprising silicon and oxygen are disclosed herein. In some embodiments, a method of forming a dielectric layer on a substrate includes provide a substrate having an exposed silicon oxide layer; treating an upper surface of the silicon oxide layer with a plasma; and depositing a silicon nitride layer on the treated silicon oxide layer via atomic layer deposition. The silicon nitride layer may be exposed to a plasma nitridation process. The silicon oxide and silicon nitride layers may be subsequently thermally annealed. The dielectric layers may be used as part of a gate structure.

Journal ArticleDOI
TL;DR: In this paper, the effect of HF etching of the silicon oxide shell covering the surface of Si nanocrystals (NCs) on the subsequent room-temperature atmospheric oxidation of Si-NCs has been investigated by means of photoluminescence measurements, Fourier transform infrared spectroscopy, and electron paramagnetic resonance analysis.
Abstract: The effect of HF etching of the silicon oxide shell covering the surface of Si nanocrystals (NCs) on the subsequent room-temperature atmospheric oxidation of Si-NCs has been investigated by means of photoluminescence measurements, Fourier transform infrared spectroscopy, and electron paramagnetic resonance spectroscopy. After the HF etching, the surface of Si-NCs is found to be H terminated. The HF etching also restructures the surface of Si-NCs. This leads to a decrease in the incorporation of O during subsequent oxidation, which finally results in silicon suboxide $\mathrm{Si}{\mathrm{O}}_{1.9}$. In contrast, without the HF etching stoichiometric $\mathrm{Si}{\mathrm{O}}_{2}$ is formed. A smaller ratio of O to Si in the silicon oxide results in a higher density of defects. This contributes to a more significant oxidation-induced decrease in the intensity of photoluminescence from Si-NCs after the HF etching than without the HF etching.

Journal ArticleDOI
TL;DR: First demonstration of guiding light in vertical slot-waveguides on silicon nitride/silicon oxide material system and group index behavior evidences guiding and confinement in the low-index slot region at O-band (1260-1370nm) telecommunication wavelengths.
Abstract: We report on the first demonstration of guiding light in vertical slot-waveguides on silicon nitride/silicon oxide material system. Integrated ring resonators and Fabry-Perot cavities have been fabricated and characterized in order to determine optical features of the slot-waveguides. Group index behavior evidences guiding and confinement in the low-index slot region at O-band (1260–1370nm) telecommunication wavelengths. Propagation losses of <20 dB/cm have been measured for the transverse-electric mode of the slot-waveguides.

Journal ArticleDOI
TL;DR: In this paper, the physical structure of the resulting nanocomposite membranes were characterized using small and wide-angle X-ray scattering, small angle neutron scattering, positron annihilation lifetime spectroscopy, and transmission electron microscopy.
Abstract: Nafion nanocomposite membranes were prepared from Nafion 117 and a systematic range of organically functionalized silicon alkoxide precursors using an in situ sol gel synthesis technique. The physical structure of the resulting nanocomposite membranes were characterized using small and wide-angle X-ray scattering, small angle neutron scattering, positron annihilation lifetime spectroscopy, and transmission electron microscopy. A structural model is proposed for three typical nanocomposite membranes (Nafion-TEOS, Nafion-MPTMS and Nafion-MPMDMS). The proton and methanol transport properties of the membranes included in the model were evaluated by impedance spectroscopy and pervaporation experiments, respectively, and correlated to their composite microstructure. In particular, this model explains the increased selectivity for transport over protons for nanocomposite membranes produced using (3-mercaptopropyl)methyldimethoxysilane as the silicon alkoxide precursor, which is more than six times higher than that of Nafion 117.

Patent
22 Mar 2007
TL;DR: In this paper, a silicon-silicon oxide-lithium composite was used as a negative electrode material for a lithium ion secondary cell having a high initial efficiency and improved cycle performance.
Abstract: A silicon-silicon oxide-lithium composite comprises a silicon-silicon oxide composite having such a structure that silicon grains having a size of 0.5-50 nm are dispersed in silicon oxide, the silicon-silicon oxide composite being doped with lithium. Using the silicon-silicon oxide-lithium composite as a negative electrode material, a lithium ion secondary cell having a high initial efficiency and improved cycle performance can be constructed.

Journal ArticleDOI
TL;DR: The "soft-etch" method described is generally useful for the preparation of templates and nanostructures that are sensitive to more aggressive template removal processes.
Abstract: Nanoporous poly(4-fluorostyrene) templates on gold-coated silicon/silicon oxide substrates were prepared by the electric field alignment of poly(4-fluorostyrene)-b-poly(D,L-lactide) block copolymer thin films followed by mild degradation of the polylactide phase using dilute aqueous base. Electrochemical deposition of nanowires was accomplished using a protocol for the preparation of copper oxide. Freestanding nanowires were observed after removal of the template by either simple dissolution of the poly(4-fluorostyrene) or by treatment with UV irradiation. The annealing time, the electric field strength used to align the block copolymer films, and the template removal method are shown to influence the freestanding nanowire arrays. The “soft-etch” method described is generally useful for the preparation of templates and nanostructures that are sensitive to more aggressive template removal processes.

Journal ArticleDOI
TL;DR: In this paper, a comprehensive picture of the nucleation process has been obtained, demonstrating the active role played by the hydrogen and nitrogen atoms in the formation of Si-nc and in the thermally induced evolution of the deposited films.
Abstract: Silicon-rich silicon oxide films deposited by plasma enhanced chemical vapor deposition with different total Si contents (from 39to46at.%) have been annealed at increasing temperature (up to 1250°C) in order to study the Si nanocrystal (Si-nc) nucleation as well as the structural changes induced in the amorphous embedding matrix. The comparison between x-ray absorption measurements in total electron yield mode, Raman spectroscopy, and photoluminescence spectra allowed us to gain insight about the Si nanocrystal formation, while the chemical composition and the nature of chemical bonds into the oxidized matrix was studied by Fourier transform infrared spectroscopy. A comprehensive picture of the nucleation process has been obtained, demonstrating the active role played by the hydrogen and nitrogen atoms in the formation of Si-nc and in the thermally induced evolution of the deposited films.

Journal ArticleDOI
TL;DR: Local oxidation nanolithography (LON) as discussed by the authors allows the fabrica-tion of templates as well as a variety of electronic, optical, andmechanical nanoscale devices.
Abstract: bet on a silicon oxide template while the rest ofthe macroscopic surface remains free of molecules. Local oxi-dation was used to fabricate silicon oxide nanopatterns, eitherdots or stripes, over a Si (100) surface coated with a SAM.Their width ranged from 30 to 500 nm whereas the lengthcould be modified from a few nanometers up to several mi-crometers. Nanoscale direct assembly arose from a combina-tion of three factors: i) the strength of the attractive electro-static interactions between the molecules and the local oxides;ii) the weak repulsive interaction between the molecules andthe unpatternedsurface; and iii) the size of the nanopattern.Local oxidation nanolithography (LON) allows the fabrica-tion of templates as well as a variety of electronic, optical, andmechanical nanoscale devices.