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Showing papers on "Silicon oxide published in 2008"


Journal ArticleDOI
TL;DR: In this paper, an atomic layer-deposited aluminium oxide (Al2O3) is applied as rear surface-passivating dielectric layer to passivated emitter and rear cell (PERC)-type crystalline silicon (c-Si) solar cells.
Abstract: Atomic-layer-deposited aluminium oxide (Al2O3) is applied as rear-surface-passivating dielectric layer to passivated emitter and rear cell (PERC)-type crystalline silicon (c-Si) solar cells. The excellent passivation of low-resistivity p-type silicon by the negative-charge-dielectric Al2O3 is confirmed on the device level by an independently confirmed energy conversion efficiency of 20·6%. The best results are obtained for a stack consisting of a 30 nm Al2O3 film covered by a 200 nm plasma-enhanced-chemical-vapour-deposited silicon oxide (SiOx) layer, resulting in a rear surface recombination velocity (SRV) of 70 cm/s. Comparable results are obtained for a 130 nm single-layer of Al2O3, resulting in a rear SRV of 90 cm/s. Copyright © 2008 John Wiley & Sons, Ltd.

445 citations


Journal ArticleDOI
23 Oct 2008-Langmuir
TL;DR: Parameters important to the self-assembly of 3-(aminopropyl)triethoxysilane (APTES) on chemically grown silicon oxide (SiO 2) to form an aminopropylene silane (APS) film have been investigated using in situ infrared (IR) absorption spectroscopy.
Abstract: Parameters important to the self-assembly of 3-(aminopropyl)triethoxysilane (APTES) on chemically grown silicon oxide (SiO2) to form an aminopropyl silane (APS) film have been investigated using in situ infrared (IR) absorption spectroscopy. Preannealing to ∼70 °C produces significant improvements in the quality of the film: the APS film is denser, and the Si−O−Si bonds between the molecules and the SiO2 surface are more structured and ordered with only a limited number of remaining unreacted ethoxy groups. In contrast, post-annealing the functionalized SiO2 samples after room temperature reaction with APTES (i.e., ex situ annealing) does not lead to any spectral change, suggesting that post-annealing has no strong effect on the horizontal polymerization as suggested earlier. Both IR and ellipsometry data show that the higher the solution temperature, the denser and thinner the APS layer is for a given immersion time. Finally, the APS layer obtained by preannealing the solution at 70 °C exhibits a better ...

412 citations


Patent
02 May 2008
TL;DR: In this paper, a method of removing at least a portion of a silicon oxide material is described, which is removed by exposing a semiconductor structure comprising a substrate and the silicon oxide to an ammonium fluoride chemical treatment and subsequent plasma treatment, both of which may be effected in the same vacuum chamber of a processing apparatus.
Abstract: A method of removing at least a portion of a silicon oxide material is disclosed. The silicon oxide is removed by exposing a semiconductor structure comprising a substrate and the silicon oxide to an ammonium fluoride chemical treatment and a subsequent plasma treatment, both of which may be effected in the same vacuum chamber of a processing apparatus. The ammonium fluoride chemical treatment converts the silicon oxide to a solid reaction product in a self-limiting reaction, the solid reaction product then being volatilized by the plasma treatment. The plasma treatment includes a plasma having an ion bombardment energy of less than or equal to approximately 20 eV. An ammonium fluoride chemical treatment including an alkylated ammonia derivative and hydrogen fluoride is also disclosed.

302 citations


Patent
31 Mar 2008
TL;DR: In this paper, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer over an inter-poly dielectric stack disposed over a silicon oxide layer, and a control gate poly silicon layer over the second aluminum oxide layer.
Abstract: Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.

228 citations


Patent
26 Feb 2008
TL;DR: In this paper, a process of plasma enhanced cyclic chemical vapor deposition of silicon nitride, silicon carbonitride and silicon oxynitride from alkylaminosilanes having Si-H 3, preferably of the formula (RR 1 N)SiH 3 wherein R and R 1 are selected independently from C 2 to C 10, and a nitrogen or oxygen source, preferably ammonia or oxygen, which has been developed to provide films with improved properties such as etching rate, hydrogen concentrations, and stress as compared to films from thermal chemical vap deposition.
Abstract: The present invention is a process of plasma enhanced cyclic chemical vapor deposition of silicon nitride, silicon carbonitride, silicon oxynitride, silicon carboxynitride, and carbon doped silicon oxide from alkylaminosilanes having Si-H 3 , preferably of the formula (RR 1 N)SiH 3 wherein R and R 1 are selected independently from C 2 to C 10 , and a nitrogen or oxygen source, preferably ammonia or oxygen, which has been developed to provide films with improved properties such as etching rate, hydrogen concentrations, and stress as compared to films from thermal chemical vapor deposition.

208 citations


Patent
23 Jul 2008
TL;DR: In this paper, the authors described a process for depositing a silicon oxide film using a mixture of atomic layer deposition (ALD) and chemical vapor deposition (CVD), which is a pulsed hybrid method between ALD and CVD.
Abstract: Methods of depositing a silicon oxide film are disclosed. One embodiment is a plasma enhanced atomic layer deposition (PEALD) process that includes supplying a vapor phase silicon precursor, such as a diaminosilane compound, to a substrate, and supplying oxygen plasma to the substrate. Another embodiment is a pulsed hybrid method between atomic layer deposition (ALD) and chemical vapor deposition (CVD). In the other embodiment, a vapor phase silicon precursor, such as a diaminosilane compound, is supplied to a substrate while ozone gas is continuously or discontinuously supplied to the substrate.

180 citations


Patent
06 Jun 2008
TL;DR: In this article, the problem of the formation of a fine pattern capable of forming a pattern having a width smaller than a resolution limit by a small number of manufacturing processes is addressed.
Abstract: PROBLEM TO BE SOLVED: To provide a formation method of a fine pattern capable of forming a fine pattern having a width smaller than a resolution limit by a small number of manufacturing processes. SOLUTION: In this formation method of a fine pattern, a thin film 102 is formed on a substrate 101; a resist film 103 is formed on the thin film 102; the resist film 103 is processed into patterns 103' having a predetermined interval by using a photolithography technique; and a silicon oxide film 105 different from the thin film 102 and the resist films 103' is formed on the processed resist films 103' and the thin film 102 by alternately supplying a source gas containing organic silicon and activated oxygen species. Sidewall spacers 105' are formed on sidewalls of the processed resist films 103' by retreating the silicon oxide film 105, and the thin film 102 is processed by removing the processed resist films 103' and using the sidewall spacers 105' as a mask. COPYRIGHT: (C)2009,JPO&INPIT

174 citations


Journal ArticleDOI
TL;DR: A general route to fabricate highly ordered arrays of nanoscopic silicon oxide dots and stripes (see figure) from block copolymer thin films is described in this article, where cylindrical microdomains oriented normal and parallel to the surface are used as templates for the fabrication of nanoscale silicon oxide, with polydimethylsiloxane as the inorganic precursor.
Abstract: A general route to fabricate highly ordered arrays of nanoscopic silicon oxide dots and stripes (see figure) from block copolymer thin films is described. Poly(styrene-b-4-vinylpyridine) thin films with cylindrical microdomains oriented normal and parallel to the surface were used as templates for the fabrication of nanoscopic silicon oxide, with polydimethylsiloxane as the inorganic precursor.

170 citations


Patent
30 Jun 2008
TL;DR: In this article, a plurality of vertically separated substrates is provided in a reaction chamber, where Tetraethyl orthosilicate (TEOS) is pulsed into the reaction chamber by direct liquid injection.
Abstract: Methods for depositing silicon oxide in a batch reactor are provided. In some embodiments, a plurality of vertically separated substrates is provided in a reaction chamber. Tetraethyl orthosilicate (TEOS) is pulsed into the reaction chamber by direct liquid injection. Ozone is flowed into the reaction chamber simultaneously or alternately with the TEOS. The deposition is performed at about 10 Torr or less to extend the mean free path length of the ozone molecules. According to some embodiments, the deposition allows openings in the substrates to be filled while the occurrence of voids is maintained at a low level.

157 citations


Journal ArticleDOI
TL;DR: This work describes a practical ALD process for SiO2 that overcomes limitations and describes a three-step reaction sequence based on 3-aminopropyltriethoxysilane, water, and ozone (O3) that can be envisioned for the ALD ofSiO2.
Abstract: The outstanding chemical, electrical, and optical properties of silicon dioxide have made it ubiquitous in science and technology. The ability to create SiO2 nanostructures of well-defined geometry would broaden its range of applications even further, in particular in the chemical, electrokinetic, and biomedical realms. Atomic layer deposition (ALD) is especially suited to nanostructuring, since its kinetics are controlled by surface chemistry rather than mass transport from the gas phase. However, reports on the ALD of silica are few and far between in the open literature to date. All published reactions suffer from some weakness: a corrosive by-product or catalyst, poor reproducibility, or impurities in the deposited film. Herein, we describe a practical ALD process for SiO2 that overcomes such limitations. Based on the NH3-catalyzed hydrolysis of tetraethoxysilane (Si(OEt)4), chemical intuition dictates that a triethoxysilane bearing an aminoalkyl moiety be readily hydrolyzed without any extraneous catalyst. The basic functionality will labilize the strong Si!O bonds, a phenomenon that can be called “self-catalysis” to emphasize the fact that one chemical species is both substrate and catalyst. Subsequent oxidative cleavage of the tethered moiety should afford a silanol, amenable to further reaction with aminoalkyltriethoxysilane molecules. Accordingly, a three-step reaction sequence based on 3-aminopropyltriethoxysilane, water, and ozone (O3) can be envisioned for the ALD of SiO2 (Scheme 1).

135 citations


Patent
28 Feb 2008
TL;DR: In this paper, a shallow trench is formed on the surface of a semiconductor substrate composed of silicon to surround an element placement region by etching processing that uses a silicon oxide film 12 and a silicon nitride film 14 as a selection mask.
Abstract: PROBLEM TO BE SOLVED: To improve flatness of a substrate surface by a shallow trench isolation method. SOLUTION: According to the semiconductor device manufacturing method, a trench 16 is formed on the surface of a semiconductor substrate 10 composed of silicon to surround an element placement region 10a by etching processing that uses a silicon oxide film 12 and a silicon nitride film 14 as a selection mask. Thereafter, a CVD oxide film is formed to embed the trench 16. The CVD oxide film is removed to be flat by CMP processing, and part of the CVD oxide film 18a is left in the trench 16. Anneal processing after implanting Ar + on top surface of the substrate reduces an etch rate of the surface of the film 18a. After the selection mask comprising the films 12, 14 is removed, a silicon oxide film is formed as a sacrifice film, and the sacrifice film is etch-removed. The amount of film 18a reduced by the etching is small, making an element separation region comprising the film 18a substantially flush with the element placement region 10a. COPYRIGHT: (C)2008,JPO&INPIT

Journal ArticleDOI
TL;DR: In this paper, the free-carrier-absorption (FCA) as noncarrier generating absorption channel is analyzed for solar cells with varying thickness, silicon oxide layer thickness, rear side topography as well as passivation layers (SiO2, SiNx, SiC and stack systems).
Abstract: New passivation layers for the back side of silicon solar cells have to show high performance in terms of electrical passivation as well as high internal reflectivity. This optical performance is often shown as values for the back side reflectance Rb which describes the rear internal reflection. In this paper, we investigate in detail the meaning of this single-value parameter, its correct determination and the use in one-dimensional simulations with PC1D. The free-carrier-absorption (FCA) as non-carrier-generating absorption channel is analyzed for solar cells with varying thickness. We apply the optical analysis to samples with different thickness, silicon oxide layer thickness, rear side topography as well as passivation layers (SiO2, SiNx, SiC and stack systems). Additionally, the optical influence of the laser-fired contacts (LFC) process is experimentally investigated. Finally, we show that with correct parameters, the one-dimensional simulation of very thin silicon solar cells can successfully be performed. Copyright © 2007 John Wiley & Sons, Ltd.

Journal ArticleDOI
TL;DR: In this paper, the authors presented a PVLAB-LAB-ARTICLE-2008-002, which is the first PV-LAB article to use the PssR algorithm.
Abstract: Note: IMT-NE Number: 488 Reference PV-LAB-ARTICLE-2008-002doi:10.1002/pssr.200802118 Record created on 2009-02-10, modified on 2017-05-10

Patent
15 Jul 2008
TL;DR: In this article, a plasma treatment method for converting boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer to gas phase compounds was proposed.
Abstract: Formation of BPSG surface defects upon exposure to atmosphere is prevented by a plasma treatment method for converting boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer to gas phase compounds. The treatment plasma is generated from a treatment process gas containing one of (a) a fluorine compound or (b) a hydrogen compound.

Journal ArticleDOI
TL;DR: In this paper, the elastomechanical properties of high-k materials such as HfO 2 and Al 2 O 3 on (100) p-type Si wafers were investigated using nanoindentation and continuous stiffness method.
Abstract: The challenges of reducing gate leakage current and dielectric breakdown beyond the 45 nm technology node have shifted engineers' attention from the traditional and proven dielectric SiO 2 to materials of higher dielectric constant also known as high-k materials such as hafnium oxide (HfO 2 ) and aluminum oxide (Al 2 O 3 ). These high-k materials are projected to replace silicon oxide (SiO 2 ). In order to address the complex process integration and reliability issues, it is important to investigate the mechanical properties of these dielectric materials in addition to their electrical properties. In this study, HfO 2 and Al 2 O 3 have been fabricated using atomic layer deposition (ALD) on (100) p-type Si wafers. Using nanoindentation and the continuous stiffness method, we report the elastomechanical properties of HfO 2 and Al 2 O 3 on Si. ALD HfO 2 thin films were measured to have a hardness of 9.5 ± 2 GPa and a modulus of 220 ± 40 GPa, whereas the ALD Al 2 O 3 thin films have a hardness of 10.5 ± 2 GPa and a modulus of 220 ± 40 GPa. The two materials are also distinguished by very different interface properties. HfO 2 forms a hafnium silicate interlayer, which influences its nanoindentation properties close to the interface with the Si substrate, while Al 2 O 3 does not exhibit any interlayer.

Journal ArticleDOI
TL;DR: In this article, a new method of solid-state epitaxy of silicon carbide (SiC) on silicon (Si) is proposed theoretically and realized experimentally, and a model is proposed for relaxation of elastic stresses in a film favored by vacancies and pores in the substrate.
Abstract: A new method of solid-state epitaxy of silicon carbide (SiC) on silicon (Si) is proposed theoretically and realized experimentally. Films of various polytypes of SiC on Si(111) grow through a chemical reaction (at T = 1100–1400°C) between single-crystal silicon and gaseous carbon oxide CO (at p = 10–300 Pa). Some silicon atoms transform into gaseous silicon oxide SiO and escape from the system, which brings about the formation of vacancies and pores in the silicon near the interface between the silicon and the silicon carbide. These pores provide significant relaxation of the elastic stresses caused by the lattice misfit between Si and SiC. X-ray diffraction, electron diffraction, and electron microscopy studies and luminescence analysis showed that the silicon carbide layers are epitaxial, homogeneous over the thickness, and can contain various polytypes and a mixture of them, depending on the growth conditions. The typical pore size is 1 to 5 μm at film thicknesses of ∼20 to 100 nm. Thermodynamic nucleation theory is generalized to the case where a chemical reaction occurs. Kinetic and thermodynamic theories of this growth mechanism are constructed, and the time dependences of the number of new-phase nuclei, the concentrations of chemical components, and the film thickness are calculated. A model is proposed for relaxation of elastic stresses in a film favored by vacancies and pores in the substrate.

Journal ArticleDOI
TL;DR: In this article, the authors show that the atomistic changes of the chemical bonding in a nanoscale breakdown path are extensive and irreversible, and that the oxygen deficiency within the breakdown path is estimated to be as high as 50% to 60%.
Abstract: Dielectric breakdown is the process of local materials transiting from insulating to conductive when the dielectric is submerged in a high external electric field environment. We show that the atomistic changes of the chemical bonding in a nanoscale breakdown path are extensive and irreversible. Oxygen atoms in dielectric SiO2 are washed out with substoichiometric silicon oxide (SiOx with x<2) formation, and local energy gap lowering with intermediate bonding state of silicon atoms (Si1+, Si2+, and Si3+) in the percolation leakage path. Oxygen deficiency within the breakdown path is estimated to be as high as 50%–60%.

Patent
07 Mar 2008
TL;DR: In this paper, the authors proposed a method for removing silicon nitride and elemental silicon during contact preclean process, which involves converting these materials to materials that are more readily etched by fluoride-based etching methods, and subsequently removing the converted materials by a fluoride based etch.
Abstract: Methods for removing silicon nitride and elemental silicon during contact preclean process involve converting these materials to materials that are more readily etched by fluoride-based etching methods, and subsequently removing the converted materials by a fluoride-based etch. Specifically, silicon nitride and elemental silicon may be treated with an oxidizing agent, e.g., with an oxygen-containing gas in a plasma, or with O 2 or O 3 in the absence of plasma to produce a material that is more rich in Si—O bonds and is more easily etched with a fluoride-based etch. Alternatively, silicon nitride or elemental silicon may be doped with a number of doping elements, e.g., hydrogen, to form materials which are more easily etched by fluoride based etches. The methods are particularly useful for pre-cleaning contact vias residing in a layer of silicon oxide based material because they minimize the unwanted increase of critical dimension of contact vias.

Journal ArticleDOI
TL;DR: In this article, the sealing mechanism of silicon bonding interfaces is reported as a function of annealing temperature, and details of the structural and chemical interface evolution are obtained for hydrophilic silicon/silicon and silicon-silicon dioxide wafer bonding, using x-ray reflectivity and infrared spectroscopy.
Abstract: The sealing mechanism of silicon bonding interfaces is reported as a function of annealing temperature. Details of the structural and chemical interface evolution are obtained for hydrophilic silicon/silicon and silicon/silicon dioxide wafer bonding, using x-ray reflectivity and infrared spectroscopy. A two-step mechanism is demonstrated: first a partial sealing of the interface driven by cross-wafer silanol bond condensation and second a water evacuation via oxide formation at the silicon oxide interface.

Patent
Masayuki Kuroda1, Tetsuzo Ueda1
04 Mar 2008
TL;DR: In this paper, a method for manufacturing a nitride semiconductor device with excellent heat dissipation characteristics and great crystallinity and a method of manufacturing thereof is provided. But, the method is based on vapordepositing a diamond layer on a silicon substrate, bonding an SOI substrate on a surface of the diamond layer, thinning the substrate, epitaxially growing an GaN layer on the thinned substrate, removing the silicon substrate and bonding, a material having a thermal conductivity greater than the thermal conductivities of the substrate.
Abstract: A nitride semiconductor device mainly made of a nitride semiconductor material having excellent heat dissipation characteristics and great crystallinity and a method for manufacturing thereof are provided. The method for manufacturing the nitride semiconductor includes vapor-depositing a diamond layer on a silicon substrate, bonding an SOI substrate on a surface of the diamond layer, thinning the SOI substrate, epitaxially growing an GaN layer on the thinned SOI substrate, removing the silicon substrate, and bonding, on a rear-surface of the diamond layer, a material having a thermal conductivity greater than a thermal conductivity of the silicon substrate. The SOI substrate has an outermost surface layer and a silicon oxide layer. In the thinning, the SOI substrate is thinned by selectively removed through the silicon oxide layer, so that only the outermost surface layer is left.

Journal ArticleDOI
TL;DR: In this article, a wet oxidation in steam ambience is applied and experimentally compared to a standard dry oxidation to improve the cost-effectiveness of the oxidation process, and 19.3% efficiency is obtained as best value on 4cm 2 cell area.
Abstract: Thermal oxides are commonly used for the surface passivation of high-efficiency silicon solar cells from mono- and multicrystalline silicon and have led to the highest conversion efficiencies reported so far. In order to improve the cost-effectiveness of the oxidation process, a wet oxidation in steam ambience is applied and experimentally compared to a standard dry oxidation. The processes yield identical physical properties of the oxide. The front contact is created using a screen-printing process of a hotmelt silver paste in combination with light-induced silver plating. The contact formation on the front requires a short high-temperature firing process, therefore the thermal stability of the rear surface passivation is very important. The surface recombination velocity of the fired oxide is experimentally determined to be below S ≤ 38 cm/s after annealing with a thin layer of evaporated aluminium on top. Monocrystalline solar cells are produced and 19.3% efficiency is obtained as best value on 4cm 2 cell area. Simulations show the potential of the developed process to approach 20% efficiency.

Journal ArticleDOI
TL;DR: In this paper, the aluminum buffer layer on insulating/semiconducting silicon oxide/silicon wafer resulted in a higher growth rate, narrower diameter distribution, neater morphology and improved crystalline quality of MWCNTs.
Abstract: Aligned multi-walled carbon nanotubes (MWCNTs) were synthesized by floating catalyst chemical vapor deposition on two types of substrates, with emphasis on the effects of an aluminum buffer layer. It has been revealed that the presence of the aluminum buffer layer on insulating/semiconducting silicon oxide/silicon wafer resulted in a higher growth rate, narrower diameter distribution, neater morphology and improved crystalline quality of MWCNTs. When an aluminum buffer layer is deposited on electrically conductive carbon paper, high yield CNTs can be achieved while no CNTs can be observed without this buffer layer. Morphology, structure and chemical states of the products were examined by field-emission scanning electron microscopy, transmission electron microscopy and X-ray photoelectron spectroscopy. The generation of alumina from the aluminum buffer layer is thought to play an important role in promoting the nanotube growth. Detailed growth mechanism of MWCNTs was also discussed.

Patent
22 May 2008
TL;DR: In this paper, the authors proposed a semiconductor memory device with an element isolation insulating layer 14 on a silicon board and a gate electrode 30 coating at least both side faces of the semiconductor 20 forming the channel region 22.
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor memory device preventing a malfunction. SOLUTION: The semiconductor memory device has a board 10 having an element isolation insulating layer 14 on a silicon board 12, a semiconductor 20 formed in a projecting shape on the board 10, a channel region 22 formed in the projecting-shaped semiconductor 20 and a source region 24 and a drain region 26 formed in the semiconductor 20 so as to hold the channel region 22. The semiconductor storage device further has resistance-changing regions 28 formed in the semiconductor 20 so as to be held by at least one of a section between the channel region 22 and the source region 24 and a section between the channel region 22 and the drain region 26 and a gate electrode 30 coating at least both side faces of the semiconductor 20 forming the channel region 22. The semiconductor storage device further has charge storage layers 40 coating at least both side faces of the semiconductor 20 forming the resistance-changing regions 28 and containing first silicon oxide layers, silicon nitride layers 44 formed on the first silicon oxide layers 42 and silicon oxide layers 46 formed on the silicon nitride layers. COPYRIGHT: (C)2008,JPO&INPIT

Patent
20 Oct 2008
TL;DR: In this article, a method of depositing a silicon oxide layer over a substrate includes providing a substrate to a deposition chamber, where a first silicon-containing precursor, a second siliconcontaining precursor and a NH3 plasma are reacted to form a silicon dioxide layer.
Abstract: A method of depositing a silicon oxide layer over a substrate includes providing a substrate to a deposition chamber. A first silicon-containing precursor, a second silicon-containing precursor and a NH3 plasma are reacted to form a silicon oxide layer. The first silicon-containing precursor includes at least one of Si-H bond and Si-Si bond. The second silicon-containing precursor includes at least one Si-N bond. The deposited silicon oxide layer is annealed.

Journal ArticleDOI
TL;DR: This work investigates the oxidation of straight, massively parallel, metallic Si nanowires and identifies four new oxidation states on the oxidized part, which show a gap opening, thus revealing the formation of a transverse internal nanojunction.
Abstract: Silicon oxide nanowires hold great promise for functional nanoscale electronics. Here, we investigate the oxidation of straight, massively parallel, metallic Si nanowires. We show that the oxidation process starts at the Si NW terminations and develops like a burning match. While the spectroscopic signatures on the virgin, metallic part, are unaltered we identify four new oxidation states on the oxidized part, which show a gap opening, thus revealing the formation of a transverse internal nanojunction.

Journal ArticleDOI
TL;DR: The average molecular orientation in the adsorbed water layers formed on amorphous SiO(2) in ambient conditions was determined as a function of relative humidity using polarization attenuated total reflectance infrared spectroscopy (ATR-IR).
Abstract: The average molecular orientation in the adsorbed water layers formed on amorphous SiO2 in ambient conditions was determined as a function of relative humidity using polarization attenuated total reflectance infrared spectroscopy (ATR-IR). The silicon oxide surface was prepared by chemically cleaning in aqueous solution, washing with water, and drying with argon. After drying, this produced a SiO2 surface with hydroxyl groups, giving rise to a water contact angle <5°. Primarily two types of vibrational peaks that correspond to liquid water and solid-like water were observed in the adsorbed water layers formed on this surface at room temperature. The average orientation of the water molecules was determined from the dichroic ratio of s- to p-polarization absorbances. At low relative humidities, the highly hydrogen bonded solid-like structure exhibits a dichroic ratio as low as ∼0.4, while the liquid water structure exhibits a dichroic ratio close to ∼1.0. As the relative humidity increases, the dichroic ratio of both water structures approaches a dichroic ratio of 0.7∼0.8, which is consistent with the random orientation of molecules of bulk water and ice.

Journal ArticleDOI
TL;DR: It is demonstrated that full noncontact monitoring of chemical solutions is possible using the laser-terahertz emission system and the amplitude of the terahertz emitters increased with increasing pH value.
Abstract: A new type of laser-terahertz emission system for noncontact investigations of chemical solutions has been developed. The system monitors terahertz emission from a sensing plate, which consists of silicon oxide and silicon thin film layers on a sapphire substrate. Sensing of chemical solutions with pH values between 1.68 and 10.01 was demonstrated. The amplitude of the terahertz emission from the sensing plate increased with increasing pH value. This change in the amplitude was caused by a change in the depletion layers of the silicon thin film when protons were adsorbed on the surface of the sensing plate. This study demonstrates that full noncontact monitoring of chemical solutions is possible using the laser-terahertz emission system.

Journal ArticleDOI
TL;DR: The fabrication of nanometric patterns on silicon surfaces by using the parallel-local anodic oxidation technique with soft stamps yields silicon oxide nanostructures 15 nm high, namely at least five times higher than the nanostructure made with local anodic oxidation using atomic force microscopy, and thanks to the size of the stamp enables one to pattern the surface across a centimetre length scale.
Abstract: We investigate the fabrication of nanometric patterns on silicon surfaces by using the parallel-local anodic oxidation technique with soft stamps This method yields silicon oxide nanostructures 15 nm high, namely at least five times higher than the nanostructures made with local anodic oxidation using atomic force microscopy, and thanks to the size of the stamp enables one to pattern the surface across a centimetre length scale To implement this technique, we built a machine to bring the metallized polydimethylsiloxane stamp in contact with the silicon surface, subsequently inserted in a sealed chamber with controlled relative humidity The oxide nanostructures are fabricated when a bias voltage of 36 V is applied between the stamp and the silicon for 2 min, with a relative humidity of 90% The flexibility of the stamp enables a homogeneous conformal contact with the silicon surface, resulting in an excellent reproducibility of the process Moreover, by means of two subsequent oxidations with the same stamp and just rotating the sample, we are able to fabricate complex nanostructures Finally, a detailed study of the oxidation mechanism, also using a finite element analysis, has been performed to understand the underlying mechanism

Journal ArticleDOI
TL;DR: In this article, the authors used an electrochemical detector to determine the oxygen permeation barrier of polyethylene terephthalate (PET) films by measuring the carrier gas using an electrostatic detector.
Abstract: Silicon oxide barrier layers are deposited on polyethylene terephthalate as permeation barriers for food packaging applications by means of a low pressure microwave plasma. Hexamethyldisiloxane (HMDSO) and oxygen are used as process gases to deposit SiOx coatings via pulsed low pressure plasmas. The layer composition of the coating is investigated by Fourier transform infrared spectroscopy and energy dispersive x-ray spectroscopy to show correlations with barrier properties of the films. The oxygen permeation barrier is determined by the carrier gas method using an electrochemical detector. The transition from low to high barrier films is mapped by the transition from organic SiOxCyHz layers to quartz-like SiO1.7 films containing silanol bound hydrogen. A residual permeation as low as J = 1 ± 0.3 cm3 m−2 day−1 bar−1 is achieved, which is a good value for food packaging applications. Additionally, the activation energy Ep of oxygen permeation is analysed and a strong increase from Ep = 31.5 kJ mol−1 for SiOx CyHz-like coatings to Ep = 53.7 kJ mol−1 for SiO1.7 films is observed by increasing the oxygen dilution of HMDSO:O2 plasma. The reason for the residual permeation of high barrier films is discussed and coating defects are visualized by capacitively coupled atomic oxygen plasma etching of coated substrates. A defect density of 3000 mm−2 is revealed.

Journal ArticleDOI
TL;DR: In this article, the influence of low energy argon plasma ( ∼ 70 ǫ) and oxygen flow rate on the electrical, chemical, and structural properties of metal-insulator-silicon structures incorporating these e-beam deposited HfO2 films was reported.
Abstract: High dielectric constant hafnium oxide films were formed by electron beam (e-beam) evaporation on HF last terminated silicon (100) wafers. We report on the influence of low energy argon plasma ( ∼ 70 eV) and oxygen flow rate on the electrical, chemical, and structural properties of metal-insulator-silicon structures incorporating these e-beam deposited HfO2 films. The use of the film-densifying low energy argon plasma during the deposition results in an increase in the equivalent oxide thickness (EOT) values. We employ high resolution transmission electron microscopy (HRTEM), x-ray photoelectron spectroscopy (XPS), and medium energy ion scattering experiments to investigate and understand the mechanisms leading to the EOT increase. We demonstrate very good agreement between the interfacial silicon oxide thicknesses derived independently from XPS and HRTEM measurements. We find that the e-beam evaporation technique enabled us to control the SiOx interfacial layer thickness down to ∼ 6 A. Very low leakage current density (<10−4 A/cm2) is measured at flatband voltage +1 V into accumulation for an estimated EOT of 10.9±0.1 A. Based on a combined HRTEM and capacitance-voltage (CV) analysis, employing a quantum-mechanical CV fitting procedure, we determine the dielectric constant (k) of HfO2 films, and associated interfacial SiOx layers, formed under various processing conditions. The k values are found to be 21.2 for HfO2 and 6.3 for the thinnest ( ∼ 6 A) SiOx interfacial layer. The cross-wafer variations in the physical and electrical properties of the HfO2 films are presented.