Silicon oxide

About: Silicon oxide is a research topic. Over the lifetime, 22220 publications have been published within this topic receiving 260986 citations.

Method for fabricating intermetal dielectric insulation using anisotropic plasma oxides and low dielectric constant polymers

Abstract: A method for making multilevel electrical interconnections having a planar intermetal dielectric (IMD) with low dielectric constant k and good thermal conductivity was achieved The method involves patterning an electrically conductive layer to form metal lines on which is deposited an anisotropic plasma oxide (APO) resulting in a thin oxide on the sidewalls of the metal lines and a much thicker oxide on top of the lines A low dielectric constant (k) polymer is deposited and the polymer and APO are chem/mech polished back to the top of the metal lines A fluorine-doped silicon oxide (FSG) is deposited, and via holes are etched to provide electrical connections for the next level of interconnections The APO provides wider openings between metal lines filled with the low k dielectric polymer thereby reducing the RC time delay of the circuit The thick top APO provides more processing latitude for polishing back the APO and low k polymer The FSG provides a lower dielectric constant k for further reducing the RC delay and a better thermal conductivity constant K for minimizing the Joule heating when the circuit is powered up The process can be repeated several times to form a planar multilevel interconnection for completing wiring on the integrated circuit

Low-temperature plasma-enhanced chemical vapor deposition of silicon oxide films and fluorinated silicon oxide films using disilane as a silicon precursor

Abstract: High-quality SiO2 films may be deposited at low temperatures by plasma-enhanced chemical vapor deposition using disilane (Si2 H6) and nitrous oxide (N2 O) as silicon and oxygen precursors in an otherwise conventional reactor such as a parallel plate plasma reactor. The properties of the SiO2 films deposited at 120° C. using Si2 H6 and N2 O were not significantly different from those of conventional SiH4 -based SiO2 films deposited at the significantly higher temperature range 250°-350° C. PECVD deposition of SiO2 films using Si2 H6 and N2 O provides a practical low temperature process for fabricating microdevices and circuits. This low temperature process can be used for deposition in the presence of polymers, semiconductors, and other components that would melt, decompose, or otherwise be sensitive to higher temperatures. Fluorinated silicon oxide may also be deposited at the relatively low temperature of 120° C. with plasma-enhanced chemical vapor deposition using CF4 as a fluorine source in the deposition process from Si2 H6 and N2 O. The incorporation of fluorine maintains the physical properties of the films, while improving their electrical properties, such as reducing failures due to early dielectric breakdowns, enhancing performance as an insulator, and reducing the presence of unwanted electrical charges.

Carbon content of silicon oxide films deposited by room temperature plasma enhanced chemical vapor deposition of hexamethyldisiloxane and oxygen

Abstract: Hexamethyldisiloxane is used as a silicon‐source gas for plasma enhanced chemical vapor deposition (PECVD) growth of silicon oxide films for passivation layers in microelectronics. In order to produce low permeability films, it is necessary to minimize the carbon content. Films were deposited by a room temperature PECVD process in a parallel plate reactor, and were characterized by infrared spectroscopy, ellipsometry, microbalance, and elastic recoil detection (ERD). The infrared‐active carbon groups appear in Si–CH3, CHx, C=O, and SiC bands. A double band at 2343 cm−1 has also been seen to track these bands. Deposition rate data shows linear behavior as a function of the Hexamethyldisiloxane (HMDSO) concentration in the reactor. The carbon within the films ranges from 36% to <1% of the amount of carbon assisted with HMDSO required to grow the films, depending upon the oxygen flow rate. By comparing the ERD composition data to the infrared spectral data, a carbon content correlation value has been found, ...

Vapor Hydrofluoric Acid Sacrificial Release Technique for Micro Electro Mechanical Systems Using Labware

Abstract: We have developed a novel technique of sacrificial layer etching for micro electro mechanical systems (MEMS). Our technique uses vapor of hydrofluoric acid (HF) to etch sacrificial silicon oxide and to make freestanding silicon microstructures. The advantages of this technique are: (1) no subsequent water rinse is needed, (2) freestanding silicon microstructures can be successfully released without sticking to the substrate, (3) equipment for our vapor phase HF etching simply consists of Teflon beakers only. Conditions for the technique have been optimized by estimating etching rate with test patterns made of silicon-on-insulator (SOI) wafers and by observing water droplets condensation on the sample surface with thermally oxidized silicon chips. By this technique we have successfully obtained freestanding microstructures of SOI wafers. Microcantilevers of as long as 5000 µm (a 5-µm-wide, 10-µm-thick, and 5000-µm-long cantilever over a 0.6-µm-gap) have been successfully released without adhering to the base substrate or contacting the neighboring cantilevers. We have also fabricated and actuated electrostatic comb-drive actuators of 60 and 200 comb pairs to demonstrate high processing yield of our nonstick releasing technique.

Strong and reversible modulation of carbon nanotube-silicon heterojunction solar cells by an interfacial oxide layer

Abstract: Deposition of nanostructures such as carbon nanotubes on Si wafers to make heterojunction structures is a promising route toward high efficiency solar cells with reduced cost. Here, we show a significant enhancement in the cell characteristics and power conversion efficiency by growing a silicon oxide layer at the interface between the nanotube film and Si substrate. The cell efficiency increases steadily from 0.5% without interfacial oxide to 8.8% with an optimal oxide thickness of about 1 nm. This systematic study reveals that formation of an oxide layer switches charge transport from thermionic emission to a mixture of thermionic emission and tunneling and improves overall diode properties, which are critical factors for tailoring the cell behavior. By controlled formation and removal of interfacial oxide, we demonstrate oscillation of the cell parameters between two extreme states, where the cell efficiency can be reversibly altered by a factor of 500. Our results suggest that the oxide layer plays an important role in Si-based photovoltaics, and it might be utilized to tune the cell performance in various nanostructure–Si heterojunction structures.