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Silicon oxide

About: Silicon oxide is a research topic. Over the lifetime, 22220 publications have been published within this topic receiving 260986 citations.


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Journal ArticleDOI
04 May 2012-ACS Nano
TL;DR: Measure and control of nanoscale single-asperity friction is demonstrated by using cantilever probes featuring an in situ solid-state heater in contact with silicon oxide substrates and capillary condensation is observed to be a thermally activated process.
Abstract: We demonstrate measurement and control of nanoscale single-asperity friction by using cantilever probes featuring an in situ solid-state heater in contact with silicon oxide substrates. The heater temperature was varied between 25 and 790 °C. By using a low thermal conductivity sample, silicon oxide, we are able to vary tip temperatures over a broad range from 25 ± 2 to 255 ± 25 °C. In ambient atmosphere with ∼30% relative humidity, the control of friction forces was achieved through the formation of a capillary bridge whose characteristics exhibit a strong dependence on temperature and sliding speed. The capillary condensation is observed to be a thermally activated process, such that heating in ambient air caused friction to increase due to the capillary bridge nucleating and growing. Above tip temperatures of ∼100 ± 10 °C, friction decreased drastically, which we attribute to controllably evaporating water from the contact at the nanoscale. In contrast, in a dry nitrogen atmosphere, friction was not af...

59 citations

Patent
12 Aug 2004
TL;DR: In this article, a carbon nanotube memory cell for an integrated circuit is constructed in a layer of a dielectric material such as silicon nitride down to the first electrical contact.
Abstract: A carbon nanotube memory cell for an integrated circuit wherein a chamber is constructed in a layer of a dielectric material such as silicon nitride down to a first electrical contact. This chamber is filled with polysilicon. A layer of a carbon nanotube mat or ribbon is formed over the silicon nitride layer and the chamber. A dielectric material, such as an oxide layer, is formed over the nanotube strips and patterned to form an upper chamber down to the ribbon layer to permit the ribbon to move into the upper chamber or into the lower chamber. The upper chamber is then filled with polysilicon. A silicon nitride layer is formed over the oxide layer and a contact opening is formed down to the ribbon and filled with tungsten that is then patterned to form metal lines. Any exposed silicon nitride is removed. A polysilicon layer is formed over the tungsten lines and anisotropically etched to remove polysilicon on the horizontal surfaces but leave polysilicon sidewall spacers. A silicon oxide layer is deposited over the structure and also anisotropically etched forming silicon oxide sidewall spacers on the polysilicon sidewall spacers. The polysilicon is wet etched with an etchant selective to adjacent materials to remove the polysilicon sidewalls spacers and all of the polysilicon in the chambers. Silicon oxide is formed over the structure and into the upper portion of the openings to seal the now empty chambers. A passivation layer may then be formed.

59 citations

Journal ArticleDOI
TL;DR: In this article, the authors investigated the charge decay characteristics of a silicon-oxide-nitride-oxide silicon type nonvolatile memory at elevated temperatures based on the amphoteric trap model and the thermal emission model of the trapped charge.
Abstract: We investigated the charge decay characteristics of a silicon-oxide-nitride-oxide-silicon type nonvolatile memory at elevated temperatures Based on the amphoteric trap model and the thermal emission model of the trapped charge, we propose an advanced charge decay model which includes the effect of the bottom oxide, and apply it to extraction of the trap density distribution in energy levels of the nitride layer The samples prepared have nitride films deposited simultaneously and are classified into two groups according to the thickness of the bottom oxide The trap density distributions extracted from two groups showed good consistency

58 citations

Journal ArticleDOI
TL;DR: In this paper, Alumina-supported platinum catalysts have been modified with silicon oxide thin films grown using atomic layer deposition (ALD) in order to tune acid base and electronic properties of the oxide, and their performance has been tested for the hydrogenation of cinnamaldehyde.
Abstract: Alumina-supported platinum catalysts have been modified with silicon oxide thin films grown using atomic layer deposition (ALD) in order to tune the acid–base and electronic properties of the oxide, and their performance has been tested for the hydrogenation of cinnamaldehyde. It was found that the silica layers greatly increase the stability of the platinum nanoparticles, preventing their sintering during high-temperature calcinations without affecting access to the metal surface in any significant way; the extent of CO adsorption, measured by infrared absorption spectroscopy was found to decrease by only one-third after 6 SiO2 ALD cycles. Additional Bronsted and Lewis acid sites were created upon the deposition of submonolayer coverages of silicon oxide, as probed via pyridine adsorption. The addition of the silicon oxide thin films reduced the overall activity of these catalysts but also increased their selectivity toward the production of the unsaturated alcohol. In addition, both turnover frequencies...

58 citations

Journal ArticleDOI
TL;DR: This work investigates an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells, and shows that this intrinsic silicon interlayer is beneficial for surface passivation.
Abstract: The use of passivating contacts compatible with typical homojunction thermal processes is one of the most promising approaches to realizing high-efficiency silicon solar cells. In this work, we investigate an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells. The contact structure consists of a chemically grown thin silicon oxide layer, which is capped with a boron-doped silicon-rich silicon carbide [SiCx(p)] layer and then annealed at 800–900 °C. Transmission electron microscopy reveals that the thin chemical oxide layer disappears upon thermal annealing up to 900 °C, leading to degraded surface passivation. We interpret this in terms of a chemical reaction between carbon atoms in the SiCx(p) layer and the adjacent chemical oxide layer. To prevent this reaction, an intrinsic silicon interlayer was introduced between the chemical oxide and the SiCx(p) layer. We show that this intrinsic silicon interlayer is beneficial for surface passivation. Optimized p...

58 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202323
202253
2021199
2020524
2019649
2018621