Topic
Silicon oxide
About: Silicon oxide is a research topic. Over the lifetime, 22220 publications have been published within this topic receiving 260986 citations.
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TL;DR: In this paper, polycarbosilane-derived SiC fibers were exposed for 1-100 h at 1273-1673 K in air, and three types of SiC fiber decreased in strength as the oxide layer thickness increased.
Abstract: Polycarbosilane-derived SiC fibers (CG Nicalon, Hi-Nicalon, and Hi-Nicalon type S) were exposed for 1–100 h at 1273–1673 K in air. Oxide layer growth and changes in tensile strength for these fibers were examined after exposure. The three types of SiC fibers decreased in strength as the oxide layer thickness increased. Fracture origins were located near the oxide layer–fiber interface. The Hi-Nicalon type S showed better oxidation resistance than the other polycarbosilane-derived SiC fibers after exposure in air at 1673 K for 10 h. This result was attributed to the nature of the silicon oxide layer on the surface of the SiC fibers.
58 citations
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TL;DR: In this paper, the pinhole formation induced in the thermal processing of the poly-Si on oxide (POLO) junctions is investigated and the resulting pinhole densities are in the range of 6.6
Abstract: In the pursuit of ever higher conversion efficiencies for silicon photovoltaic cells, polycrystalline silicon (poly-Si) layers on thin silicon oxide films were shown to form excellent carrier-selective junctions on crystalline silicon substrates. Investigating the pinhole formation that is induced in the thermal processing of the poly-Si on oxide (POLO) junctions is essential for optimizing their electronic performance. We observe the pinholes in the oxide layer by selective etching of the underlying crystalline silicon. The originally nm-sized pinholes are thus readily detected using simple optical and scanning electron microscopy. The resulting pinhole densities are in the range of 6.6 × 106 cm−2 to 1.6 × 108 cm−2 for POLO junctions with selectivities close to S10 = 16, i.e., saturation current density J0c below 10 fA/cm2 and contact resistivity ρc below 10 mΩcm2. The measured pinhole densities agree with values deduced by a pinhole-mediated current transport model. Thus, we conclude pinhole-mediated current transport to be the dominating transport mechanism in the POLO junctions investigated here.
58 citations
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TL;DR: In this article, the amount of the energy shift of the substrate Si 2p3/2 peak measured as a function of the bias voltage was analyzed for 3.6-nm-thick silicon oxide/n-Si(100) metal-oxide-semiconductor devices.
Abstract: Interface states in the Si band gap present at oxide/Si(100) interfaces for ∼3‐nm‐thick Pt/2.1∼3.6‐nm‐thick silicon oxide/n‐Si(100) metal–oxide–semiconductor devices are investigated by measurements of x‐ray photoelectron spectra under biases between the Pt layer and the Si substrate, and their energy distribution is obtained by analyzing the amount of the energy shift of the substrate Si 2p3/2 peak measured as a function of the bias voltage. All the interface states observed using this new technique have discrete energy levels, showing that they are due to defect states. For the oxide layer formed in H2SO4+H2O2, the interface states have three density maxima at ∼0.3, ∼0.5, and ∼0.7 eV above the valence‐band maximum (VBM). For the oxide layer produced in HNO3, two density maxima appear at ∼0.3 and ∼0.7 eV above the VBM. The energy distribution for the oxide layer grown in HCl+H2O2 has one peak at ∼0.5 eV. The 0.5 eV interface state is attributed to the isolated Si dangling bond defect. The 0.3 and 0.7 eV ...
58 citations
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TL;DR: In this article, the intrinsic amorphous silicon oxide buffer layer in interplay with doped microcrystalline silicon oxide contact layers for silicon heterojunction solar cells using all silicon oxide based functional layers on flat p-type float-zone wafers.
Abstract: We report on the systematic optimization of the intrinsic amorphous silicon oxide buffer layer in interplay with doped microcrystalline silicon oxide contact layers for silicon heterojunction solar cells using all silicon oxide based functional layers on flat p-type float-zone wafers. While the surface passivation quality is comparably good within a wide range of low oxygen contents, the optical band gap increases and the dark conductivity decreases with increasing oxygen content, giving rise to an inevitable trade-off between optical transparency and electrical conductivity. On the cell level, fill factor FF and short circuit current density Jsc losses compete with the open circuit voltage Voc gains resulting from a thickness increase of the front buffer layers, whereas Jsc and Voc gains compete with FF losses resulting from increasing thickness of the rear buffer layers. We obtained the highest active area efficiency of ηact = 18.5% with Voc = 664 mV, Jsc = 35.7 mA/cm2, and FF = 78.0% using 4 nm front a...
58 citations
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23 Sep 1994
TL;DR: In this paper, a method of heat-treating a glass substrate where the substrate is thermally treated (such as the formation of films, growth of films and oxidation) around or above its strain point is presented.
Abstract: A method of heat-treating a glass substrate where the substrate is thermally treated (such as the formation of films, growth of films, and oxidation) around or above its strain point. After thermally treating the substrate around or above its strain point the glass substrate may be slowly cooled at a rate of 0.01° to 0.5° C./min to achieve maximum shrinkage of the substrate. Following further thermal treatments the substrate may be quickly cooled at a rate of 10° C./min to 300° C./sec to suppress shrinkage of the glass substrate. The substrate can have films such as aluminum nitrate films, silicon oxide films, silicon films, insulating films, semiconductor films, etc. Film formation can occur either before or after thermal treatment of the substrate around or above its strain point and before further thermal treatments.
58 citations