Snapback

About: Snapback is a research topic. Over the lifetime, 742 publications have been published within this topic receiving 8225 citations.

ESD protection circuit

Abstract: An ESD protection circuit includes a substrate, diode device, first snapback device, ring structure, second snapback device and a control circuit The diode device is formed in the substrate The first snapback device is formed in the substrate and includes a first heavy ion-doped region, a first gate and a second heavy ion-doped region The first heavy ion-doped region is coupled to the diode device The first gate is coupled to the second heavy ion-doped region The ring structure is formed in the substrate and includes a third heavy ion-doped region located The second gate is formed on the substrate between the second heavy ion-doped region and the third heavy ion-doped region to generate a second snapback device The control circuit is connected to the third heavy ion-doped region for preventing the turn-on of a parasitic SCR formed in the substrate in a normal operation

SPICE Implementation of the Dynamic Memdiode Model for Bipolar Resistive Switching Devices

Abstract: This paper reports the fundamentals and the SPICE implementation of the Dynamic Memdiode Model (DMM) for the conduction characteristics of bipolar-type resistive switching (RS) devices. Following Prof. Chua’s memristive devices theory, the memdiode model comprises two equations, one for the electron transport based on a heuristic extension of the quantum point-contact model for filamentary conduction in thin dielectrics and a second equation for the internal memory state related to the reversible displacement of atomic species within the oxide film. The DMM represents a breakthrough with respect to the previous Quasi-static Memdiode Model (QMM) since it describes the memory state of the device as a balance equation incorporating both the snapback and snapforward effects, features of utmost importance for the accurate and realistic simulation of the RS phenomenon. The DMM allows simple setting of the initial memory condition as well as decoupled modeling of the set and reset transitions. The model equations are implemented in the LTSpice simulator using an equivalent circuital approach with behavioral components and sources. The practical details of the model implementation and its modes of use are also discussed.

Negative voltage discharge scheme to improve snapback in a non-volatile memory

Abstract: Charge pump and discharge circuitry for a non-volatile memory device that splits up the discharge operation into two discharge periods. In a first discharge period, the voltage being discharged (e.g., erase voltage) is discharged through a pair of discharge transistors until the discharging voltage reaches a first voltage level. The path through the pair of discharge transistors is controlled by an intermediate control voltage so that none of the transistors of the pair enter the snapback condition. In the second discharge period, the remaining discharging voltage is fully discharged from the first level through a third discharge transistor.

Retraction and Stress Propagation in Natural and Synthetic Gum and Tread Stocks

Abstract: Natural and synthetic rubbers (elastomers) are characterized by their long-range reversible elasticity. More particularly, the existence of a retractive force distinguishes rubbers from materials like beeswax, which may be extended but do not snap back. Whereas all rubbers show a snapback, the good rubbers show a fast snapback. Thus the speed of snapback is an outstanding index to the quality of the rubber. For instance, both Hevea and Butyl show snapback, but Butyl snaps back much more slowly than Hevea. This is the reason for the poor rebound in Butyl. Incidentally, the speed of snapback may be, and actually is, used as a simple “hand test” for progress of cure. One bends a cured sheet and observes how fast it straightens out again. In this example the speed of recovery after bending is observed. The speed of snapback may be studied, of course, for any deformation : bending, torsion, shear, compression, extension, etc. Since stress-strain data are used so extensively in rubber technology, snapb...

Hybrid ESD clamp

Abstract: A circuit for protecting a semiconductor from electrostatic discharge events comprises a Zener diode (21) in series with a resistor (22) between a power line HV VDD and a ground fine HV VSS. A gate of a DMOS device (23) is connected to a node between the diode and the resistor. The drain and source of the DMOS are connected between the power lines. During an ESD event, the gate voltage of the DMOS increases and the ESD current will be discharged through the DMOS to ground. When the current exceeds the capacity of the channel of the DMOS, a parasitic bipolar transistor or transistors associated with the DMOS device acts in a controlled snapback to discharge the current to ground. The use of a vertical DMOS (VDMOS) instead of a lateral DMOS (LDMOS), can reduce the area of the device and improve the protection.