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Snapback

About: Snapback is a research topic. Over the lifetime, 742 publications have been published within this topic receiving 8225 citations.


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Patent
06 Apr 2012
TL;DR: In this article, a protection circuit consisting of a gate, a drain, and a source connected to ground is proposed to protect a receiver from high-energy signals, where the drain is configured to provide a current path from the drain to the source even when the gate is open and thus protect the receiver.
Abstract: A protection circuit protects a receiver from high-energy signals. In one exemplary embodiment, the protection circuit comprises a snapback transistor and a controller. The snapback transistor comprises a gate, a drain connected to an input of the receiver and a source connected to ground. The controller configured to connect the gate to a bias voltage to close the gate in a transmit mode, and to disconnect the gate from the bias voltage to open the gate in a receive mode. The snapback transistor is configured to enter into snapback responsive to a high energy signal at the drain to provide a current path from the drain to the source even when the gate is open and thus protect the receiver.

4 citations

Patent
04 Nov 2015
TL;DR: In this paper, a longitudinal RC-IGBT was proposed to eliminate the snapback phenomenon in the forward conducting process of the conventional RC-IBT, and the device can be switched from the MOSFET mode to the IGBT mode with a very small current, so that the phenomenon does not occur in a conducting process.
Abstract: The invention belongs to the technical field of semiconductors, and particularly relates to a longitudinal RC-IGBT device. In the device, on the basis of a conventional device structure, an N type resistance region 11 is arranged in a collector structure. The thin N type resistance region 11 is very thin and has large impedance, and a great voltage drop is generated in the thin N type resistance region 11 with a small current when forward conducting of the device is just started, so that a voltage difference is generated between a P+ collector region 9 and an N type electric field stop layer 8, and the device is switched from an MOSFET mode to an IGBT mode. According to the novel structure provided by the invention, switching from the MOSFET mode to the IGBT mode can be finished with a very small current, so that the snapback phenomenon does not occur in a conducting process. In a freewheel diode mode, a PN junction formed by a P type base region and an N-drift region is in a positively-biased state, and the device is conductived when the voltage drop exceeds a J1 threshold voltage, so that current can be conducted. Through adoption of the longitudinal RC-IGBT device provided by the invention, the snapback phenomenon in the forward conducting process of the conventional RC-IGBT is eliminated completely.

4 citations

Proceedings Article
18 Oct 2012
TL;DR: In this paper, several configurations of snapback bipolar ESD structures are tested with TLP measurement from 50ns up to 1us and the results demonstrate how its robustness depends on the current capability of stacked Snapback bipolar structure configuration.
Abstract: ESD system level requirements imply design efforts to achieve fast and robust ESD structures. Several configurations of snapback bipolar ESD structures are tested with TLP measurement from 50ns up to 1us and gun results. Results demonstrate how its robustness depends on the current capability of stacked snapback bipolar structure configuration.

4 citations

Proceedings ArticleDOI
20 Jun 2017
TL;DR: In this paper, the authors attempted to measure the two-port S-parameters of an ESD protection device using a vector network analyzer, bias tee, direct current power supply, and electronic load.
Abstract: The operating characteristics and protection against electrostatic discharge (ESD) offered by a protection device when implemented in a real circuit may differ from those suggested via a circuit simulation, particularly at the system level. We assumed that this can be partly attributed to the failure of the snapback characteristics to account for the frequency responses of the pass and reflection characteristics of the device. In this study, we attempted to measure the two-port S-parameters of an ESD protection device using a vector network analyzer, bias tee, direct current power supply, and electronic load. We also proposed a circuit configuration for a radio frequency simulator that is able to model the frequency response of an ESD protection device for system-level ESD stress simulation. To evaluate the proposed method, we compared the simulated ESD stress voltage waveform with that actually measured when ESD was applied to a transient voltage suppressor diode.

4 citations

Proceedings ArticleDOI
01 Apr 2007
TL;DR: In this article, the effects of background doping concentration (BDC) on the electrostatic discharge (ESD) protection performances of a high voltage operating extended drain N-type MOSFET (EDNMOS) device were evaluated.
Abstract: In this study, the effects of background doping concentration (BDC) on the electrostatic discharge (ESD) protection performances of a high voltage operating extended drain N-type MOSFET (EDNMOS) device were evaluated. The EDNMOS device with low BDC suffers from strong snapback in the high current region, which results in poor ESD protection performance. However, the strong snapback can be avoided in the EDNMOS device with high BDC. This implies that a good ESD protection performance can be realized in terms of the EDNMOS device by properly controlling its BDC.

4 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202227
202127
202033
201939
201824