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Snapback

About: Snapback is a research topic. Over the lifetime, 742 publications have been published within this topic receiving 8225 citations.


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Proceedings ArticleDOI
01 Nov 2006
TL;DR: In this paper, a simulation procedure using the conventional thermal-electric finite element method for the phase change memory has been developed by introducing a defect on the amorphous chalcogenide of a reset phase-change memory, the snapback by hot filament due to thermal runaway has been investigated by numerical simulations with three-dimensional model.
Abstract: A simulation procedure using the conventional thermal-electric finite element method for the phase change memory has been developed. By introducing a defect on the amorphous chalcogenide of a reset phase change memory, the snapback by hot filament due to thermal runaway has been investigated by the numerical simulations with three-dimensional model.

4 citations

Patent
05 Mar 2014
TL;DR: In this article, a low-frequency mutation detection method based on a snapback primer technology was proposed, which can be used for gene screening, genotyping (SNP, deletion mutation, insertion mutation) and other fields of various types of tissues including fresh tissue samples, whole blood, serum, tissue slices and other samples.
Abstract: The invention belongs to the technical field of gene detection, and particularly relates to a low-frequency mutation detection method based on a snapback primer technology. The method comprises: designing a snapback primer, preparing a DNA template, preparing a detection system, setting a reaction procedure and determining a Ts value, judging a result, and other steps. According to the present invention, the detection method is the snapback ARMS and snapback primer HRM combined low-frequency mutation detection technology, such that the detection sensitivity of 1:10000 or even higher is achieved, clinical requirements of pollution resistance, high sensitivity, strong specificity, easy performing and result judgment on the mutation detection technology are met, and the method can be used for gene screening, genotyping (SNP, deletion mutation, insertion mutation) and other fields of various types of tissues including fresh tissue samples, whole blood, serum, tissue slices and other samples.

4 citations

01 Jul 2006
TL;DR: In this article, a fast continuous harmonics measurement system based on the application of a digital signal processor (DSP) has been built at Fermilab to perform detailed studies of the dynamic effects in superconducting accelerator magnets, and the results confirm the previously observed fast drift in the first several seconds of the sextupole decay and provide additional information on a scaling law for predicting snapback duration.
Abstract: To perform detailed studies of the dynamic effects in superconducting accelerator magnets, a fast continuous harmonics measurement system based on the application of a digital signal processor (DSP) has been built at Fermilab. Using this new system, the dynamic effects in the sextupole field, such as the field decay during the dwell at injection and the rapid subsequent ''snapback'' during the first few seconds of the energy ramp, are evaluated for more than ten Tevatron dipoles from the spare pool. The results confirm the previously observed fast drift in the first several seconds of the sextupole decay and provide additional information on a scaling law for predicting snapback duration. The information presented here can be used for an optimization of the Tevatron and for future LHC operations.

3 citations

Journal ArticleDOI
TL;DR: In this article, a dual-MOS-triggered silicon-controlled rectifier (DMTSCR) was developed for high-voltage (HV) electrostatic discharge (ESD) protection.
Abstract: A dual-MOS-triggered silicon-controlled rectifier (DMTSCR) has been firstly developed for high-voltage (HV) electrostatic discharge (ESD) protection. Compared to the reported SCRs with modified structures, the DMTSCR harvests a series of advantages such as a high holding voltage ( $V_{h}$ ), a strong ESD robustness, and a low $V_{t1}$ , thanks to its embedded structures including a gate-to-VDD PMOS, a gate-grounded NMOS, and a modified SCR. Thus, the DMTSCR has the largest figure of merit as high as 1.8 mA/ $\mu \text{m}^{2}$ . By further optimizing the layout and the key spacing between the embedded PMOS and NMOS of DMTSCR, $V_{h}$ increased from 8.4 to 17.4 V, the turn-on resistance remarkably decreased to $0.4~\Omega $ , and the turn-on voltage was clamped at $V_{h}$ . The optimized DMTSCR with a small chip area possesses an ESD robustness of 3000 V evaluated by the human body model. Meanwhile, the operation mechanism simulated by Sentaurus exhibited good agreements with the theoretical circuit analysis, and the simulated electrical characteristics were consistent with those measured from the experimental devices. The layout-optimized DMTSCR with good clamping ability and zero snapback voltage is a promising solution for stacking to meet various HV ESD protection requirements.

3 citations

Proceedings ArticleDOI
05 Oct 1993
TL;DR: In this article, the authors analyzed the breakdown characteristics and their dependence on non-zero body resistance (R/sub B/) in double-body-tied-to-source (DBTS) NFD MOSFETs.
Abstract: The existence of non-zero body resistance (R/sub B/) in the DBTS (double-body-tied-to-source) NFD (non-fully depleted) SOI MOSFET structure leads to bipolar-induced premature breakdown, the mechanism of which is similar to the parasitic bipolar effect in the bulk MOSFET. The conditions can be misleading, however, because the holding voltage and the snapback voltage are indistinguishably referred to as the breakdown voltage, and the stated condition for breakdown, i.e., (M-1)/spl beta/=1, is independent of R/sub B/. To clarify this issue and to give physical insight regarding the efficacy of the DBTS, we analyze the breakdown characteristics and their dependence on R/sub B/, and we present simple but physical descriptions of the holding and snapback voltages. The derivations are aided and supported by simulations using SOISPICE-3, in which we have implemented a physics-based model for the NFD SOI MOSFET. >

3 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202227
202127
202033
201939
201824