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Software portability

About: Software portability is a research topic. Over the lifetime, 8987 publications have been published within this topic receiving 164922 citations. The topic is also known as: portability.


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Journal ArticleDOI
TL;DR: In this paper , the authors describe recent research progress related to the development and improvement of screen-printed electrodes (SPEs) and demonstrate the wide range of applications, also highlighting the market directions and the need for novel devices to be used by non-specialists.
Abstract: Portability is one of the essential keys in the development of modern analytical devices. Screen printing technology is an established technology for both chemical and biosensor development. Screen printing technology has been used to generate a variety of electronic sensors that are rapid, cost-effective, on-site, real-time, inexpensive, and practical for use in healthcare, environmental monitoring, industrial monitoring, and agricultural monitoring. This review aims to describe recent research progress related to the development and improvement of screen-printed electrodes (SPEs). We also demonstrate the wide range of applications, also highlighting the market directions and the need for novel devices to be used by non-specialists. Finally, we conclude and provide an overview of the constraints and future opportunities of SPEs in biosensor application.

88 citations

Proceedings ArticleDOI
01 Aug 2006
TL;DR: This paper presents a lightweight subset implementation of the standard message-passing interface, MPI, that does not require an operating system and uses a small memory footprint and provides a programming model capable of using multiple-FPGAs that hides hardware complexities from the programmer, facilitates the development of parallel code and promotes code portability.
Abstract: With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocessor embedded system Furthermore, Multi-FPGA systems can be built to provide massive parallelism given an efficient programming model In this paper, we present a lightweight subset implementation of the standard message-passing interface, MPI, that is suitable for embedded processors It does not require an operating system and uses a small memory footprint With our MPI implementation (TMD-MPI), we provide a programming model capable of using multiple-FPGAs that hides hardware complexities from the programmer, facilitates the development of parallel code and promotes code portability To enable intra-FPGA and inter-FPGA communications, a simple Network-on-Chip is also developed using a low overhead network packet protocol Together, TMD-MPI and the network provide a homogeneous view of a cluster of embedded processors to the programmer Performance parameters such as link latency, link bandwidth, and synchronization cost are measured by executing a set of microbenchmarks

88 citations

Journal ArticleDOI
TL;DR: The runtime, which is based on a multi-level thread scheduler combined with a NUMA-aware memory manager, converts this information into scheduling hints related to thread-memory affinity issues that enable dynamic load distribution guided by application structure and hardware topology, thus helping to achieve performance portability.
Abstract: Exploiting the full computational power of current hierarchical multiprocessor machines requires a very careful distribution of threads and data among the underlying non-uniform architecture so as to avoid remote memory access penalties. Directive-based programming languages such as OpenMP, can greatly help to perform such a distribution by providing programmers with an easy way to structure the parallelism of their application and to transmit this information to the runtime system. Our runtime, which is based on a multi-level thread scheduler combined with a NUMA-aware memory manager, converts this information into scheduling hints related to thread-memory affinity issues. These hints enable dynamic load distribution guided by application structure and hardware topology, thus helping to achieve performance portability. Several experiments show that mixed solutions (migrating both threads and data) outperform work-stealing based balancing strategies and next-touch-based data distribution policies. These techniques provide insights about additional optimizations.

88 citations

Journal ArticleDOI
Mohamad Minhat1, Valeriy Vyatkin1, Xun Xu1, S. Wong1, Z. Al-Bayaa1 
TL;DR: The layered CNC-FB architecture is proposed, which simplifies the design of a CNC machine controller with the architecture layers responsible for data processing, data storage and execution, and supports the object-oriented Model-View-Control design pattern.
Abstract: Modern manufacturing industries demand computer numeric controllers, having higher level input languages than outdated G-code, and less proprietary vendor dependencies. IEC 61499 is a new standard for distributed measurement and control systems, that enables portability and interoperability of embedded controllers, along with the ease of their mapping to arbitrary distributed networking hardware configurations. This paper demonstrates that the IEC 61499 reference architecture can be successfully used to create a computer numeric controller, offering interoperability, portability, configurability, and distribution characteristics. The layered CNC-FB architecture is proposed, which simplifies the design of a CNC machine controller with the architecture layers responsible for data processing, data storage and execution. In combination with the object-oriented Model-View-Control design pattern, the CNC-FB architecture supports the design framework, in which simulation of the machining becomes natural and inherent part of the design process, with seamless transition from simulation to actual machining. The implemented controller was tested in both the model and on an actual milling machine.

88 citations

Proceedings ArticleDOI
22 Mar 2003
TL;DR: The Syzygy software library consists of tools for programming VR applications on PC clusters that includes two application frameworks: a distributed scene graph framework for rendering a single application's graphics database on multiple rendering clients, and a master/slave framework for applications with multiple synchronized instances.
Abstract: The Syzygy software library consists of tools for programming VR applications on PC clusters. Since the PC cluster environment presents application development constraints, it is impossible to simultaneously optimize for efficiency, flexibility, and portability between the single-computer and cluster cases. Consequently Syzygy includes two application frameworks: a distributed scene graph framework for rendering a single application's graphics database on multiple rendering clients, and a master/slave framework for applications with multiple synchronized instances. Syzygy includes a simple distributed OS and supports networked input devices, sound renderers, and graphics renderers, all built on a robust networking layer.

87 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20241
2023580
20221,257
2021290
2020308
2019381