Showing papers on "Spice published in 1986"
TL;DR: In this article, a simple four-transistor, linear, tunable, high-frequency transconductance element is described, which achieves its linearity by current differencing without undue matching requirements.
Abstract: A simple four-transistor, linear, tunable, high-frequency transconductance element is described. By using a pair of composite n -channel- p -channel devices, the circuit achieves its linearity by current differencing without undue matching requirements. It is shown that linearity and frequency response can be optimized simultaneously by appropriate choice of device dimensions. The performance is verified by SPICE simulations, and an operational transconductance amplifier (OTA) is used as one example for the many applications of the proposed element.
112 citations
TL;DR: The proposed approach, which considers the MOS transistor as a four-terminal device and takes into account short-channel effects, has been implemented in the circuit simulator SPICE and it is shown that the results predicted are in good agreement with those achievable with a numerical procedure.
Abstract: The proposed approach, which considers the MOS transistor as a four-terminal device and takes into account short-channel effects, has been implemented in the circuit simulator SPICE. It is shown that the results predicted from this CAD-oriented approach are in good agreement with those achievable with a numerical procedure. It is also found that, using the new model in SPICE, the evaluation of transients in some high-precision circuits gives results significantly different from those expected from standard quasi-static formulations.
57 citations
TL;DR: An improved model for the GaAs MESFET has been implemented in the source code of the circuit-simulation program SPICE as mentioned in this paper, which allows simulation of both enhancement-and depletion-mode devices.
Abstract: An improved model for the GaAs MESFET has been implemented in the source code of the circuit-simulation program SPICE. New features include 1) an accurate model for the Schottky barrier, which allows simulation of both enhancement- and depletion-mode devices; 2) detailed modeling of the nonlinear gate-source and gate-drain capacitance; and 3) a user-specifiable value for the exponent in the expression for the dependence of the dc drain current upon the gate-source voltage. Also discussed are some important points concerning the charge-voltage equations that must accompany the new model's capacitance-voltage equations within SPICE. The new GaAs FET SPICE model is believed to be the most comprehensive one available to date in the public domain.
34 citations
01 Jun 1986
23 citations
TL;DR: An explicit formulation of the transient response of ED MOS logic gates is presented, including load conditions and driving waveforms, and optimal structures with a low value of the configuration ratio can be defined.
Abstract: An explicit formulation of the transient response of ED MOS logic gates is presented, including load conditions and driving waveforms. Defining delays as the time required by the current imbalance of the active inverter to charge or discharge the output load, with respect to physical reference levels, rise and fall mode delay times are obtained in an explicit formulation, with separate contributions due to fan-out and fan-in. Results are applied to ring oscillators and to depletion-load inverter chains with different configuration ratio values and are compared with SPICE simulations. With good agreement obtained, optimal structures with a low value of the configuration ratio can be defined. Analysis of propagation delay times in NOR, NAND, and transmission gates is given, allowing easy implementation of this model into logic simulators.
22 citations
01 Dec 1986
TL;DR: Based on the surface potential formulation, a charge-sheet capacitance model for short-channel MOSFET's has been developed and implemented in SPICE as discussed by the authors, where the model equations are charge-based and include the drift velocity saturation, the diffusion current, the effect of the bulk charge, the channel length modulation and the channel side fringing field capacitances.
Abstract: Based on the surface potential formulation[1], a charge-sheet capacitance model for short-channel MOSFET's has been developed and implemented in SPICE. No iterations are needed to find the surface potential. The model equations are charge-based and includes the drift velocity saturation, the diffusion current, the effect of the bulk charge, the channel length modulation and the channel side fringing field capacitances. As a byproduct of the development of this capacitance model, an analytic charge-sheet current model has been obtained. The current, charges, their first derivatives(conductance and capacitance) and second derivatives are continuous over all the operating regions. An automatic direct-on-wafer off-chip capacitance measurement system with 14 aF rms resolution has been developed for performing the model parameter extraction.
15 citations
01 Apr 1986
TL;DR: A DC transformer model is shown to perform state averaging using nodal analysis, thereby extending the techniques of Middlebrook, et al. to SPICE.
Abstract: New modeling techniques are described using the SPICE circuit simulation program. A saturable core model is developed using standard SPICE elements in a subcircuit. A DC transformer model is shown to perform state averaging using nodal analysis, thereby extending the techniques of Middlebrook, et al. to SPICE. A SPICE syntax extension is proposed that allows these models to have properties of basic SPICE device models.
15 citations
01 Sep 1986
TL;DR: A table model based on B-spline approximation has been implemented in the SPICE-based circuit simulator and shows good convergence properties and allows significant reduction of model evaluation time on the vector computer.
Abstract: Table models for SPICE-type circuit simulators have been investigated. A table model based on B-spline approximation has been implemented in our SPICE-based circuit simulator. It shows good convergence properties and allows significant reduction of model evaluation time on our vector computer. It will be used as a flexible interface between device simulation/measurements and circuit simulation in a low level CAD-system.
12 citations
01 Oct 1986
TL;DR: In this article, the results of a comparative study of three solution methods: harmonic balance, modified SPICE, and time domain methods are presented for the analysis of large-signal devices.
Abstract: Lumped-element circuit models, modified to include RF voltage-dependent elements may be used to describe the large-signal performance of a MESFET. Several solution methods exist for the analysis of amplifier circuits incorporating the large-signal device model. The paper reports the results of a comparative study of three solution methods: harmonic balance, modified SPICE and time domain methods. A simple amplifier, with 50 Ω generator and load impedances is used to show the importance of the nonlinear gate-source capacitance and avalanche breakdown in predicting harmonic generation in the MESFET. An amplifier, with cascaded transmission-line input and output matching sections, illustrates the effect on the large-signal analysis, of using the three alternative solution methods with their associated descriptions of the distributed external microwave circuits. It is concluded that, for this application, the harmonic balance method is faster and more accurate than the other solution methods.
9 citations
Patent•
05 Dec 1986
TL;DR: In this article, the authors proposed to produce an inclusion compound of a spice component in high inclusion rate and in high yield without change of quality of the spice component by including the spice components in cyclodextrin by using a supercritical carbon dioxide or liquefied carbonic acid.
Abstract: PURPOSE: To produce an inclusion compound of spice component in high inclusion rate and in high yield without change of quality of spice component, by including the spice component in cyclodextrin by the use of a supercritical carbon dioxide or liquefied carbonic acid. CONSTITUTION: A spice component, e.g., ground naturally occurring material such as Japanese horseradish, mustard, etc., oleo-resin extracted from the naturally occurring material, essential oil obtained by steam distillation or synthetic spice, etc., is dissolved in supercritical carbon dioxide or liquefied carbonic acid at about 10W50°C under about 150W400atm. Then the prepared dissolution phase is brought into contact with powdery cyclodextrin while reducing pressure of the dissolution phase into about 0W120kg/cm 2 and the spice component in the dissolution phase is included in the cyclodextrin. COPYRIGHT: (C)1988,JPO&Japio
5 citations
02 Jul 1986
TL;DR: A new technique for generating SPICE codes for user specified subcircuits directly from Gate-Matrix symbolic files is presented, which include relevant resistive and capacitive loading.
Abstract: VLSI designers have made extensive use of SPICE simulation to analyze timing-critical circuits such as critical paths and clock distribution networks. Rigorous modeling of resistive and capacitive parasitics and transistors is required for these timing-critical circuits. Unfortunately the conventional circuit extractors have been unable to model wiring resistance and extracting the essential subcircuits, and therefore have required extensive manual editing. Manual editing is so complicated that designers frequently opt to code manually from computer plots of mask information, a process which requires days of work to extract and debug only one path. This process is acceptable for coding those critical paths which do not involve large networks. To manually code an extensive subcircuit, such as a clock distribution network, would be unthinkable. In this paper, we present a new technique for generating SPICE codes for user specified subcircuits directly from Gate-Matrix symbolic files. We have pruned off non-essential elements from symbolic files, generated tables of electrical elements and their connections of the subcircuit in concern, and from there, generated SPICE codes which include relevant resistive and capacitive loading. An application of this technique for the clock distribution network in WE[R] 32100 CPU is described.
TL;DR: A technique is presented which uses existing SPICE elements for simulating circuits containing time-dependent element values and the modeling technique is extended to time- dependent resistors and inductors with SPICE subcircuit descriptions given for each element model.
Abstract: A technique is presented which uses existing SPICE elements for simulating circuits containing time-dependent element values. An example of a SPICE transient analysis of a circuit having a time-dependent capacitance is presented. The modeling technique is extended to time-dependent resistors and inductors with SPICE subcircuit descriptions given for each element model.
TL;DR: In this article, an empirical formula for the currentvoltage characteristics of the GaAs MESFET was presented, where three parameters of the formula can be easily obtained from separate regions in the device DC characteristics.
Abstract: An empirical formula is presented for the current-voltage characteristics of the GaAs MESFET. The three parameters of the formula can be easily obtained from separate regions in the device DC characteristics. By using this formula the implementation of a new GaAs MESFET model into the source code of SPICE is feasible.
TL;DR: BITPAR as discussed by the authors is a VAX-compatible FORTRAN program that computes SPICE Gummel-Poon parameters for a macromodel of an integrated bipolar-junction transistor.
Abstract: A detailed technical description is given of BITPAR, a VAX-compatible FORTRAN program that computes SPICE Gummel-Poon parameters for a macromodel of an integrated bipolar-junction transistor (IBJT). The program permits formulation of implicit relationships between circuit performance and controllable processing and device layout parameters. Experimental results allude to both good accuracy and conservatism in the SPICE computer-aided prediction of circuit performance.
Patent•
04 Apr 1986
TL;DR: In this article, a paste spice which stably preserves taste of spice even by long-term storage and rapidly produces spice in the oral cavity was obtained by blending microcapsules having sealed a spice component with a base material of paste spice.
Abstract: PURPOSE: To obtain paste spice which stably preserves taste of spice even by long-period storage and rapidly produces spice in the oral cavity, by blending microcapsules having sealed a spice component with a base material of paste spice. CONSTITUTION: Microcapsules (preferably having 20W30μm particle diameter and 4W50μm film thickness) having sealed a spice component is blended with a base material of paste spice to give the aimed paste spice. COPYRIGHT: (C)1987,JPO&Japio
Patent•
14 Aug 1986
TL;DR: In this paper, a continuous aging and roasting of spice raw material with an extruder used conventionally in the field of food is described, in which the raw material is charged to the hopper and at the same time, the necessary amount of extracted and concentrated water-soluble natural spice is supplied to the extruder from the humidifying apparatus.
Abstract: PURPOSE:To enable the control of the flavor and spiceness of spices freely, and to obtain uniform spices, by carrying out the aging, roasting and flavoring of the spice raw material with an extruder. CONSTITUTION:In the continuous aging and roasting of spice raw material with an extruder used conventionally in the field of food, the spice raw material is charged to the hopper 1 and at the same time, the necessary amount of extracted and concentrated water-soluble natural spice is supplied to the extruder from the humidifying apparatus 9. The spice raw material added with the extracted and concentrated natural spice is aged, roasted and flavored in the course of passing through the mixing and kneading zone 5 and the cooking zone 6 of the cylinder, and finally extruded through the die 4 in the form of solid.
01 Jan 1986
TL;DR: In this article, an automated, process independent SPICE bipolar device modeling system has been developed, which solves for a complete set of SPICE parameters that when simulated, provide the best mathematical fit to the actual measured performance of the transistor.
Abstract: An automated, process independent SPICE bipolar device modeling system has been developed. The system solves for a complete set of SPICE parameters that when simulated, provide the best mathematical fit to the actual measured performance of the transistor. Automatic computer decisions control all instrument measurements and model extraction procedures, providing consistency between device models, independent of the system operator. With a total measurement and extraction time of less than 30 minutes true statistical process performance may be evaluated.