Showing papers on "Spice published in 1991"
TL;DR: In this paper, the basic diode charge control model used in SPICE is extended to include reverse recovery, and the model is derived from the semiconductor charge transport equations using the lumped charged concept of Linvill, and demonstrated on the Saber simulator for simple inductive and resistive load circuits.
Abstract: The basic diode charge-control model used in SPICE is extended to include reverse recovery. The model is derived from the semiconductor charge transport equations. The diode charge transport equations are simplified using the lumped charged concept of Linvill, and the model is demonstrated on the Saber simulator for simple inductive and resistive load circuits. The two model parameters, diode lifetime and diffusion transit time, can easily be determined from a switching waveform. >
204 citations
TL;DR: An analytic charge sheet capacitance model for short-channel MOSFETs is derived and implemented in SPICE based on a surface potential formulation which computes the approximate surface potential without iterations.
Abstract: An analytic charge sheet capacitance model for short-channel MOSFETs is derived and implemented in SPICE. It is based on a surface potential formulation which computes the approximate surface potential without iterations. The DC current, charges, and their first and second derivatives are continuous under all operating regions. Equations for node charges are derived to guarantee charge conservation. Short-channel effects such as velocity saturation, channel-length modulation, and channel-side-fringing-field capacitances are included in the model equations. The model shows good agreement with the measured gate capacitance for long- and short-channel MOSFETs. The SPICE simulation of a ring oscillator using this model shows the significant variation of circuit performance due to the short-channel effects on capacitances. >
83 citations
TL;DR: A temperature-dependent model for long-channel silicon-on-insulator (SOI) MOSFETs for use in the temperature range 27 degrees C-300 degrees C, suitable for circuit simulators such as SPICE, is presented in this paper.
Abstract: A temperature-dependent model for long-channel silicon-on-insulator (SOI) MOSFETs for use in the temperature range 27 degrees C-300 degrees C, suitable for circuit simulators such as SPICE, is presented. The model physically accounts for the temperature-dependent effects in SOI MOSFETs (such as threshold-voltage reduction, increase of leakage current, decrease of generation due to impact ionization, and channel mobility degradation with increase of temperature) which are influenced by the uniqueness of SOI device structure, i.e. the back gate and the floating film body. The model is verified by the good agreement of the simulations with the experimental data. The model is implemented in SPICE2 to be used for circuit and device CAD. Simple SOI CMOS circuits are successfully simulated at different temperatures. >
78 citations
28 Sep 1991
TL;DR: In this article, a physics-based model for the insulated gate bipolar transistor (IGBT) is implemented into the widely available circuit simulation package IG-SPICE, which accurately describes the nonlinear junction capacitances, moving boundaries, recombination, and carrier scattering.
Abstract: A physics-based model for the insulated gate bipolar transistor (IGBT) is implemented into the widely available circuit simulation package IG-SPICE. Based on analytical equations describing the semiconductor-physics, the model accurately describes the nonlinear junction capacitances, moving boundaries, recombination, and carrier scattering, and effectively predicts the device conductivity modulation. In this paper, the procedure used to incorporate the model into IG-SPICE and various methods necessary to ensure convergence are described. The effectiveness of the SPICE-based IGBT model is demonstrated by investigating the static and dynamic current sharing of paralleled IGBTs with different device model parameters. The simulation results are verified by comparison with experimental results. >
67 citations
TL;DR: A simple, unified, and topology-independent model of basic pulse-width modulated (PWM) power converters is developed using the switched inductor approach, with fewer convergence problems compared to previous simulation models.
Abstract: A simple, unified, and topology-independent model of basic pulse-width modulated (PWM) power converters is developed using the switched inductor approach presented by S. Ben-Yaakov (1989). The model is compatible with SPICE or other similar general-purpose electronic circuit simulators. It can be used to simulate DC, small signal, and transient behavior of PWM converters operating in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). During simulation, the model automatically follows the CCM and DCM operation, with fewer convergence problems compared to previous simulation models. An effective measurement technique using the HP3562A dynamic signal analyzer (DSA) is presented and applied to compare simulation runs with experimental data. The two were found to be in good agreement. >
64 citations
TL;DR: An efficient computer simulation algorithm set, SITA, predicts the vulnerability of data stored in and processed by complex combinational logic circuits to SEU by predicting the spread of such erroneous, latched information through the IC.
Abstract: An efficient computer simulation algorithm set, SITA, predicts the vulnerability of data stored in and processed by complex combinational logic circuits to SEU. SITA is described in detail to allow researchers to incorporate it into their error analysis packages. Required simulation algorithms are based on approximate closed-form equations modeling individual device behavior in CMOS logic units. Device-level simulation is used to estimate the probability that ion-device interactions produce erroneous signals capable of propagating to a latch (or an output node), and logic-level simulation to predict the spread of such erroneous, latched information through the IC. Simulation results are compared to those from SPICE for several circuit and logic configurations. SITA results are comparable to this established circuit-level code, and SITA can analyze circuits with state-of-the-art device densities (which SPICE cannot). At all IC complexity levels, SITA offers several factors of 10 savings in simulation time over SPICE. >
54 citations
01 Jul 1991
TL;DR: In this paper, a circuit simulation model suitable for modeling the static and dynamic switching characteristics of high-frequency power MOSFETs is reported, where the model parameters were obtained from physical device layout, silicon doping, and measured electrical characteristics of power mOSFets.
Abstract: A circuit simulation model suitable for modeling the static and dynamic switching characteristics of high-frequency power MOSFETs is reported. The model parameters were obtained from physical device layout, silicon doping, and measured electrical characteristics of power MOSFETs. Accurate voltage dependencies of the interelectrode capacitances were obtained from extensive two-dimensional device simulations. The voltage dependence of gate-drain capacitance was modeled using an analytic expression. The measured static current-voltage and transient-switching responses under resistive switching conditions are in excellent agreement with simulation results obtained from SPICE. The MOSFET subcircuit model was used to accurately predict the performance of a series-parallel resonant DC-DC converter using a multilevel system simulator. >
52 citations
TL;DR: In this paper, a SPICE simulation model of current-mode PWM converters operating in the continuous mode is described and tested against analytical expressions and experimental data for buck and boost converters.
Abstract: A SPICE simulation model of current-mode pulse-width modulation (PWM) converters operating in the continuous mode is described and tested against analytical expressions and experimental data for buck and boost converters. The simulation model is also used to compare an earlier average model to a recently suggested modification and to examine the effect of the gain factor in the current feedback path. >
36 citations
TL;DR: An analytical delay model for BiCMOS driver circuits is presented and has been applied to find an optimal area allocation between the CMOS and bipolar parts of the driver circuit when the total available area is limited as in the standard cell configuration.
Abstract: An analytical delay model for BiCMOS driver circuits is presented. The model is based on physical device parameters and can be used to estimate both the pull-up and the pull-down times for a variety of circuit configurations. The intrinsic delay associated with the bipolar transistors is taken into consideration by using a charge control model that incorporates the high-injection effects upon the current gain and the base transport factor. Separate sets of delay equations are derived for the pull-up and pull-down transient responses to account for significant differences between the two cases. The comparison with SPICE circuit simulation results shows that the new model predicts the respective delay times with less than 10% error in most cases. The influence of device dimensions upon the driver delay time is also investigated. The model has been applied to find an optimal area allocation between the CMOS and bipolar parts of the driver circuit when the total available area is limited as in the standard cell configuration. >
32 citations
TL;DR: A capacitance model for a GaAs MESFET suitable for implementation in the circuit analysis program SPICE is presented and a comparison of measured capacitance values with the modeled values gives close enough agreement for circuit simulation purposes.
Abstract: A capacitance model for a GaAs MESFET suitable for implementation in the circuit analysis program SPICE is presented. The model consists of nonlinear capacitances that are a function of two voltages. Such a model gives rise to ordinary nonlinear capacitances and transcapacitances. The placement of these elements in the Y matrix is shown. The empirical equations for the gate charge of a GaAs MESFET given provide an accurate SPICE model for the gate charge and capacitances of a MESFET. A comparison of measured capacitance values with the modeled values gives close enough agreement for circuit simulation purposes. >
26 citations
TL;DR: In this paper, a numerical model of orthogonal core transformers for use in spice was devised on the basis of the magnetic circuit of the transformers with the saturation and hysteresis effects.
Abstract: This paper deals with a numerical model of orthogonal‐core transformers for use in spice. The model was devised on the basis of the magnetic circuit of the orthogonal‐core with the saturation and hysteresis effects. Using the numerical model, the behavior of the dc‐ac converter constructed with the orthogonal‐core transformers and square‐wave transistor choppers was analyzed. The calculated values and measured ones show a good agreement. The method presented here is suitable for the circuit analysis and design optimization of the dc‐ac converter taking account of nonlinear characteristics of the orthognal‐cores and semiconductor devices used in the converter.
Journal Article•
TL;DR: The basic SPICE models for acoustic mass, resistance, and compliance, mechanical mass, compliance, and electrical-to-mechanical transducers are given in this article, and the basic models for electrical and mechanical transducers for acoustic and mechanical mass and compliance are discussed.
Abstract: The basic SPICE models for acoustic mass, resistance, and compliance; mechanical mass, resistance, and compliance; electrical-to-mechanical transducers; and mechanical-to-acoustical transducers are given
TL;DR: In this article, the authors describe a methodology by which noise sources in converters can be modeled using SPICE, which allows easy identification of dominant noise sources within a given topology for a given set of noise parameters.
Abstract: The authors describe a methodology by which noise sources in converters can be modeled using SPICE. Two converter topologies were used to illustrate the noise analysis methodology. SPICE input files constitute a noise model of a particular converter topology whose noise parameters may be changed to match actual converter noise behavior more closely. SPICE simulations are used to verify the analytical results and to examine typical noise levels in all of the circuits. The SPICE noise models allow easy identification of dominant noise sources within a given topology for a given set of noise parameters. The effects of changing the parameters of the dominant noise sources (e.g., using components designed for low noise) are examined to address design implications of the noise analysis. The effects of all noise sources on an analog-to-digital-to-analog converter system are examined. >
01 Jan 1991
TL;DR: In this paper, the basic diode charge control model used in SPICE is extended to include reverse recovery, and the model is demonstrated on the Saber simulator for simple inductive and resistive load circuits.
Abstract: The basic diode charge-control model used in SPICE is extended to include reverse recovery. The diode charge transport equations are simplified using the lumped charge concept of Linvill, and the model is demonstrated on the Saber simulator for simple inductive and resistive load circuits. The two model parameters, diode lifetime τ and diffusion transit time T M can be easily determined from a switching waveform
28 Sep 1991
TL;DR: In this paper, a SPICE circuit model simulating a simplified voltage-current characteristic of an arc discharge during the ignition is proposed, which is constructed from a two-transistor circuit which simulates a nonlinear load with a negative resistance portion.
Abstract: A SPICE circuit model simulating a simplified voltage-current characteristic of an arc discharge during the ignition is proposed. The model is constructed from a two-transistor circuit which simulates a nonlinear load with a negative resistance portion. The proposed model is simulated with a simplified arc ignition circuit and compared with experimental results. Limitations of both the arc model and the simulation procedure are discussed. In a number of simulation cases, the arc current and voltage waveforms obtained were not consistent with expected results. This was attributed to restrictions in the simulation program SPICE when dealing with the peculiar V-I characteristic of an arc. It is proposed that these simulation failures could also reflect actual circuit deficiencies in the selection of capacitor and inductor values. >
09 Sep 1991
TL;DR: In this paper, the effects of self-heating on BJT transistor behavior are demonstrated through measurement and simulation through a frequency-domain solution to the heat-flow equation which applies to any rectangular emitter geometry.
Abstract: The effects of self-heating on BJT (bipolar junction transistor) behavior are demonstrated through measurement and simulation. Most affected are the small-signal parameters Y/sub 22/ and Y/sub 12/. A frequency-domain solution to the heat-flow equation which applies to any rectangular emitter geometry is presented. This model, although simple enough for CAD, (computer-aided design) predicts thermal spreading impedance with good accuracy for a wide range of frequencies. The small-signal model has been implemented in SPICE. >
TL;DR: New high-speed analogue circuits are proposed for realising two-input maximum (MAX) and two- input minimum (MIN) operations using OTA-based bounded-difference operations.
Abstract: New high-speed analogue circuits are proposed for realising two-input maximum (MAX) and two-input minimum (MIN) operations. These circuits are synthesised using OTA-based bounded-difference operations. SPICE simulation is used to confirm their performance.
TL;DR: It is shown that the SPICE model for the BC-MOSFET is in good agreement with experimental measurements and the charge model and the importance of incorporating all of the models of operation are illustrated.
Abstract: A buried-channel (BC) MOSFET model for DC, transient and small-signal circuit simulation, which has been incorporated into SPICE 3B1, is presented. The model includes all of the modes of operation inherent to the BC-MOSFET, including the partial modes of operation. The equivalent circuit for the BC-MOSFET is presented, and the static, transient, and small-signal equations used for SPICE implementation are systematically described. The surface and bulk mobility models used in the static current-voltage characteristic are highlighted. The charge model and the importance of incorporating all of the models of operation are illustrated. A number of examples are given to illustrate the BC-MOSFET SPICE model. It is shown that the SPICE model for the BC-MOSFET is in good agreement with experimental measurements. >
07 Apr 1991
TL;DR: In this paper, an equivalent circuit representing a two-junction cascade solar cell is presented, where the solar cell diode equations are applied and terms for the light-generated currents, diffusion currents, space charge recombination currents, series and shunt resistance, the resistance for the window layer and the substrate, and the equivalent resistance for tunnel diode are included.
Abstract: An equivalent circuit representing a two-junction cascade solar cell is presented. The solar cell diode equations are applied. Terms for the light-generated currents, diffusion currents, space charge recombination currents, series and shunt resistance, the resistance for the window layer and the substrate, and the equivalent resistance for the tunnel diode are included. An AlGaAs/GaAs cascade solar cell is considered as an example. SPICE was used to simulate the cascade solar cell for the following: the cascade solar cell I-V curve with temperature as a parameter, the cascade cell P-V curves with temperature as a parameter, open-circuit voltage of the cascade cell versus temperature, and fill factor of the cascade cell versus temperature. The results of this SPICE simulation compared favorably with the data available in the published literature. >
TL;DR: A Zener diode macro model that has accurate I-V simulation characteristics and can be easily constructed using SPICE-provided primitives is presented.
Abstract: The problems encountered when using the existing SPICE diode model to represent the I-V characteristics of a Zener diode in the reverse region are examined. A Zener diode macro model that has accurate I-V simulation characteristics and can be easily constructed using SPICE-provided primitives is presented. The static I-V characteristics and temperature response of the diode are reviewed. The performance of the model is discussed, and its main enhancements as compared to the SPICE model are identified. >
01 Apr 1991
TL;DR: In this paper, an analytical model for single and double heterojunction bipolar transistors has been developed by employing the concepts of the Gummel-Poon model, and equations for injected minority carrier concentrations are developed based on the thermionic diffusion theory.
Abstract: An analytical model for single and double heterojunction bipolar transistors has been developed by employing the concepts of the Gummel-Poon model. The equations for injected minority carrier concentrations are developed based on the thermionic diffusion theory. Linking current and total charges in the base are calculated. The Early voltages are treated as functions of the applied voltages rather than as constants. Tunnelling effect has been considered for abrupt heterojunctions. The resemblance of this model with the SPICE BJT model makes it easy to implement it in SPICE.
14 May 1991
TL;DR: In this paper, a SPICE subcircuit model for Zener and avalanche diodes is presented, which can simulate the operation of these devices over wide ranges of current and temperature.
Abstract: A SPICE subcircuit model for Zener and avalanche diodes which can simulate the operation of these devices over wide ranges of current and temperature, using a single set of parameters and a SPICE.TEMP statement, is described. The model is believed to be compatible with most SPICE-based circuit simulators, since it was designed to run in version 2G.6 of Berkeley SPICE. Although the emulation of a single component with a subcircuit of up to seven components may seem overly complex, in many cases the increased accuracy and ease of use will overshadow the increase in circuit complexity. >
11 Jun 1991
TL;DR: Initial test run results confirm the expected improvement in the speed-up factor due to both the decomposition algorithm and the multi-processor implementation.
Abstract: The authors describe the implementation and further development of a decomposition algorithm derived to make SPICE (simulation program with integrated circuit emphasis) run in parallel for simulation of large-scale circuits and/or other applications which take advantage of such a parallel processing technique. Transputers were chosen for the hardware platform. Initial test run results confirm the expected improvement in the speed-up factor due to both the decomposition algorithm and the multi-processor implementation. >
TL;DR: The solution of sets of coupled differential equations using SPICE is treated, and the SPICE transient analysis option TRAN is used to invoke the DCTRAN module, which performs the DC operating point analysis, the initial-condition of transient analysis,The DC transfer characteristic analysis, andThe transient analysis.
Abstract: The solution of sets of coupled differential equations using SPICE is treated. The equations are rearranged so that each of the variables appears as a current through a 1- Omega resistor, and the SPICE transient analysis option TRAN is used to invoke the DCTRAN module. This module performs the DC operating point analysis, the initial-condition of transient analysis, the DC transfer characteristic analysis, and the transient analysis. By initially invoking the subroutine LOAD, the linearized system of nodal equations for the specific iteration is constructed. Separate computation of the nonlinear devices' contribution to the Y matrix is carried out by the respective subroutines. >
11 Jun 1991
TL;DR: In this paper, the linearized DC hybrid equations of a given circuit's operating point can yield information about operating point stability, and this information can be easily obtained from the results of the usual SPICE DC operating point analysis.
Abstract: The authors show that SPICE can sometimes converge to an unstable operating point, and that this can be misleading to a circuit designer. They show that the linearized DC hybrid equations of a given circuit's operating point can yield information about operating point stability, and that this information can easily be obtained from the results of the usual SPICE DC operating point analysis. This information can then be passed on to the user as a warning when an unstable operating point is found. The authors show that this algorithm can be implemented in SPICE with a minor modification, incurring a negligible increase in CPU time. >
22 May 1991
TL;DR: In this article, a SPICE-compatible submicron LDD MOS transistor model for simulating the hot electron effect in VLSI circuit is proposed, which includes a consistent DC (I-V) and hot electron induced degradation model.
Abstract: A newly-developed SPICE-compatible submicron LDD MOS transistor model for simulating the hot electron effect in VLSI circuit is proposed. It includes a consistent DC (I-V) and hot electron induced degradation model. Experiment measurement, parameter extraction and optimization were performed to obtain a new set of drain- and substrate-current under both DC- and AC-stress conditions. Incorporation of the above model equations in SPICE has been made. In addition, hot electron induced degradation effect and the reliability analysis in a circuit simulation environment are demonstrated with practical examples. >
01 Apr 1991
TL;DR: Based on the SPICE 2G6 program some techniques of simulation of algebraic functions and nonlinear equations are introduced and are used to solve practical problems encountered in the design of nonlinear circuits.
Abstract: Based on the SPICE 2G6 program some techniques of simulation of algebraic functions and nonlinear equations are introduced. These techniques are used to solve practical problems encountered in the design of nonlinear circuits. The need for mixed equation and circuit simulation is also described. An example of mixed simulation is implemented to demonstrate the capability and practicality of this type of simulation.
11 Jun 1991
TL;DR: An equivalent circuit model of switches for SPICE simulation is proposed, and a boost DC-DC converter with different switching frequency is simulated by using SPICE, and the results are compared with those given by state space averaging model of the converter.
Abstract: An equivalent circuit model of switches for SPICE simulation is proposed. Using the equivalent circuit model, a boost DC-DC converter with different switching frequency is simulated by using SPICE, and the results are compared with those given by state space averaging model of the converter. The SPICE simulation results of other DC-DC converters such a buck, buck-boost and Cuk circuits, can also be simulated by using the equivalent circuit model proposed. >