Showing papers on "Spice published in 2012"

A SPICE Compact Model of Metal Oxide Resistive Switching Memory With Variations

Abstract: A SPICE compact model is developed for metal-oxide-based resistive random access memory (RRAM). The model includes the critical impact of temperature change and temporal variation. Using experimental data from HfOx-based RRAM, the model reproduces both the voltage-time relationship and the cycle-to-cycle variation in the RESET of the memory cells.

Small Signal Modeling of LLC Resonant Converters Based on Extended Describing Function

Abstract: Due to the advantages of low switching loss and high efficiency, LLC resonant converters have been widely used. Based on the extended describing function concept, the small-signal model of an LLC resonant converter is derived in this paper. The equivalent circuit of small-signal model is illustrated so that the corresponding frequency response can be easily obtained by using Is Spice simulation. The well agreement with experimental measurements has verified the accuracy of the derived small-signal model.

Thermohaline structure in the California Current System: Observations and modeling of spice variance

Abstract: [1] Upper ocean thermohaline structure in the California Current System is investigated using sustained observations from autonomous underwater gliders and a numerical state estimate. Both observations and the state estimate show layers distinguished by the temperature and salinity variability along isopycnals (i.e., spice variance). Mesoscale and submesoscale spice variance is largest in the remnant mixed layer, decreases to a minimum below the pycnocline near 26.3 kg m−3, and then increases again near 26.6 kg m−3. Layers of high (low) meso- and submesoscale spice variance are found on isopycnals where large-scale spice gradients are large (small), consistent with stirring of large-scale gradients to produce smaller scale thermohaline structure. Passive tracer adjoint calculations in the state estimate are used to investigate possible mechanisms for the formation of the layers of spice variance. Layers of high spice variance are found to have distinct origins and to be associated with named water masses; high spice variance water in the remnant mixed layer has northerly origin and is identified as Pacific Subarctic water, while the water in the deeper high spice variance layer has southerly origin and is identified as Equatorial Pacific water. The layer of low spice variance near 26.3 kg m−3 lies between the named water masses and does not have a clear origin. Both effective horizontal diffusivity, κh, and effective diapycnal diffusivity, κv, are elevated relative to the diffusion coefficients set in the numerical simulation, but changes in κh and κv with depth are not sufficient to explain the observed layering of thermohaline structure.

SPICE macromodel of silicon-on-insulator-field-effect-transistor-based biological sensors

Abstract: A user-friendly behavioral macromodel for biological response of FET-based transistors has been developed for use with commercial SPICE versions and will enable circuit level analysis of biosensor chips. The model is based on the physically realistic representation of biological layers using an ion-permeable charged membrane model. Simulations demonstrate good agreement to experimental results. Logarithmic increments in bound membrane charge result in linear threshold voltage shifts. The model accounts for phenomena such as Debye screening of biomolecules resulting in reduced sensor response to increments in salt concentration. Additionally, the presence of site binding charge on oxide surfaces is shown to severely deteriorate sensitivity.

Electrothermal model of a power LED for SPICE

Abstract: SUMMARY In this paper an electrothermal model of the power LED dedicated for SPICE is proposed. In this model electrical, thermal and optical properties of the considered device are taken into account. The description of the model and some results of the experimental verification of this model are presented for two types of power LEDS: LXHL-BW03 and LXHL-LW3C produced by Lumileds. A good agreement between the results of measurements and calculations is obtained. Copyright © 2011 John Wiley & Sons, Ltd.

${\rm SPICE}^2$ : Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA

Abstract: Spatial processing of sparse, irregular, double-precision floating-point computation using a single field-programmable gate array (FPGA) enables up to an order of magnitude speedup (mean 2.8× speedup) over a conventional microprocessor for the SPICE circuit simulator. We develop a parallel, FPGA-based, heterogeneous architecture customized for accelerating the SPICE simulator to deliver this speedup. To properly parallelize the complete simulator, we decompose SPICE into its three constituent phases-model evaluation, sparse matrix-solve, and iteration control-and customize a spatial architecture for each phase independently. Our heterogeneous FPGA organization mixes very large instruction word, dataflow and streaming architectures into a cohesive, unified design to match the parallel patterns exposed by our programming framework. This FPGA architecture is able to outperform conventional processors due to a combination of factors, including high utilization of statically-scheduled resources, low-overhead dataflow scheduling of fine-grained tasks, and streaming, overlapped processing of the control algorithms. We demonstrate that we can independently accelerate model evaluation by a mean factor of 6.5 × (1.4-23×) across a range of nonlinear device models and matrix solve by 2.4×(0.6-13×) across various benchmark matrices while delivering a mean combined speedup of 2.8×(0.2-11×) for the composite design when comparing a Xilinx Virtex-6 LX760 (40 nm) with an Intel Core i7 965 (45 nm). We also estimate mean energy savings of 8.9× (up to 40.9×) when comparing a Xilinx Virtex-6 LX760 with an Intel Core i7 965.

An automatic gain control circuit with TiO2 memristor variable gain amplifier

Abstract: An automatic gain control (AGC) topology with a variable gain amplifier utilizing a titanium dioxide (TiO2) memristor is described. A system analysis technique is developed based on the published physical charge-controlled memristor models and unique properties of this passive device. A linearized feedback loop amplitude model is used to design the AGC, and a design tradeoff analysis based on distortion performance is developed. The analysis results are verified with SPICE simulation including a TiO2 memristor SPICE model.

Submicron Ambipolar Nanocrystalline Silicon Thin-Film Transistors and Inverters

Abstract: Nanocrystalline silicon (nc-Si) thin-film transistors (TFTs) fabricated at a maximum processing temperature of 250 °C operate with high field-effect mobility compared with amorphous-silicon TFTs. By reducing the oxygen content in the channel layer, ambipolar behavior can be obtained. Two levels of electron-beam lithography are employed to fabricate nc-Si TFTs with nanoscale dimensions that operate without significant short-channel effects for gate lengths down to 200 nm. The TFTs have current-voltage (I- V) characteristics with on-off ratio >; 105 at ±1 V drain voltage and low threshold voltage shift. Simulation Program with Integrated Circuit Emphasis (SPICE) software is used to model the TFTs, and it is validated by performing the fit to devices of different dimensions. An inverter constituent of nc-Si TFTs offers high voltage gain (10-12) and frequency response better than 2 MHz. The crowbar current associated with the inverter can be minimized by using an optimized geometry ratio based on the leakage currents of the TFTs. An amplifier circuit is also demonstrated, offering an ac gain in the frequency range of 100 Hz-10 kHz. SPICE simulations of the inverter and amplifier show close agreement with measured data. The fabricated devices are well suited for use in high-density architectures.

A sparsity promoting bilinear unmixing model

Abstract: An algorithm, Bilinear SPICE (BISPICE), for simultaneously estimating the number of endmembers, the endmembers, and proportions for a bilinear mixing model is derived and evaluated. BISPICE generalizes the SPICE algorithm for linear mixing. The proportion estimation steps of SPICE and BISPICE are similar. However, the endmember updates, one novel aspect of the work, are quite different. The SPICE objective function is quadratic in the endmembers. The BISPICE is a fourth degree polynomial. In SPICE, endmembers are updated simultaneously via a closed form. In BISPICE, each endmember must be updated with respect to all other endmembers. Empirically, BISPICE estimated endmembers and proportions more accurately then SPICE, even though the data fitting error was higher.

SPICE model development for SiC power MOSFET

Abstract: SiC Power MOSFETs show a tremendous potential for high voltage, high temperature, high-power and high-frequency power electronic applications. A simplified SPICE model is proposed for the SiC Power MOSFET, CMF20120D, based on the understanding of the power MOSFET discrete devices terminal behavior. The aim of the model development is to reuse the available built-in MOSFET models of the regular lateral MOS devices in the commercial SPICE simulators and propose a new model to depict the same behavior as expected by SiC device. The advantage of such model is the limited number of required parameters, which can readily be extracted from simple external terminal measurements or from standard datasheets. The results of simulation and comparison with real device measurement show appreciable closeness with the datasheet.

Electro-thermal modeling of power LED using SPICE circuit solver

Abstract: This paper presents a method of multi-domain modeling for power Light Emitting Diodes (LEDs) with the goal of providing the ability for simultaneous simulations of electrical, thermal and optical behavior. This approach enables engineers to have a better insight into LED critical performance parameters in various operating conditions, by considering the main electrical-thermal and optical interactions. Our proposed multi-domain model integrates an electrical model based on typical diode equations, a dynamic thermal model composed of a Cauer type RC network driven by currnet source, and an optical model derived from the forward current and junction temperature variations of the total luminous flux. The presented approach offers three significant advantages over the traditional single-domain modeling: the effects of packaging and board level thermal management can be evaluated in correlation with electrical parameters, the self heating effect of the junction can be analyzed in the time domain, and the variation of luminous flux output can be observed. The model is defined based on SPICE circuit elements and can be used with any conventional SPICE circuit solver, without the need for solver algorithm modification. The inputs necessary for defining the model are based on standard LED measurements and are often specified in the manufacturer's datasheets. All the necessary algorithms required to obtain the multi-domain model SPICE code were implemented in Matlab.

Design of a Step-Up/Step-Down k (=2,3, ...)-Fibonacci DC-DC Converter Designed by Switched-Capacitor Techniques

Abstract: A step-up/step-down k(=2, 3, ...)-Fibonacci switched-capacitor (SC) DC-DC converter is proposed in this paper. Unlike conventional Fibonacci step-up converter, the proposed converter can provide not only stepped-up voltages but also stepped-down voltages, where the k-Fibonacci ratios such as Tribonacci numbers, Tetranacci numbers, etc. are demonstrated by using the minimum number of capacitors. Concerning conversion ratios, output voltages and power efficiency, the properties of the proposed converter are investigated by theoretical analysis and simulations. Through simulation program with integrated circuit emphasis (SPICE) simulations and theoretical analysis, the following results are shown: 1. The simulation results show that the proposed converter can achieve not only higher step-up/step-down conversion ratios but also more various kinds of output voltages than conventional converters. 2. The theoretical formula obtained from the theoretical analysis is proved as an effective method for estimating the characteristic of the proposed converter, because the theoretical results corresponded well with the SPICE simulated results.

SPICE Modeling of the Scaling of Resonant Tunneling Diodes and the Effects of Sidewall Leakage

Abstract: Si/SiGe and AlGaAs/GaAs resonant tunneling diodes (RTDs) are realized using a self-aligned fabrication process with dimensions ranging from 50 μm down to 30 nm. Using these devices, scaling rules are developed and incorporated into a modified SPICE model. The depletion width and the sidewall current are extracted from the model. The results confirm that the parasitic sidewall current is responsible for the reduction in peak-to-valley current ratio (PVCR) in small-diameter RTDs. A new device layout is demonstrated to significantly reduce the sidewall current for optimum nanoscale performance. Improvements in the PVCRs are demonstrated by this approach.

SPICE simulator for hybrid CMOS memristor circuit and system

Abstract: Memristor is a two-terminal non-linear passive electrical device. After its recently successful fabrication, a variety of applications based on memristor have been explored, such as non-volatile memory, reconfigurable computing and neural network. However, one major challenge when designing hybrid CMOS memristor integrated circuit is the lack of SPICE-like simulator for design validation. Current approach is to describe memristor device with equivalent circuit, which is however extremely time-consuming for large scale design simulation due to additional modeling components. In this paper, a memristor SPICE simulator is introduced based on the recent new modified nodal analysis (MNA) framework, which can effectively support the non-conventional state variable such as doping ratio of memristor. As such, the memristor device can be stamped into state matrix similarly as one BSIM MOSFET. Compared with equivalent circuit simulation approach, our new MNA based approach exhibits 40x less simulation time for a 32×32 memristor crossbar circuit. A hybrid CMOS memristor circuit for classic conditioning training has also been studied by the developed SPICE simulator.

Physical Parameter-Based SPICE Models for InGaZnO Thin-Film Transistors Applicable to Process Optimization and Robust Circuit Design

Abstract: In this letter, we show that the physics-based equation that was derived for amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) in our previous work can be successfully incorporated into the SPICE model via Verilog-A. The proposed model and extracted SPICE parameters successfully reproduce the measured current-voltage characteristics of amorphous indium-gallium-zinc-oxide (a-IGZO) TFTs and the load line diagram of a-IGZO TFT inverters. The main advantage of our model is that each parameter has its physical meaning and most of them can be related with the fabrication conditions of AOS TFTs. To show the advantage of the proposed models and extracted SPICE parameters more clearly, we investigate the effect of ionized donor concentration (ND+) on the inverter circuit operation and determine the optimum value of ND+ and device dimensions considering the tradeoff between the power consumption and the output swing in a-IGZO inverters. The proposed physics-based SPICE model via Verilog-A is expected to play a significant role in the process optimization and circuit design with AOS TFTs.

SPICE Lumped Circuit Subcell Model for the Discontinuous Galerkin Finite-Element Time-Domain Method

Abstract: A SPICE lumped circuit subcell model is formulated within the discontinuous Galerkin finite-element time-domain (DGFETD) discretization of Maxwell's equations. A fourth-order exponential time difference (ETD) algorithm is used for circuits that lead to stiff systems. The ETD method reduces to a standard fourth-order Runge-Kutta (RK4) time-integration for nonstiff regions. A number of test cases, including a microstrip transmission line terminated with general RLC networks, load arrays, and a diode detector are presented for the validation of the proposed hybrid DGFETD/SPICE solution method.

Microwave and RF p-i-n Diode Model for Time-Domain Simulation

Abstract: A dynamic time-domain model suitable for simulating the behavior of high-speed high-power p-i-n diodes is presented. This time-domain model accurately describes not only the charge storage behavior in the p-i-n diode in forward bias, but also the reverse-bias capacitance and resistance as a function of reverse voltage. A SPICE implementation of the time-domain model is fully described and a spreadsheet is being made available to the microwave community. The time-domain model is verified with experimental data and good agreement was obtained in both diode bias states. Three applications describing the linear, nonlinear, and transient behavior of the p-i-n diode simulated using the time-domain model are also presented. This improved time-domain model and associated SPICE implementation allows full modeling of high-speed high-frequency p-i-n diodes.

A non-iterative physical procedure for RF CMOS compact model extraction using BSIM6

Abstract: We present a non-iterative and physical five-step RF SPICE model extraction procedure. This procedure is applicable to any MOSFET compact model with all necessary RF-related components in it. This methodology has been validated on silicon data from multiple technology nodes for a wide range of bias and frequency.

DVCCCTA-Based Implementation of Mutually Coupled Circuit

Abstract: This paper presents implementation of mutually coupled circuit using differential voltage current-controlled conveyor transconductance amplifier (DVCCCTA). It employs only two DVCCCTAs, one grounded resistor, and two grounded capacitors. The primary, secondary, and mutual inductances of the circuit can be independently controlled and tuned electronically. The effect of non-ideal behaviour of DVCCCTA on the proposed circuit is analyzed. The functionality of the proposed circuit is verified through SPICE simulation using 0.25 μm TSMC CMOS technology parameters.

EMC Analysis of Electric Drives

Abstract: In order to study conducted ElectroMagnetic Interference (EMI) emissions along a frequency band, circuit models of main components in the drive system are considered to be effective means to understand, predict, and control the phenomenon. These models should cover the capacitive and inductive coupling behaviour of the component along the frequency band of interest. Despite the dynamic behaviour of EMC-related issues, these detailed circuit models when used under generic SPICE simulation softwares, are very helpful for designrelated and troubleshooting activities. In this thesis the capacitive and inductive coupling for a winding on a laminated ferro-magnetic core prototype has been investigated and analysed with the aid of FEMM software package. Capacitive coupling analysis resulted in the generation of complex capacitance network expressing a certain wiring arrangement. This is achieved by automatically generating a netlist file which contains capacitance values and structure to be represented under SPICE simulation software. In the netlist file the turn-to-turn capacitances (Ctt) and turn-to-ground capacitances (Ctg) are calculated from FEMM analysis through a MATLAB code and linked back to MATLAB by a Sparse Matrix Representation in order to control the accuracy and complexity of the resulting network. Inductive coupling analysis has led to the proposal of a SPICE circuit model for a single turn of copper winding on iron core. This has been accomplished by the quantification of the magnetic analysis output from FEMM, creating zero-pole-gain models and transfer functions of the SPICE model components, and then making use of the pole-zero maps and Bode plots utilities under MATLAB to analytically propose compensation factors for the complete SPICE circuit model components of a single copper turn, in order to fulfill lowand highfrequency behaviour. Given the capacitive and inductive coupling of the winding turns, the resulting SPICE circuit model output is compared against measurements of the prototype taken by Hewlett Packard (hp) impedance analyzer 4194A where it showed very good agreement.

Modeling and design of a nano scale CMOS inverter for symmetric switching characteristics

Abstract: This paper presents a technique for the modeling and design of a nano scale CMOS inverter circuit using artificial neural network and particle swarm optimization algorithm such that the switching characteristics of the circuit is symmetric, that is, has nearly equal rise and fall time and equal output high-to-low and low-to-high propagation delay. The channel width of the transistors and the load capacitor value are taken as design parameters. The designed circuit has been implemented at the transistor-level and simulated using TSPICE for 45 nm process technology. The PSO-generated results have been compared with SPICE results. A very good accuracy has been achieved. In addition, the advantage of the present approach over an existing approach for the same purpose has been demonstrated through simulation results.

Noise power normalisation: extension of gMsub>m /I d technique for noise analysis

Abstract: MOSFET models for deep submicron technologies involve accurate and complex equations not suitable for hand analysis Although the gm/ID design-oriented approach has overcome this limitation by combining hand calculations with data obtained from SPICE simulations, it has not been systematically used for noise calculations, since the dependence of noise on this parameter is not direct An attempt to express noise as a function of gm/ID is presented By introducing the normalised noise concept, noise curves that depend solely on the device length and operation point can be obtained directly from SPICE simulations, and then used in the design flow The main outcome is a simple design-oriented methodology for noise calculations that does not depend on equations for a specific technology or operating region, and that is easy to migrate among different technologies

SiC Schottky Diode surge current analysis and application design using behavioral SPICE models

Abstract: This work presents thermal analysis results of surge current test performed on pressed-pack encapsulated SiC Schottky Diodes. An original method for temperature evaluation during high current pulses, based on behavioural SPICE models, was used to approach the analysis. Silicon Carbide (SiC) is one of the most adequate wide bandgap (WBG) material for manufacturing high temperature and high power electronics. However, the actual generation of commercially available SiC power diodes (Schottky and JBS) shows a maximum junction temperature of only 175°C. This important derating of the SiC devices, which theoretically are capable to sustain much higher temperatures, is due to the packaging limitation. The aim of our investigations is to overcome the actual limitations of SiC device packaging and to obtain reliable SiC devices able to operate at temperatures over 300oC.

The impact of hot carriers on timing in large circuits

Abstract: This paper focuses on hot carrier (HC) effects in large scale digital circuits and proposes a scalable method for analyzing circuit-level delay degradations. At the transistor level, a multi-mode energy-driven model for nanometer technologies is employed. At the logic cell level, a methodology that captures the aging of a device as a sum of device age gains per signal transition is described, and the age gain is characterized using SPICE simulation. At the circuit level, the cell-level characterizations are used in conjunction with probabilistic methods to perform fast degradation analysis. The proposed analysis method is validated by Monte Carlo simulation on various benchmark circuits, and is proved to be accurate, efficient and scalable.

A new OLED SPICE model for pixel circuit simulation in OLED-on-silicon microdisplay design

Abstract: A new equivalent circuit model of organic-light-emitting-diode (OLED) is proposed. As the single- diode model is able to approximate OLED behavior as well as the multiple-diode model, the new model will be built based on it. In order to make sure that the experimental and simulated data are in good agreement, the constant resistor is exchanged for an exponential resistor in the new model. Compared with the measured data and the results of the other two OLED SPICE models, the simulated I -V characteristics of the new model match the measured data much better. This new model can be directly incorporated into an SPICE circuit simulator and presents good accuracy over the whole operating voltage.

Accuracy improvement of the output impedance model for capacitive down-converters

Abstract: Contemporary models fail to include the influence of the output buffer capacitor size on the performance of capacitive DC---DC converters. This letter examines the relevance of this dependency and shows how to adapt existing models in order to include it. The improved model is verified mathematically for down-converters, by means of Spice simulations and based on measurements of silicon integrated prototypes. Measurements demonstrate an accuracy improvement of up to 30 % compared with the conventional model.

A cmos current rectifier configuration suitable for integration

Abstract: In this paper, a CMOS-based one input-two output current-mode (CM) circuit structure for providing full-wave rectification and half-wave rectifications to clarify the theory is proposed. The suggested configuration has many important advantages such as dissipating very less power, employing reduced number of CMOS transistors, having high output impedance currents and without requiring any additional bias currents and voltages. In order to exhibit performance and effectiveness of the proposed topology, SPICE simulation results are given.