Showing papers on "Spice published in 2016"

Electronically tunable memristor emulator circuit

Abstract: In this paper, memristor emulator circuit which is built with off the shelf electronic devices is presented. It consists of three operational transconductance amplifiers (OTA) and four second generation current conveyors (CCII). Using OTA offers an extra control parameter, operational transconductance parameter (gm), in addition to frequency (f) and amplitude value of voltage across emulator (vm). Since gm is proportional to current flowing through the bias terminal of OTA, it is possible to change the memristance variation via a simple change of amplitude value. Since gm parameter is adjustable via an external dc voltage/current source, the memristance of presented emulator circuit is electronically tuneable. Mathematical model is derived to characterize the behaviour of the emulator circuit. Frequency analysis is performed to determine how to maintain the pinched hysteresis loop at high frequencies. The presented emulator circuit is simulated with SPICE simulation program. The breadboard experiment of emulator circuit is built using CA3080 and AD844 ICs for OTA and CCII devices respectively. Frequency dependent pinched hysteresis loop in the current versus voltage plane holds up to 10 kHz. Mathematical model and theoretical analyses show a good agreement with SPICE simulation and experimental test results.

SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds

Abstract: In this work, we propose a physical memristor/resistive switching device SPICE compact model, that is able to accurately fit both unipolar/bipolar devices settling to its current-voltage relationship. The proposed model is capable of reproducing essential device characteristics such as multilevel storage, temperature dependence, cycle/event handling and even the evolution of variability/parameter degradation with time. The developed compact model has been validated against two physical devices, fitting unipolar and bipolar switching. With no requirement of Verilog-A code, LTSpice, and Spectre simulations reproduce distinctive phenomena such as the preforming state, voltage/cycle dependent random telegraph noise and device degradation.

A Systematic Approach to Modeling Complex Magnetic Devices Using SPICE: Application to Variable Inductors

Abstract: In this paper, a methodology to develop SPICE-based models of complex magnetic devices is presented. The proposed methodology is based on a reluctance equivalent circuit, which allows the user to study both the magnetic and electric behavior of the structure under any operating conditions. The different elements required to implement the reluctance model, namely, constant reluctances, variable reluctances, and windings, are implemented using SPICE behavioral modeling. These elements can thus be used to build a complete model for any magnetic device. The modeling process is illustrated with a particular example for a variable inductor. Simulations and experimental results are presented and compared to evaluate the accuracy and usefulness of the proposed modeling procedure.

The Spice Book

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MNL-FDTD/SPICE Method for Fast Analysis of Short-Gap ESD in Complex Systems

Abstract: This paper presents a magnetically mixed Newmark-Leapfrog finite-difference time-domain (MNL-FDTD) method for efficient three-dimensional electromagnetic simulations of transient interactions between a spark channel of air-discharge electrostatic discharge (ESD) occurred at a short gap and its surrounding environment. The formulation is based on introducing the implicit Newmark-Beta method into the explicit leapfrog scheme of Yee's FDTD method directionally and magnetically. The stability condition of the algorithm does not include the mesh step in the channel direction, and therefore, is more relaxed than the Courant–Friedrichs–Lewy condition of the Yee scheme. For combined full-wave/circuit systems involving air-discharge ESD, both the sequential and simultaneous solutions are discussed in the context of MNL-FDTD. A stable direct linking of MNL-FDTD with SPICE is presented to include a discharge current characterized by arbitrary spark resistance. The relaxed stability is maintained in the combined systems. The presented method is verified with three spark resistance formulae. The accuracy, stability, and computational efficiency of the method are demonstrated in comparison with the conventional approaches in several numerical examples.

Novel SPICE model for common mode choke including complex permeability

Abstract: A highly accurate filter simulation requires a high precision SPICE model for the common mode choke. Conventional SPICE models for chokes consist of parallel RLC circuits and show a substantial difference between the measured and simulated impedance characteristics due to the lack of frequency-dependent complex permeability considerations. Here, we propose a novel SPICE model for a common mode choke that includes the frequency-dependent complex permeability. This model uses a transfer function in the s-domain to describe frequency-dependent elements. Moreover, two model parameter estimation methods are proposed; a measurement based method and a datasheet based method. High accuracy is achieved with the measurement based model by extracting the model parameter using the measured impedance characteristics of the actual coil. In the datasheet based method, the model parameter is estimated from the datasheet and the shape of the coil without the actual coil. Finally, we show that not only the impedance characteristics of a choke can be expressed, but also the insertion loss of a T-type filter can be predicted much more accurately than presently possible using a conventional model. This SPICE model is the first to express the frequency-dependent inductance and resistance of the choke with high accuracy; therefore, it is expected to be useful for filter design.

A new DVCC-based fully cascadable voltage-mode full-wave rectifier

Abstract: In this paper, a new voltage-mode (VM) full-wave rectifier circuit employing two plus-type differential voltage---current conveyors, two grounded resistors, and two diodes is proposed. The proposed full-wave rectifier enjoys high input impedance and low output impedance; accordingly, it is suitable for direct cascading with other VM circuits without requiring additional buffers. It employs only two grounded resistors which are advantageous for integrated circuit implementations. However, it needs a single resistor-matching condition. It is simulated using SPICE program to verify the theoretical analysis.

Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs

Abstract: A 3-D simulation of substrate currents is crucial to analyze parasitic coupling effects due to minority carrier injection in smart power ICs. In this paper, a substrate parasitic extraction methodology is introduced by dividing the IC layout into elementary elements to solve the continuity equation for minority carriers in the volume based on the finite-difference method. A substrate parasitic network is derived from the mesh generated through the existing mixed-signal design flow. The induced substrate model is included in circuit simulators such as SPICE to predict the effects of substrate couplings during the design phase. Furthermore, this analysis enables optimization of layout with minimal parasitic effects. By linking the substrate model to the active components, the couplings between the integrated circuit with the substrate parasitic currents can be analyzed during circuit simulations. Simulations and measurements on an high voltage driver reveal consistent results and therefore confirm the validity of the method. Therefore, the approach developed herein is effective to predict parasitic couplings due the injection of minority carriers.

Optimal transistor sizing for maximum yield in variation-aware standard cell design

Abstract: Summary Process variability, in addition to wide temperature and supply voltage variation ranges, severely degrades the fabrication outcome (yield) of digital cells as for the fulfillment of performance specification bounds. This paper presents the application of mathematical optimization to the design of standard cells that are robust to process variations even in worst-case operating conditions. The method attains the optimal sizing of individual transistors in the cell for maximizing the statistical yield referring to leakage power and propagation delay bounds, with local and global process variations specified by industrial process development kits (PDKs). The approach is demonstrated for a 40 nm low-power standard threshold voltage Complementary Metal Oxide Semiconductor (CMOS) technology, for an intended operating temperature range [−40 °C, 125 °C] and supply voltage range [0.95 V, 1.05 V]. The reported optimization results show a yield improvement from an initial 50% to 99.9%, and Simulation Program with Integrated Circuit Emphasis (SPICE)-level Monte Carlo analysis confirmed the estimated yield of the obtained circuits. Copyright © 2015 John Wiley & Sons, Ltd.

A Compact SPICE Model for Organic TFTs and Applications to Logic Circuit Design

Abstract: This work introduces a compact DC model developed for organic thin film transistors (OTFTs) and its SPICE implementation. The model relies on a modified version of the gradual channel approximation that takes into account the contact effects, occurring at nonohmic metal/organic semiconductor junctions, modeling them as reverse biased Schottky diodes. The model also comprises channel length modulation and scalability of drain current with respect to channel length. To show the suitability of the model, we used it to design an inverter and a ring oscillator circuit. Furthermore, an experimental validation of the OTFTs has been done at the level of the single device as well as with a discrete-component setup based on two OTFTs connected into an inverter configuration. The experimental tests were based on OTFTs that use small molecules in binder matrix as an active layer. The experimental data on the fabricated devices have been found in good agreement with SPICE simulation results, paving the way to the use of the model and the device for the design of OTFT-based integrated circuits.

Spice tools supporting planetary remote sensing

Abstract: . NASA's "SPICE"* ancillary information system has gradually become the de facto international standard for providing scientists the fundamental observation geometry needed to perform photogrammetry, map making and other kinds of planetary science data analysis. SPICE provides position and orientation ephemerides of both the robotic spacecraft and the target body; target body size and shape data; instrument mounting alignment and field-of-view geometry; reference frame specifications; and underlying time system conversions. SPICE comprises not only data, but also a large suite of software, known as the SPICE Toolkit, used to access those data and subsequently compute derived quantities–items such as instrument viewing latitude/longitude, lighting angles, altitude, etc. In existence since the days of the Magellan mission to Venus, the SPICE system has continuously grown to better meet the needs of scientists and engineers. For example, originally the SPICE Toolkit was offered only in Fortran 77, but is now available in C, IDL, MATLAB, and Java Native Interface. SPICE calculations were originally available only using APIs (subroutines), but can now be executed using a client-server interface to a geometry engine. Originally SPICE "products" were only available in numeric form, but now SPICE data visualization is also available. The SPICE components are free of cost, license and export restrictions. Substantial tutorials and programming lessons help new users learn to employ SPICE calculations in their own programs. The SPICE system is implemented and maintained by the Navigation and Ancillary Information Facility (NAIF)–a component of NASA's Planetary Data System (PDS). * Spacecraft, Planet, Instrument, Camera-matrix, Events

From Circuit Theory, Simulation to SPICE Diego : A Matrix Exponential Approach for Time-Domain Analysis of Large-Scale Circuits

Abstract: SPICE (Simulation Program with Integrated Circuit Emphasis) is a widely used circuit simulation framework for integrated circuit designs. The basic skeleton of SPICE time domain simulation was derived from the versions developed in UC Berkeley during the 1970s. In this paper, we report most recent numerical integration methods to improve traditional SPICE time integration schemes, which are based on linear multi-step and low order approximation for the circuit differential equation system. Recently, matrix exponential based time domain simulation algorithms are being developed to address long-term issues in the standard numerical integration methods. We review the related techniques in matrix exponential based approaches and state several distinguished features in challenging simulation problems, such as linear power network analysis and nonlinear circuit system simulation (SPICEDiego). We believe that the matrix exponential approaches can shed new light on the research and development of future circuit simulation algorithmic systems.

Analytical Modeling of Wrap-Gate Carbon Nanotube FET With Parasitic Capacitances and Density of States

Abstract: A computationally efficient analytical model to accurately predict the electrical characteristics of wrap-gate carbon nanotube FETs (CNTFETs) is proposed and described in this paper. A wrap-gate structure offers an ideal geometry with minimum body thickness and maximum control over the channel as well as improved device scalability. The parasitic effects present in a real device are incorporated into an ideal wrap-gate device model, and the Poisson–Schrodinger equations are solved self-consistently to obtain the potential and carrier density at the top of the barrier. Exact analytical expressions, such as CNTFET density-of-states are used for approximately evaluating the integral expressions. Finally, the drain current is obtained for near-ballistic transport in the device. The electrical characteristics from our model are validated with recently reported experimental results from the literature, demonstrating good accuracy when the device is on. The subthreshold characteristics are underestimated and offer scope for improvement. Various performance metrics, including threshold voltage and subthreshold swing, and on-current are within 2–11% error. The proposed model can thus be used to study the performance of wrap-gate CNTFETs under various parametric conditions, and extended to circuit simulation models, such as SPICE.

A Simple Behavioral Electro-Thermal Model of GaN FETs for SPICE Circuit Simulation

Abstract: This paper develops a behavioral electro-thermal model of GaN FETs for power-electronic circuit simulation in SPICE software environment. The model couples an available GaN FET electrical model with a thermal $RC$ network for junction temperature estimation, while using modification circuits between an eGaN FET device and its gate driver to embed thermal impacts on the device performance. Both the static and switching characteristics of the developed model are compared with those from the original electrical model. Performance and functionality of the developed electro-thermal model in a boost converter, based on time-domain simulation studies in the SPICE environment, are evaluated and experimentally verified.

Evaluation of high voltage cascode GaN HEMTs in parallel operation

Abstract: Paralleling devices is an effective way to achieve higher power applications while still having the convenience brought by discrete devices. However, very few papers investigate the challenges of paralleling Gallium Nitride high electron mobility transistors (GaN HEMTs) in cascode configuration, especially the potential failure modes and its related mechanisms. In this paper, a comprehensive study on paralleled high voltage cascode GaN HEMTs is presented. The influence of paralleling cascode GaN HEMTs on the circuit's stray inductance is studied. Potential operation failure modes and the mechanisms of the cascode GaN HEMTs parallel operation were analyzed in detail. The Ansoft Q3D FEA tool and SPICE-based simulation model were used together to quantify the impacts of the circuit and device mismatch on the paralleled GaN HEMTs operation. The SPICE model is validated by the experimental results

A modified macro model approach for SPICE based simulation of single electron transistor

Abstract: A new macro model of single electron transistor (SET) for SPICE based simulation of SET circuits is proposed. Two voltage controlled current sources and some scaling factors are incorporated in the existing model to derive our model. The V---I characteristics of the proposed SET is promising enough to be used as the basic element for designing circuits based on SETs. A comparison with the previous models establishes the fact that our model efficiently removes the drawbacks of the existing models. Our model also agrees well with the results obtained from popular SIMON simulator. To verify the accuracy, we have designed a SET inverter cell and investigated its characteristics. The work includes the effect of the parameters on the noise margin and voltage transfer characteristics of the inverter circuit. Further, to verify the applicability, a multi peak negative differential resistance circuit based on the proposed model is designed and simulated.

High-Density Magnetic Flash ADC Using Domain-Wall Motion and Pre-Charge Sense Amplifiers

Abstract: Unintentional shutdown of power in CMOS circuitry leads to loss of data. The usage of non-volatile elements along with CMOS to improve its performance in terms of power consumption, area, and delay is very attractive. Non-volatile elements act as a backup data source for CMOS circuitry. Current-induced domain-wall (DW) motion is a prominent switching mechanism promising low-power, high-density, and high-speed circuits. This paper presents a novel DW motion and pre-charge sense amplifier-based magnetic flash analog-to-digital converter (ADC), which is faster, and power and area efficient compared with other CMOS ADCs. By using a DW motion in a magnetic stripe SPICE compatible Verilog-A model and CMOS 45 nm design kit, its performance, such as power and delay, has been simulated and compared with CMOS-based ADCs.

MOS-only circuit design automation

Abstract: This paper presents an approach to automate MOS-Only circuit design under the polynomial regression and surface fitting. The proposed scheme incorporates a unified model, which enables to improve simulation accuracy in standard SPICE and Cadence SPECTRE simulators during the MOS-Only designs. Furthermore, a piecewise polynomial regressive model of transconductance (gm) of the MOS transistors is presented in terms of VDS, channel width (W) and channel length (L) to increase automation efficiency. Exemplary results are given at high frequency operation to validate our model in both Cadence Spectre and LT-Spice as well.

First-Order SPICE Modeling of Extreme-Temperature 4H-SiC JFET Integrated Circuits

Abstract: A separate submission to this conference reports that 4H-SiC Junction Field Effect Transistor (JFET) digital and analog Integrated Circuits (ICs) with two levels of metal interconnect have reproducibly demonstrated electrical operation at 500 C in excess of 1000 hours. While this progress expands the complexity and durability envelope of high temperature ICs, one important area for further technology maturation is the development of reasonably accurate and accessible computer-aided modeling and simulation tools for circuit design of these ICs. Towards this end, we report on development and verification of 25 C to 500 C SPICE simulation models of first order accuracy for this extreme-temperature durable 4H-SiC JFET IC technology. For maximum availability, the JFET IC modeling is implemented using the baseline-version SPICE NMOS LEVEL 1 model that is common to other variations of SPICE software and importantly includes the body-bias effect. The first-order accuracy of these device models is verified by direct comparison with measured experimental device characteristics.

Universal voltage conveyors in fractional-order filter design

Abstract: In this paper voltage-mode fractional-order low- and high-pass filters using universal voltage conveyors are presented. The assumed order of the filters is (1 + α), where 0 < α < 1. The proposed structures use the continued fraction expansion approach and hence the fractional-order transfer functions of the filters are approximated by integer-order functions. The proposed structures are easily cascadable since their output impedance is zero in theory. The performance of the filters has been verified by Spice simulations that show the proper behaviour of the proposed structures.

Modeling magnetic devices using SPICE: Application to variable inductors

Abstract: In this paper a methodology to develop SPICE-based models of complex magnetic devices is presented. The proposed methodology is based on a reluctance equivalent circuit (REC), which allows the user to study both the magnetic and electric behavior of the structure under any operating conditions. The different elements required to implement the reluctance model, namely, constant reluctances, variable reluctances and windings, are implemented using SPICE behavioral modeling. These elements can thus be used to build a complete model for any magnetic device. The modeling process is illustrated with a particular example for a variable inductor. Simulations and experimental results are presented and compared to evaluate the accuracy and usefulness of the proposed modeling procedure.

Solving the stochastic Landau-Lifshitz-Gilbert-Slonczewski equation for monodomain nanomagnets : A survey and analysis of numerical techniques

Abstract: The stochastic Landau-Lifshitz-Gilbert-Slonczewski (s-LLGS) equation is widely used to study the temporal evolution of the macrospin subject to spin torque and thermal noise. The numerical simulation of the s-LLGS equation requires an appropriate choice of stochastic calculus and numerical integration scheme. In this paper, we comprehensively evaluate the accuracy and complexity of various numerical techniques to solve the s-LLGS equation. We focus on implicit midpoint, Heun, and Euler-Heun methods that converge to the Stratonovich solution of the s-LLGS equation. By performing numerical tests for both strong (path-wise) and weak (statistical) convergence, we quantify the accuracy of various numerical schemes used to solve the s-LLGS equation. We demonstrate a new method intended to solve Stochastic Differential Equations (SDEs) with small noise (RK4-Heun), and test its capability to handle the s-LLGS equation. We also discuss the circuit implementation of nanomagnets for large-scale SPICE-based simulations. We evaluate the efficacy of SPICE in handling the stochastic dynamics of the multiplicative noise in the s-LLGS equation. Numerical schemes such as Euler and Gear, typically used by SPICE-based circuit simulators do not yield the expected outcome when solving the Stratonovich s-LLGS equation. While the trapezoidal method in SPICE does solve for the Stratonovich solution, its accuracy is limited by the minimum time step of integration in SPICE. We implement the s-LLGS equation in both its cartesian and spherical coordinates form in SPICE and compare the stability and accuracy of the two implementations. The results in this paper will serve as guidelines for researchers to understand the tradeoffs between accuracy and complexity of various numerical methods and the choice of appropriate calculus to solve the s-LLGS equation.

A SPICE Realization of the Delay-Rational Green's-Function-Based Method for Multiconductor Transmission Lines

Abstract: Virtual prototyping has become an unavoidable step in the design of electrical and electronic systems. In this context, time-domain models have to be efficiently embedded in circuit simulator environments, such as SPICE-like transient simulators. Recently, the authors focused on the interconnections, modeled using the multiconductor transmission lines theory. This study presents a SPICE synthesis of the delay-rational method previously developed by the authors, based on Green's functions and line-delay extraction. The solution was tested for three transmission lines with frequency-independent per-unit-length parameters. We compared the SPICE results of the delay-rational method with those of two standard techniques: one based on a pure rational model and one based on the inverse fast Fourier transform. The time-domain simulations in SPICE of the delay-rational method show both accuracy and a remarkable reduction in the number of components used with respect to a purely rational approach, by virtue of the delay extraction.

The spice of music: towards a theory of

Abstract: In an influential article first published in 1959 Allen Forte took up the question of the initial stepwise ascent to the first structural note of the Schenkerian fundamental line (Urlinie) and argued that a sharpened fourth degree is a necessary condition for the establishment of S as the first note of the descent in the major mode.1 His discussion offers a useful point of departure from which to develop some arguments concerning aspects of intervallic theory (more particularly, the theory of the semitone) hitherto neglected in Schenkerian theory. Forte writes:

Simscape® based ultra-fast design exploration: graphene-nanoelectronic circuit case studies

Abstract: SPICE has been the corner stone of integrated circuit simulation since the 1970s. The device-level options that are available for SPICE/analog simulators to simulate a circuit netlist are typically compact models and/or Verilog-A structural and behavioral models. Though these simulations are very accurate, for large and complex circuits/systems they are extremely slow and even computationally infeasible. Thus, as a paradigm shift of the conventional design simulation flow, this paper presents a complete Simscape®based design and simulation flow for ultra-fast design exploration of graphene based nanoelectronic systems. A behavioral model for a dual gate graphene field effect transistor (GFET) is modeled in Simscape®based on the drift-diffusion conduction mechanism. The kink region of the $$I-V$$I-V characteristic is modeled via a displacement current. For case study design circuits, an all graphene based low noise amplifier and an LC-tank voltage controlled oscillator are presented. The results show that the proposed design alternative to simulate analog circuits and systems is a viable option in addition to the existing SPICE, VHDL-AMS or Verilog-A based flows and can open the way to true device-level system design exploration and optimization. To the best of the authors' knowledge, this is the first ever paper to explore a Simscape®model of a GFET device and design a GFET based radio-frequency circuit using Simscape®.

FGMOS-based differential difference CCCII and its applications

Abstract: A novel floating gate MOS (FGMOS) transistor-based differential difference controlled current conveyor (DDCCC) is proposed in this paper. Major advantages of the FGMOS-based DDCCC are low power dissipation and simplicity. The proposed circuit is designed using only 14 MOS transistors. The total power dissipation of the proposed circuit is equal to 7.38 μW. The other advantage of this circuit is that intrinsic resistance seen at port X of the DDCCC can easily be tuned by a biasing current. The tuning range of the intrinsic resistance is rather wide. Additionally, a current controlled universal filter and tunable positive and negative active resistors are presented as applications of the proposed circuit. The DDCCC and its applications are simulated using SPICE in 0.18 μm CMOS technology.

Spice modelling flow for ESD simulation of CMOS ICs

Abstract: A SPICE based simulation flow is proposed for ESD verification in standard analog simulation environment. Models contain ESD specific sub-circuits and failure thresholds which are activated on demand. Good agreement with experimental data is proven including bipolar operation and the triggering of parasitic paths. The flow has been successfully tested on real designs.

Integrated modeling of a motor driven system for analysis of conducted emissions

Abstract: Recently, due to their high performance, electrical components with Pulse Width Modulation and a motor are being used in automotive systems. However, this increases the electromagnetic interference that affects electronic components in and the performance of automotive systems, making it more difficult to satisfy the standard of electromagnetic compatibility and electromagnetic issues. To solve the EMC problems in the design phase, detailed SPICE modeling is essential. In this paper, a detailed circuit of a motor driven system is proposed. The model is valid in the radio frequency range from 100 kHz up to 30 MHz. Moreover, this model takes into account the impedance effect in the chassis ground of the motor frame. For verification, the simulation results and measurement results are compared. A strong correlation between the SPICE model and the actual object is exhibited.

Transient SPICE simulation of Ni/HfO 2 /Si-n + resistive memories

Abstract: A new SPICE model for the simulation of conductive bridge resistive memories has been developed. The model is based on filamentary transport and includes conduction through a constriction (by means of the quantum point contact model) and an accurate thermal description. It has been used for calculating thermally assisted reset transitions in Ni/HfO 2 /Si-n+ samples. Transient simulations have been carried out in order to obtain reset I-V and I-t curves, which are compared with experimental results showing a reasonably good fit. Finally, the role of the evolution at simulation time of the ohmic and thermal resistances is analyzed.