Showing papers on "Spice published in 2017"

SPICE Modeling of Variable Inductors and Its Application to Single Inductor LED Driver Design

Abstract: This paper presents a design, simulation, and evaluation procedure of a variable inductor (VI) for a recently proposed dc-grid LED driver. The design procedure is based on the use of SPICE behavioral modeling to implement the different elements of the equivalent reluctance model of the VI. Thus, the model merges both electrical and magnetic behavior of the VI, including magnetic and geometric features. The basic components of the model are presented in detail, making it possible their use in future designs of VI and other complex magnetic devices. Experimental results from both VI and LED driver prototypes are provided to compare with the simulation results. Obtained outcomes prove that the proposed design and modeling technique is an excellent way to verify theoretical designs and attain further insight about the operation of these complex magnetic devices.

Universal Compact Model for Thin-Film Transistors and Circuit Simulation for Low-Cost Flexible Large Area Electronics

Abstract: Thin-film transistors (TFT) in hydrogenated amorphoussilicon, amorphousmetal oxide, andsmallmolecule and polymer organic semiconductors would all hold promise as potential device candidates to large area flexible electronics applications. A universal compact dc model was developed with a proper balance between the physical and mathematical approaches for these thin-film transistors (TFTs). It can capture the common key parameters used for device performance benchmarking of the different TFTs while being applicable to a wide range of TFT technologies in different materials and device structures. Based on this model, a user-friendly tool was developed to provide an interactive way for convenient parameter extraction. The model is continuous from the off-state and subthreshold regimes to the above-threshold regime, avoiding the convergence problems when being used in SPICE circuit simulations. Finally, for verification, it was implemented into a SPICE circuit simulator using Verilog-A to simulate a TFT circuit examplewith the simulated results agreeing verywell with the experimental measurements.

Equivalent Impedance Electroelastic Modeling of Multiple Piezo-Patch Energy Harvesters on a Thin Plate With AC–DC Conversion

Abstract: Piezo-patch energy harvesters can be readily attached to plate-like structures in automotive, marine, and aerospace applications, in order to exploit the broadband vibration of the host system. Power output investigations of such patch-based harvesters, when connected to practical interface circuits, require accurate models for harvesting performance evaluation and optimization. This paper proposes an analytical approach to derive the closed-form mechanical and electrical response expressions of the multiple piezo-patch energy harvesters (MPEHs) by integrating an equivalent load impedance, which consists of the harvesting circuit and the overall piezo-patch capacitance into a distributed-parameter model of the plate. Moreover, an equivalent circuit model of the electromechanical system is developed in a circuit simulator software SPICE for system-level simulations, taking into account the interconnection of piezo-patches and multiple vibration modes of the plate. Numerical SPICE simulations are then validated for the conventional ac input–ac output problem by the experiments and existing analytical solution. The proposed analytical model is validated by the experiments for the standard ac input–dc output problem. Finally, the analytical and numerical results for the peak power output of the MPEHs in series/parallel configuration with ac and dc interface circuits are presented, and shown to be in good agreement with the experimental results.

Voltage-Driven Hysteresis Model for Resistive Switching: SPICE Modeling and Circuit Applications

Abstract: Resistive switching devices are nonlinear electrical components that have drawn great attention in the design of new technologies including memory devices and neuromorphic circuits. In this paper, an SPICE implementation of a novel compact model is presented and put under test by means of different circuit configurations. The model is based on two identical opposite-biased diodes in series with a resistor where the switching behavior is governed by the creation and rupture of multiple conductive channels. Results show that the model is stable under different input sources and amplitudes and, with special interest, in multielement circuits. The model is validated with experimental data available in the literature. Both the corresponding SPICE code and schematic are provided in order to facilitate the model use and assessment.

Electronically Tunable Fractional Order Filter

Abstract: In this paper, an electronically tunable resistorless fractional order filter (FOF) based on operational transconductance amplifier (OTA) is presented. It uses two fractional capacitors (FC) of same order and provides fractional order low-pass filter and fractional order band-pass filter responses simultaneously. Mathematical formulations are outlined for various critical frequencies and transfer function sensitivities for presented FOF. The FCs of orders 0.5 and 0.9 are considered for illustrating the proposal. The FCs are realized using the fourth-order continued fraction expansion-based RC ladder and are characterized using SPICE simulations. Functional verification of presented FOF with FC of orders 0.5 and 0.9 is exhibited through SPICE simulations. The OTA is implemented using $$0.5\,\upmu \hbox {m}$$ CMOS technology model parameters. Electronic tunability of half power and right-phase frequencies of presented FOF is achieved through bias current variation of OTA. The transfer functions’ sensitivity with respect to various circuit parameters is also examined through simulations, and it is found that the values remain well within unity for most of the circuit parameters. Furthermore, the presented FOF is attractive from integration viewpoint as it achieves tunability via bias current variation in contrast to tuning through resistor variation in existing FOFs.

Modelling dynamic characteristics of the IGBT with thermal phenomena taken into account

Abstract: Purpose This paper aims to propose the electrothermal dynamic model of the insulated gate bipolar transistors (IGBT) for SPICE. Design/methodology/approach The electrothermal model of this device (IGBT), which takes into account both electrical and thermal phenomena, is described. Particularly, the sub-threshold operation of this device is considered and electrical, and thermal inertia of this device is taken into account. Attention was focused on the influence of electrical and thermal inertia on waveforms of terminal voltages of the considered transistor operating in the switching circuit and on waveforms of the internal temperature of this device. Findings The correctness of the presented model is verified experimentally and a good agreement of the calculated and measured electrical and thermal characteristics of the considered device is obtained. Research limitations/implications The presented model can be used for different types of IGBT, but it is dedicated for SPICE software only. Originality/value The form of the worked out model is presented and the results of experimental verification of this model are shown.

An analysis of the dynamics of SPICE memristor model

Abstract: The memristor, known as “the fourth fundamental passive circuit element”, was predicted theoretically in 1971 by Prof. Leon Chua. It has attracted the scientist's attention since the physical implementation demonstrated in 2008 by HP Labs research team. However, at the nanoscale, due to its diversified modeling methods, SPICE memristor models are getting a considerable attention due to their simplicity and flexibility. For its reliable implementation, a simple model will be discussed in this paper. This model not only possesses the general memristor properties but also catches the dynamic characteristics including the pinched hysteresis loop, which is covered with a consistent way. Simulation results of the SPICE memristor model demonstrate its dynamics for different types of excitation. The analysis of the implemented parameters provided to discuss the switching behavior of such device. This SPICE model proves the ability and flexibility to adapt the changing behavior with different input polarization.

Electrical modeling and analysis of 3D synaptic array using vertical RRAM structure

Abstract: Three-dimensional (3D) integrated circuits (ICs) offer a promising near-term solution for pushing beyond Moore's Law because of their compatibility with current technology while providing high system speed, high density, massively parallel processing, low power consumption, and a small footprint. In this paper, a novel 3D neuromorphic IC architecture combining monolithic 3D integration and vertical resistive random-access memory (V-RRAM) technology is proposed. Furthermore, a concise equivalent circuit model of the proposed structure is created and the analytical calculation for each parameter in the equivalent circuit is provided. The electrical performance of the proposed 3D neuromorphic computing structure is evaluated through SPICE simulations.

Accurate SPICE Modeling of Reverse-Conducting IGBTs Including Self-Heating Effects

Abstract: In this paper, a temperature-dependent compact SPICE model of reverse-conducting IGBTs (RC-IGBTs) is presented. The proposed solution is based on a quasi-two-dimensional (2-D) approach, with the use of IGBT and p-i-n diode subcircuits suitably connected to take into account the inner interactions among the two devices. The resulting device model is derived through physical considerations on the RC-IGBT internal behavior, carried out by means of wide area TCAD 2-D simulations. Transversal current path, localized lifetime control effects, and turn-on dynamics are also included into the model. The model shows good robustness properties, even in demanding numerical conditions. Validation of the SPICE model with experiments performed on a 1.2-kV 30-A commercial device, in both static and dynamic conditions, demonstrates its remarkable correctness and accuracy. To further confirm the applicability of the proposed model in real-operating conditions, a quasi-resonant converter has been realized and the measurements on the realized circuit have been successfully compared with the results obtained with the proposed model.

A physically based scalable SPICE model for silicon carbide power MOSFETs

Abstract: This paper proposes a novel physical and scalable SPICE model for Silicon Carbide (SiC) power MOSFETs The model is based on process and layout parameters, enabling design optimization through a direct link between SPICE, physical design, and process technology One model applies to the entire technology instead of conventional discrete models for each device size and process variation The SPICE agnostic model ports across multiple industry standard simulation platforms The model has been validated with On Semiconductor's advanced 1200V SiC MOSFET technology

Compact RF rectifier circuit for ambient energy harvesting

Abstract: This paper presents the design, implementation, and evaluation of a miniature rectifier circuit for RF energy harvesting applications. The proposed design aims to give a comprehensive account of the efficiency degradation corresponding to the minimal RF input power less than 0dBm. Our design is based on the optimization of a compact rectifier circuit for capturing the ambient RF power from the wireless applications at frequency 2.45GHz. A co-simulation procedure between electromagnetic (EM) and SPICE simulation have been presented. The circuit shows a simulated RF-DC conversion efficiency of 68% at −10dBm while the measured is 33% at −5dBm. The practical sensitivity of this circuit is very low where the output voltage of 8mV could be detected at RF input signal of −30dBm.A rectifier prototype has been fabricated and tested.

Dynamic Threshold Sleep Transistor Technique for High Speed and Low Leakage in CMOS Circuits

Abstract: Leakage power dissipation is a serious concern in deep nanometer devices. Low power design methodology is often adopted in VLSI circuits and systems to minimize power; however, this is achieved at the cost of performance penalty. In this paper, we first review the existing circuit techniques for leakage minimization. A new circuit technique is then proposed which is designed intelligently by mixing a pair of dynamic threshold sleep transistors and a pair of helper transistors. The performance of the proposed technique is investigated in terms of area, power, delay and power---delay product. Extensive SPICE simulation with 32 nm process technology shows a significant reduction in power, delay and power---delay product.

Voltage-Mode Third-Order Quadrature Sinusoidal Oscillator Using VDBAs

Abstract: This paper presents a third-order quadrature sinusoidal oscillator (TOQSO) using two voltage differencing buffered amplifiers (VDBAs), three capacitors and a resistor. The new topology provides two quadrature voltage outputs. The condition of oscillation (CO) and frequency of oscillation (FO) are electronically independently controllable by the separate transconductance of the VDBAs. The workability of the proposed TOQSO is confirmed by SPICE (Version 16.5) simulation using Taiwan semiconductor manufacturing company (TSMC) 0.18 μm process parameters.

Modeling and simulation of biological systems using SPICE language.

Abstract: The article deals with BB-SPICE (SPICE for Biochemical and Biological Systems), an extension of the famous Simulation Program with Integrated Circuit Emphasis (SPICE). BB-SPICE environment is composed of three modules: a new textual and compact description formalism for biological systems, a converter that handles this description and generates the SPICE netlist of the equivalent electronic circuit and NGSPICE which is an open-source SPICE simulator. In addition, the environment provides back and forth interfaces with SBML (System Biology Markup Language), a very common description language used in systems biology. BB-SPICE has been developed in order to bridge the gap between the simulation of biological systems on the one hand and electronics circuits on the other hand. Thus, it is suitable for applications at the interface between both domains, such as development of design tools for synthetic biology and for the virtual prototyping of biosensors and lab-on-chip. Simulation results obtained with BB-SPICE and COPASI (an open-source software used for the simulation of biochemical systems) have been compared on a benchmark of models commonly used in systems biology. Results are in accordance from a quantitative viewpoint but BB-SPICE outclasses COPASI by 1 to 3 orders of magnitude regarding the computation time. Moreover, as our software is based on NGSPICE, it could take profit of incoming updates such as the GPU implementation, of the coupling with powerful analysis and verification tools or of the integration in design automation tools (synthetic biology).

Energy-Efficient Single-Flux-Quantum Based Neuromorphic Computing

Abstract: Recent experimental work has demonstrated nano- textured magnetic Josephson junctions (MJJs) that exhibit tunable spiking behavior with ultra-low training energies in the attojoule range. MJJ devices integrated with standard single-flux-quantum neural systems form a new class of neuromorphic technologies that have spiking energies between attojoules and zeptojoules, operation frequencies up to 100 GHz, and nanoscale plasticity. Here, we present the design of neural cells utilizing MJJs that form the basic elements in multilayer perception and convolutional networks. We present SPICE models, using experimentally derived Verilog A models for MJJs, to assess the performance of these cells in simple neural network structures. Modeling results indicate that the tunable Josephson critical current IC can function as a weight in a neural network. Using SPICE we model a fully connected two layer network with 9 inputs and 3 outputs.

Electronically Tunable Fractional Order All Pass Filter

Abstract: In this paper, an electronically tunable fractional order all pass filter (FOAPF) based on operational transconductance amplifier (OTA) is presented. It uses two OTAs and single fractional order capacitor (FC) of non-integer order α to provide FOAPF of α order. Two different values of α, in particular 0.5 and 0.9, for FC are taken for investigation. The functionality of the proposal is verified through SPICE simulations using TSMC 0.18 μm Complementary Metal Oxide Semiconductor (CMOS) process parameters. Simulated and theoretical frequency and time domain responses are found to be in close agreement.

Analysis of SPICE models for SiC MOSFET power devices

Abstract: This work compares four SiC power MOSFET models for SPICE provided by main device manufacturers: STMicroelectronics, CREE and ROHM. Model complexity and structures are analysed. Model accuracy is assessed by comparing simulation results to static output characteristics given in the respective device datasheets.

Quasi-Analytical Model of 3-D Vertical-RRAM Array Architecture for MB-Level Design

Abstract: This paper addresses the design challenges of simulating the 3-D vertical-resistive random access memory (V-RRAM) toward MB-level. The interconnect IR drop and sneak paths are known to be the limiting factors for building large-scale V-RRAM arrays. The previous approach to evaluate the write/read margin of V-RRAM was based on the exhaustive SPICE simulations, which prohibits the design exploration to MB-level as it takes huge amount of computation resources. In this paper, a quasi-analytical model is proposed, which aims to reduce the simulation time and the required memory usage. Through the validation with the SPICE simulation results, the proposed model shows a similar accuracy. Based on the proposed quasi-analytical model, the worst case data pattern of 3-D V-RRAM with large array size up to 4 MB is analyzed. The results show that it is more efficient to increase the number of stack layers than expanding the horizontal array size to achieve large subarray size.

Radiation-Induced Fault Simulation of SOI/SOS CMOS LSI's Using Universal Rad-SPICE MOSFET Model

Abstract: The methodology of modeling and simulation of environmentally induced faults in radiation hardened SOI/SOS CMOS IC's is presented. It is realized at three levels: CMOS devices --- typical analog or digital circuit fragments --- complete IC's. For this purpose, a universal compact SOI/SOS MOSFET model for SPICE simulation software with account for TID, dose rate and single event effects is developed. The model parameters extraction procedure is described in great depth taking into consideration radiation effects and peculiarities of novel radiation-hardened (RH) SOI/SOS MOS structures. Examples of radiation-induced fault simulation in analog and digital SOI/SOS CMOS LSI's are presented for different types of radiation influence. The simulation results show the difference with experimental data not larger than 10---20% for all types of radiation.

CMOS VDIBAs-Based Single-Resistance-Controlled Voltage-Mode Sinusoidal Oscillator

Abstract: In this communication, a new single-resistance controlled sinusoidal oscillator (SRCO) has been presented. The presented SRCO uses two voltage differencing inverting buffered amplifiers (VDIBAs), one resistor and two capacitors in which one is grounded (GC) and the other one is floating (FC). The proposed structure offers the following advantageous features: 1) independent control of oscillation condition (OC) and oscillation frequency (OF); 2) low passive and active sensitivities and 3) very good frequency stability. The non-ideal effects of the VDIBA on the proposed oscillator have also been investigated. The proposed SRCO has been tested for its robustness using Monte-Carlo simulations. The check of the validity of the presented SRCO has been established by SPICE simulations using 0.18 μm TSMC technology.

Real-time emulation of block-based analog circuits on an FPGA

Abstract: In order to provide a real-time emulation platform for analog signal processing circuits, we propose a block based approach with a constant worst case runtime. We evaluate an FPGA-based implementation of this approach by comparing its output for different test cases to a non-real-time SPICE simulation. The implementation runs at a sampling rate of 88.2 kHz and features roundtrip times as low as 0.096 ms (12 bit ADC) and 0.190 ms (16 bit ADC). For complex filter structures we were able to replicate the frequency responses predicted by a SPICE AC analysis accurately. Furthermore we compare measured transient responses of the FPGA-based emulation with SPICE and discuss advantages and disadvantages of the approach.

Modified MIM model of titanium dioxide memristor for reliable simulations in SPICE

Abstract: Modifications of the mathematical model of the TiO 2 memristor, based on the approximations of Simmons' equations of tunnel effects in Metal-Insulator-Metal structures, are proposed. These modifications improve the performance of the model in the SPICE environment, taking into account the numerical limits of SPICE-family programs.

SPICE simulation of ferrite core losses and hot spot temperature estimation

Abstract: A simple, user-friendly model is proposed to estimate ferrite core losses and the hot spot temperature by SPICE simulation that are based on the Steinmetz equation The model is capable to produce, on the fly, the estimates as the operating condition of the core are changing

Switching cell design optimization of SiC-based power modules for current source inverter applications

Abstract: In this paper, a novel full-SiC power module suitable for three-phase Current Source Inverter (CSI) applications is presented. Based on state-of-the-art CSI modules, the problems associated with layout asymmetry are analyzed through electromagnetic (Finite Element Analysis software) and electrical simulations (Spice environment). Prototypes of the power module layouts are fabricated and parasitic measurements are carried out using a precision impedance analyzer.

Stability of Rotary Traveling Wave Oscillators under process variations and NBTI

Abstract: Resonant rotary clocking is a low-power clocking technology for multi-phase clock generation in GHz frequency range. In this paper, Rotary Traveling Wave Oscillators (RTWOs) are analyzed under process variations and negative bias temperature instability (NBTI) at the 90nm technology node. The analysis is focused on 1) variations in the physical geometries of the rotary ring, 2) inter and intra-die transistor variations, 3) power supply fluctuation and 4) NBTI. Monte-Carlo based analysis are performed to study the effects of process variations and transistor aging on the operating frequency and power consumption of the rotary ring at a temperature of 110° C. SPICE based simulations show natural robustness against process variations, and NBTI.

Advanced integration of variability and degradation in RRAM SPICE compact models

Abstract: Variability and degradation in RRAM devices involve complex physical mechanisms that depend on the device, environment and programming/read operation. The development of solid and accurate compact models, ready to be used in standard circuit simulators, requires the meticulous emulation of this kind of non-ideal effects. In this work we present an advanced approach for the emulation of complex variability and degradation effects in SPICE compacts models. Without requiring compiled components — such as Verilog-A or CMI code — the proposed solution can be adapted to any kind of memristor model providing full support to the emulation of these intricate behaviors. Thorough experiments illustrate the capabilities of the presented approach. There, we make use of a physical SPICE model that emulates behavioral dependence on the device cycling, simulation time and stress levels. After applying the proposed techniques, we obtain an enhanced model properly aware of the device's non-ideal behavior.

Digital Wave Simulation of Quasi-Static Partial Element Equivalent Circuit Method

Abstract: The partial element equivalent circuit (PEEC) method is a well-established technique for obtaining a circuit equivalent for an electromagnetic problem. The time domain solution of such models is usually performed using nodal voltages and branch currents, or sometimes charge and currents. The present paper describes a possible alternative approach, which can be obtained expressing and solving the problem in the waves domain. The digital wave theory is used to find an equivalent representation of the PEEC circuit in the wave domain. Through a pertinent continuous to discrete time transformation, the constitutive relations for partial inductances, capacitances, and resistances are translated in an explicit form. The combination of such equations with Kirchhoff laws allows to achieve a semiexplicit resolution scheme. Three different physical configurations are analyzed and their extracted digital wave PEEC models are simulated at growing sizes using the general-purpose digital wave simulator. The results are compared to those obtained by using standard SPICE simulators in both linear and nonlinear cases. When the size of the model is manageable by SPICE, an excellent accuracy and a speed-up factor of up to three orders of magnitude are observed with much lower memory requirements. A comparative analysis of results including the effect of parameters like the simulation time step choice is also presented.