Topic
Split-radix FFT algorithm
About: Split-radix FFT algorithm is a research topic. Over the lifetime, 1845 publications have been published within this topic receiving 41398 citations.
Papers published on a yearly basis
Papers
More filters
03 Apr 1990
TL;DR: A new class of FFT (fast Fourier transform) algorithms that run very efficiently on digital signal processors (DSPs) is described, shown to be more than 20% faster than traditional sequential algorithms adapted to the processor, because of lower overhead, and better utilization of the parallel instruction sets and the pipelining is obtained.
Abstract: A new class of FFT (fast Fourier transform) algorithms that run very efficiently on digital signal processors (DSPs) is described. The algorithms are based on a tensor product factorization of the DFT (discrete Fourier transform). The tensor product factorization not only controls the breakdown into short-length DFTs but also shows the data flow between the various blocks. This allows a better scheduling of operations, which again gives a better utilization of the DSP pipelining/parallel capabilities, and leads to algorithms with significantly lower overhead than traditional methods. Several different programs have been implemented in assembly code for the TMS320C30 and simulated to find their execution times. The new algorithms are shown to be more than 20% faster than traditional sequential algorithms adapted to the processor, because of lower overhead, and better utilization of the parallel instruction sets and the pipelining is obtained. >
9 citations
TL;DR: In this article, a new partitioning algorithm for the 3-dim FFT grid is proposed to accomplish the trade-off between the communication overhead and load balancing of the plane waves, which is shown by qualitative analysis and numerical results that their approach could scale the plane wave first-principles calculations up to more nodes.
9 citations
TL;DR: A bus-oriented multiprocessor architecture specialized for computation of the discrete Fourier transform (DFT) of a length N=2/sup M/ sequential data stream is developed and allows flexibility in the number of processors and in the choice of a fast Fourier Transform (FFT) algorithm.
Abstract: A bus-oriented multiprocessor architecture specialized for computation of the discrete Fourier transform (DFT) of a length N=2/sup M/ sequential data stream is developed. The architecture distributes computation and memory requirements evenly among the processors and allows flexibility in the number of processors and in the choice of a fast Fourier transform (FFT) algorithm. With three buses, the bus bandwidth equals the input data rate. A single time-multiplexed bus with a bandwidth of three times the input data rate can alternatively be used. The architecture requires processors that have identical hardware, which makes it more attractive than the cascade (pipeline) FFT for multiprocessor implementation. >
9 citations
TL;DR: This article presents a method to compute the discrete Fourier transform (DFT) of an N-point real vector and the inverse DFT (IDFT) of the DFT of another real N- Point vector by carrying out a single complex N- point DFT.
Abstract: This article presents a method to compute the discrete Fourier transform (DFT) of an N-point real vector and the inverse DFT (IDFT) of the DFT of another real N-point vector by carrying out a single complex N-point DFT. Possible applications are for transceivers where the transmitter has to carry out the DFT of an N-point real sequence and the receiver has to carry out the inverse DFT of the DFT of another N-point real sequence.
9 citations
TL;DR: A fast Fourier transform algorithm, which removes two steps of twiddle factor multiplications from the conventional five-step FFT algorithm, and reduces its memory requirement by O(n) operations.
9 citations