Topic
Split-radix FFT algorithm
About: Split-radix FFT algorithm is a research topic. Over the lifetime, 1845 publications have been published within this topic receiving 41398 citations.
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03 Nov 2011
TL;DR: Comparisons of the computational complexity for the proposed split-radix FFT pruning algorithm with time shift for consecutive partial inputs with other algorithms show that the proposed method is more computationally efficient.
Abstract: Eliminating computations on zeros when the number of nonzero inputs is considerably less than the length of Fast Fourier Transform (FFT) is considered as one of the methods to increase the computational efficiency of an FFT algorithm. This paper proposes a new split-radix FFT pruning algorithm with time shift for consecutive partial inputs. The shifting simplifies the flow graph in the first few stages of the pruning algorithm and makes the algorithm architecturally efficient. Comparisons of the computational complexity for the proposed split-radix FFT pruning algorithm with other algorithms show that the proposed method is more computationally efficient. Optimized hardware design based on this algorithm is also devised.
7 citations
TL;DR: A new fast algorithm for spectral transformations for two-dimensional digital filters is presented, based on the use of the fast Fourier transform, which is illustrated by a numerical example.
Abstract: In this paper, a new fast algorithm for spectral transformations for two-dimensional digital filters is presented. The algorithm is based on the use of the fast Fourier transform. The computational complexity of this algorithm is evaluated. The simplicity and efficiency of the algorithm is illustrated by a numerical example.
7 citations
16 Jul 2014
TL;DR: The architectures are optimized with less number of registers for signal processing and wireless communication applications and the clock to registers is disabled to avoid storing of the redundant values and hence the registers actually storing those redundant values are eliminated.
Abstract: This paper proposes two-parallel pipelined fast Fourier transform (FFT) architectures for the discrete Fourier transform (DFT) computation of real-valued signals. The architectures are optimized with less number of registers for signal processing and wireless communication applications. The clock to registers is disabled to avoid storing of the redundant values and hence the registers actually storing those redundant values are eliminated. The proposed architectures requires 22% less registers than the prior architectures. The real-valued FFT (RFFT) processor is further optimized to process BPSK outputs in which case 43% of register is reduced.
7 citations
20 Nov 2016
TL;DR: Theoretical computing complexity of and some other similar operation is demonstrated, revealing an advantage on computation of CS-unit, which is equivalent to a combination of a convolutional layer and a pooling layer but more effective.
Abstract: Convolution operation is the most important and time consuming step in a convolution neural network model. In this work, we analyze the computing complexity of direct convolution and fast-Fourier-transform-based (FFT-based) convolution. We creatively propose CS-unit, which is equivalent to a combination of a convolutional layer and a pooling layer but more effective. Theoretical computing complexity of and some other similar operation is demonstrated, revealing an advantage on computation of CS-unit. Also, practical experiments are also performed and the result shows that CS-unit holds a real superiority on run time. Keywords-computing complexity; FFT-based convolution; CSunit
7 citations
01 Dec 2011
TL;DR: A novel IFFT/FFT architecture for the OFDM Transceiver system that exploits the correlation between bytes of incoming information to adaptively choose between the Radix-2 and Radix • 4 algorithm is proposed.
Abstract: Inverse Fast Fourier Transform/ Fast Fourier Transform (IFFT/FFT) processors are crucial blocks for an Orthogonal Frequency Division Multiplexing (OFDM) transceiver system. However, in the current OFDM systems, the system complexity and processing rate do not vary adaptively with the input data. In this paper, we propose a novel IFFT/FFT architecture for the OFDM Transceiver system that exploits the correlation between bytes of incoming information to adaptively choose between the Radix-2 and Radix • 4 algorithm. Using this architecture, we have achieved additional free data slots per frame. The transceiver system has been tested end-to-end and implemented on FPGA Board.
7 citations