Split-radix FFT algorithm

About: Split-radix FFT algorithm is a research topic. Over the lifetime, 1845 publications have been published within this topic receiving 41398 citations.

A Generalization of FFT Algorithms for String Matching

Abstract: There exists an algorithm which solves string matching problem with mismatches by computing a vector by the fast Fourier transformation (FFT), however, the time complexity depends on the size of the alphabet. Atallah et al. introduced a randomized algorithm in which the time complexity has a trade-off with the accuracy of the estimates for the vector and it was improved by Baba et al. This paper generalize these three algorithms in terms of the functions which convert characters into numbers. The generalization provides that the exact vector is obtained by repeating the FFT computation at least . σ-1 times, where σ is the size of the alphabet. Moreover, it gives the exact variance of the estimates for the vector.

FPGA implementation of Fast Fourier Transform

Abstract: The Fast Fourier Transform is one of the most widely used digital signal processing algorithms. It is used to compute the Discrete Fourier Transform and its inverse. As a result, these are widely used for many applications in engineering, science, and mathematics which include areas such as: communications, signal processing, instrumentation, biomedical engineering, numerical methods, sonics and acoustics, and applied mechanics. It is described as the most important numerical algorithm of our lifetime. The number of applications for this transform continues to grow. The Decimation-In-Time radix-2 FFT using butterflies is designed. The butterfly operation is faster. The outputs of the shorter transforms are reused to compute many outputs, thus the total computational cost becomes less. The 16 bit and 32 bit inputs are synthesized using Verilog. The logic utilization obtained from the design summary of 16 and 32 bit radix-2 DIT FFT can be compared. The utilization factor increases as the number of bits increases. The design is developed using hardware description language Verilog on Xilinx 14.2 xc3s500E. The spartan3-tyro plus is used as hardware to implement the complex FFT values.

Deterministic sparse fft algorithms

Abstract: The discrete Fourier transform (DFT) is a well-known transform with many applications in various fields. By fast Fourier transform (FFT) algorithms, the DFT of a vector can be efficiently computed. Using these algorithms, one can reconstruct a complex vector x of length N from its discrete Fourier transform applying O(N log N) arithmetical operations. In order to improve the complexity of FFT algorithms, one needs additional a priori assumptions on the vector x. In this thesis, the focus is on vectors with small support or sparse vectors for which several new deterministic algorithms are proposed that have a lower complexity than regular FFT algorithms. We develop sublinear time algorithms for the reconstruction of complex vectors or matrices with small support from Fourier data as well as an algorithm for the reconstruction of real nonnegative vectors. The algorithms are analyzed and evaluated in numerical experiments. Furthermore, we generalize the algorithm for real nonnegative vectors with small support and propose an approach to the reconstruction of sparse vectors with real nonnegative entries.

Real transform algorithm for computing discrete circular deconvolution

Abstract: Fast computation of the discrete deconvolution is very important in image/video signal processing. We develop a real transform algorithm for calculating the discrete circular deconvolution by substituting the fast Fourier transform (FFT) defined in the complex domain. It is shown that the computational cost of the algorithm is about half of the traditional FFT. Furthermore, the algorithm has a weak numerical stability.

A power-of-two FFT algorithm and structure for DRM receiver

Abstract: Digital Radio Mondiale (DRM) is the most important technology to replace analog AM broadcasting into digital one. The core of DRM is based on coded orthogonal frequency division multiplexing (COFDM), so it has high spectrum efficiency including the other advantages. Modern OFDM is based on discrete Fourier transform (DFT) or inverse discrete Fourier transform (IDFT). However, due to the particularity of DRM, the numbers of sub-carriers in four DRM robust modes are not same. And these numbers are nonpower- of-two. Typically, the fast Fourier transform (FFT) is based on a power-of-two algorithm. We do have some algorithms to compute the non-power-of-two FFT such as the prime-factor algorithm (PFA). However, these algorithms are complex and inconvenient to implement. Therefore, we propose a new algorithm and structure to use a power-of-two FFT algorithm in DRM receiver. This algorithm has low complexity, more general and flexible characteristics. In the end the paper gives out the bit error rate (BER) simulation results, these results indicate that the proposed algorithm's performance is same as the traditional one.