Split-radix FFT algorithm

About: Split-radix FFT algorithm is a research topic. Over the lifetime, 1845 publications have been published within this topic receiving 41398 citations.

Effects of Noise on the Interpolation Accuracy for Apodized FFT Spectra of Time-Domain Damped Signals

Abstract: Interpolation formulas for the apodized magnitude-mode fast Fourier transformed (FFT) spectra determine accurately the frequency, damping constant, and amplitude of time-domain damped signals. However, additive noise causes a large amount of error in interpolation. In this paper, we obtain, theoretically, the frequency-domain signal-to-noise (S/N) ratio due to windowing by the function of sinα(X) and quantization with finite bit-length analog-to-digital (A/D) converters. Then, with the use of the squared ratios between three magnitudes nearest to the peak maximum on the apodized FFT spectrum, we derive the relationship equation between the frequency error and the S/N ratio. The results obtained by computer simulation of experimental conditions (i.e., sampling, quantization, windowing, FFT, and interpolation) for the Hanning window (α = 2) agree well with the theoretical calculations; the frequency errors decrease with increasing bit-length of the A/D converter. These observed errors are unavoidable because A/D converters are indispensable for measurements with Fourier transform spectrometers. Furthermore, as shown theoretically, the observed accuracy of interpolation is inversely proportional to the S/N ratio, provided that the S/N ratio is below the value due to quantization and windowing.

Application of an iterative method to nonlinear superposition of water wave profiles: FFT and mathematical analysis

Abstract: In a previously published paper, Jang and Kwon (Ocean Engineering, 1995, 32:1862–1872) proposed a new iterative method to estimate nonlinear wave profiles and demonstrated its solution procedure. The solution was based on the Banach contraction mapping theorem, and the nonlinear operator was constructed from the Bernoulli equation. This paper is a sequel to that paper and seeks to establish the existence and uniqueness of the proposed method. Furthermore, frequency content of the profiles of the generated waves by the proposed scheme was analyzed by the fast Fourier transform (FFT). The obtained waves contained high-order nonlinear Fourier components of a Stokes' wave.

FFT apparatus for high data rate and method thereof

Abstract: An FFT apparatus for quickly processing input signals and method thereof is disclosed. In performing the FFT for processing N input signals, four N/4-point FFT units implemented by radix-2 single-path delay feedback (R2SDF) units performs the FFT with respect to the input signals, and a radix-4 computation unit performs a radix-4 computation with respect to the signals transferred from the N/4-point FFT units. Accordingly, the input signals are processed in parallel through the N/4-point FFT units, and thus a quick process of the input signals can be performed.

Area and time optimized realization of 16 point FFT and IFFT blocks by using IEEE 754 single precision complex floating point adder and multiplier

Abstract: Fast Fourier Transform (FFT) and Inverse Fast Fourier Transform (IFFT) act as primary blocks in most of the digital signal processing applications. These two operations have undergone numerous advancements in terms of software implementation. However, there is a dearth of hardware implementation of the same, due to the involvement of floating point complex numbers. Existing Fast Fourier Transform /Inverse Fast Fourier Transform implementations mostly deal with integer data only and are incompatible with floating point data. The need of the hour is a design that can operate on floating point numbers and also achieves maximum efficiency, minimum hardware utilization and high data precision. This paper proposes implementation of a novel complex floating point arithmetic operations namely addition and multiplication. The proposed floating point adders and multipliers are used in developing 16 point Fast Fourier Transform and Inverse Fast Fourier Transform blocks. The proposed design eliminates hardware redundancy by intelligently manipulating the inputs and there by reduces the area required for implementation. The existing design and proposed design of the complex floating point multiplier is compared on the Cadence platform. Analysis of the obtained results show that the proposed design of the complex floating point multiplier as compared to the existing design, is optimal in terms of number of cells, number of gates, path delay, cell area and produces highly precise results.

Apparatus and method for variable fast fourier transform

Abstract: The present invention relates to an apparatus and method for variable fast Fourier transform. According to an embodiment of the present invention, two n-point fast Fourier transform (FFT) processors are used to generate two n-point FFT output data or one 2n-point FFT output data. The one 2n-point input data is alternately input to the two n-point FFT processors. Each of the two n-point FFT processors selects a twiddle factor for the n-point input data or the 2n-point input data and performs fast Fourier transform. A butterfly operation is performed on signals obtained by performing fast Fourier transform on the 2n-point input data signal, and the processed signals are aligned in an output order. According to this structure, it is possible to realize a fast Fourier transform hardware engine that selectively performs multi-frequency allocation in a base station system that supports the multi-frequency allocation.