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Showing papers on "Spy-Bi-Wire published in 2007"


Patent
30 Apr 2007
TL;DR: In this paper, a wireless switch includes a multi-core processor comprising a first core and a second core, and a JTAG emulator coupled to the first and the second core.
Abstract: A wireless switch includes a multi-core processor comprising a first core and a second core, and a JTAG emulator coupled to the first core and the second core. The JTAG application of the first core is adapted to debug the second core via the JTAG emulator.

4 citations


Proceedings ArticleDOI
12 Nov 2007
TL;DR: A JTAG micro-controller based on off-the-shelf components and free software is designed and tested, providing fast configuration of long FPGA chains over ethernet at 500 kgates/s and it supports most of the common file formats.
Abstract: JTAG interface of FPGA devices can be used as a low-footprint general-purpose communication port, providing powerful and flexible test and debug capability to a design. A JTAG micro-controller based on off-the-shelf components and free software is designed and tested. It provides fast configuration of long FPGA chains over ethernet at 500 kgates/s, it supports most of the common file formats. It can be used for slow control monitoring (100 kb/s) and moderate data taking (2 MByte/s).

4 citations


Journal Article
TL;DR: In this approach, SuperV2, a DSP processor, is taken as the prototype, and breakpoint setting, debug request and single-step execution by extending the ports and instructions of JTAG and modifying some modules of the core.
Abstract: This paper presents an on-chip debugging method for embedded processor based on IEEE Standard 1149.1. In this approach, SuperV2, a DSP processor, is taken as the prototype. Breakpoint setting, debug request and single-step execution by extending the ports and instructions of JTAG and modifying some modules of the core.

1 citations