Showing papers on "Spy-Bi-Wire published in 2010"

Anti-tamper JTAG TAP design enables DRM to JTAG registers and P1687 on-chip instruments

Abstract: This paper describes an anti-tamper JTAG Tap design which uses SHA256 secure hash and a true random number generator (TRNG) to create a low gate overhead challenge/response based access system for IC test and on-chip internals. The system may be used to enable 1149.1 TAP instructions or may control access to an IEEE P1687 on-chip instrument. The TAP owner (manufacturer of the IC) may then use DRM (Digital Rights Management) based JTAG software to manage which end users have access to the TAP or TAP accessible areas of the IC.

Jtag apparatus and method for implementing jtag data transmission

Abstract: A Joint Test Action Group (JTAG) apparatus and a method for implementing JTAG data transmission are disclosed. The JTAG apparatus includes an isolation circuit connected with a processor and pins of a JTAG programmable logic device, wherein the isolation circuit has a register/registers corresponding to the pins of the JTAG programmable logic device. Based on a high or low level signal written into the register/registers of the isolation circuit by the processor, the isolation circuit drives the pins of the JTAG programmable logic device, and transmits the JTAG data corresponding to the high or low level signal from the processor to the JTAG programmable logic device. The isolation circuit is used to implement protection of a JTAG interface or a serial port of a personal computer connected with the JTAG apparatus.

Design of Reconfigurable Controller Based on ARM and FPGA

Abstract: The design of reconfigurable controller based on ARM and FPGA is introduced.The method of FPGA configuration with JTAG mode using ARM processor which added the higher flexibility of the reconfigurable system.System structure and function are discussed,the timing using IEEE JTAG 1149.1 mode and XSVF form configuration files to configurate FPGA on the system.