Topic
Spy-Bi-Wire
About: Spy-Bi-Wire is a research topic. Over the lifetime, 64 publications have been published within this topic receiving 773 citations.
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01 Sep 1991TL;DR: A chip dedicated to test static RAM arrays on pc board that is fully JTAG(1149.1) compatible, and has self-test capability, in accordance to the Hierarchical Self-Test Concept.
Abstract: This paper describes a chip dedicated to test static RAM arrays on pc board. This chip is fully JTAG(1149.1) compatible, and has self-test capability. This is a real versatile product, in accordance to the Hierarchical Self-Test Concept. The design has been made with synthesis tools for the core and hard-macro for the Boundary-Scan Registers.
1 citations
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03 Apr 2013TL;DR: In this article, an optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit, which can be used for a variety of serial communication operations such as, but not limited to, serial communication related integrated circuit test, emulation, debug, and trace operations.
Abstract: An optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit. The interface requires fewer pins than the conventional JTAG interface and is thus more applicable than conventional JTAG interfaces on an integrated circuit where the availability of pins is limited. The interface may be used for a variety of serial communication operations such as, but not limited to, serial communication related integrated circuit test, emulation, debug, and/or trace operations.
1 citations
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TL;DR: The two modes of JTAG and UART have got a good effect in the design of E1-Ethernet bridge based on embedded system, and Flash chip AT49BV1604A and ARM chip S3C4510B were used.
Abstract: According to the Flash operation,a in-depth analysis of JTAG and UART modes is developed.JTAG operation is used in program debug and UART operation is used in program download and system upgrade.The two modes are introduced in this paper,which have got a good effect in the design of E1-Ethernet bridge based on embedded system,and Flash chip AT49BV1604A and ARM chip S3C4510B were used.
1 citations
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01 Feb 2014
TL;DR: An implementation of JTAG API is introduced to enable analysis of ARM core based embedded systems and the API function set includes the categories of debugger and target device controls: debugging environment and operation.
Abstract: Debugger systems are necessary to apply dynamic program analysis when evaluating security properties of embedded system software. It may be possible to make the use of software-based debugger and/or DBI framework if target devices support general purpose operating systems, however, constraints on applicability as well as environmental transparency might be incurred thereby hindering overall analyzability. Analysis with JTAG (IEEE 1149.1) debugging devices can overcome these difficulties in that no change would be involved in terms of internal software environment. In that sense, JTAG API can facilitate to practically perform dynamic program analysis for evaluating security properties of target device software.In this paper, we introduce an implementation of JTAG API to enable analysis of ARM core based embedded systems. The API function set includes the categories of debugger and target device controls: debugging environment and operation. To verify API applicability, we also provide example analysis tool implementations: our JTAG API could be used to build kernel function fuzzing and live memory forensics modules.Keywords:Embedded Systems, JTAG, Program Analysis, Security Evaluation
1 citations
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TL;DR: In this approach, SuperV2, a DSP processor, is taken as the prototype, and breakpoint setting, debug request and single-step execution by extending the ports and instructions of JTAG and modifying some modules of the core.
Abstract: This paper presents an on-chip debugging method for embedded processor based on IEEE Standard 1149.1. In this approach, SuperV2, a DSP processor, is taken as the prototype. Breakpoint setting, debug request and single-step execution by extending the ports and instructions of JTAG and modifying some modules of the core.
1 citations