Spy-Bi-Wire

About: Spy-Bi-Wire is a research topic. Over the lifetime, 64 publications have been published within this topic receiving 773 citations.

Serial/parallel control, separate tap, master reset synchronizer for tap domains

Abstract: An optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit. The interface requires fewer pins than the conventional JTAG interface and is thus more applicable than conventional JTAG interfaces on an integrated circuit where the availability of pins is limited. The interface may be used for a variety of serial communication operations such as, but not limited to, serial communication related integrated circuit test, emulation, debug, and/or trace operations.

Optimizing jtag interface

Abstract: An optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit. The interface requires fewer pins than the conventional JTAG interface and is thus more applicable than conventional JTAG interfaces on an integrated circuit where the availability of pins is limited. The interface may be used for a variety of serial communication operations such as, but not limited to, serial communication related integrated circuit test, emulation, debug, and/or trace operations.

Jtag compliant peripherals

Abstract: JTAG was started to define a test methodology that would address the foreseen problems and to describe the methodology in a technical proposal. In this project, JTAG compliant circuits are designed and Test Pattern Generator is created to automatically generate test patterns to test the circuits. This project will be written in Verilog HDL language and coding is loaded to the ALTERA FPGA DE2 board to undergo project testing purposes. Software NIOS II IDE is used as a tool to write the firmware and act as interface for the computer and DE2 board. The result from DE2 board will be displayed to the monitor. Input will be key in by using the keyboard. During testing, the designed calculator and JTAG able to work at DE2 board. As conclusion, added Test Vector Generator make it easier the testing operation and JTAG is useful when we want to test the interconnection between ICs at printed circuit board.

Design and Implementation of the Arm JTAG Emulator

Abstract: ARM processors are widely used in embedded electronic products, especially in communication, industry con- trol, and automatic, has become the major processor in embedded electronic products. Nearly all the high performance emulators are developed by oversea tool providers, which are too expensive to be generally developed by a small or tiny company. Some JTAG emulator with low price can't meet the requirements of large scale software development. This pa- per focuses on the problems mentioned above, provide a solution to design and implement the ARM JTAG emulator after studing ARM EmbeddedICE technology, GDB debugging technology, RSP protocol, μC/OS-II and LwIP and etc. This JTAG emulator is designed based on AT91SAM9260, supporting ARM7 and ARM9 serial processor core and JTAG clock rate programming, with the communication interface including 10/100M auto-adapt Ethernet, USB and RS232.