scispace - formally typeset
Search or ask a question

Showing papers on "State (computer science) published in 2002"


Journal ArticleDOI
TL;DR: In this paper, the three basic logic operations (AND, NOT, and OR) and more complex logic functions (EOR, INH, NOR, XNOR, and XOR) have been reproduced already at the molecular level.
Abstract: The tremendous pace in the development of information technology is rapidly approaching a limit. Alternative materials and operating princlples for the elaboration and communication of data in electronic circults and optical networks must be identified. Organic molecules are promising candidates for the realization of future digital processors. Their attractive features are the miniaturized dimensions and the high degree of control on molecular design possible in chemical synthesis. Indeed, nanostructures with engineered properties and specific functions can be assembled relying on the power of organic synthesis. In particular, certain molecales can be designed to switch from one state to another, when addressed with chemical, electrical, or optical stimulations, and to produce a detectable signal in response to these transformations. Binary data can be enceded on the input stimulations and output signals employing logic conventions and assumptions similar to those ruting digital electronics. Thus, binary inputs can be transduced into binary outputs relying on molecular switches. Following these design principles, the three basic logic operations (AND, NOT, and OR) and more complex logic functions (EOR, INH, NOR, XNOR, and XOR) have been reproduced already at the molecular level. Presently, these simple "molecular processors" are far from any practical application. However, these encouraging results demonstrate already that chemical systems can process binary data with designed logic protocols. Further fundamental studies on the various facets of this emerging area will reveal if and how molecular switches can become the basic components of furture logic devices. After all, chemical computers are available atready. We all carry one in our head!

595 citations


Proceedings ArticleDOI
01 Nov 2002
TL;DR: This work shows how the Delta Debugging algorithm isolates the relevant variables and values of a program state by systematically narrowing the state difference between a passing run and a failing run by assessing the outcome of altered executions to determine wether a change in the program state makes a difference in the test outcome.
Abstract: Consider the execution of a failing program as a sequence of program states. Each state induces the following state, up to the failure. Which variables and values of a program state are relevant for the failure? We show how the Delta Debugging algorithm isolates the relevant variables and values by systematically narrowing the state difference between a passing run and a failing run---by assessing the outcome of altered executions to determine wether a change in the program state makes a difference in the test outcome. Applying Delta Debugging to multiple states of the program automatically reveals the cause-effect chain of the failure---that is, the variables and values that caused the failure.In a case study, our prototype implementation successfully isolated the cause-effect chain for a failure of the GNU C compiler: "Initially, the C program to be compiled contained an addition of 1.0; this caused an addition operator in the intermediate RTL representation; this caused a cycle in the RTL tree---and this caused the compiler to crash."

543 citations


Proceedings ArticleDOI
18 Nov 2002
TL;DR: A formal approach for finding bugs in security-relevant software and verifying their absence and experience suggests that this approach will be useful in finding a wide range of security vulnerabilities in large programs efficiently.
Abstract: We describe a formal approach for finding bugs in security-relevant software and verifying their absence. The idea is as follows: we identify rules of safe programming practice, encode them as safety properties, and verify whether these properties are obeyed. Because manual verification is too expensive, we have built a program analysis tool to automate this process. Our program analysis models the program to be verified as a pushdown automaton, represents the security property as a finite state automaton, and uses model checking techniques to identify whether any state violating the desired security goal is reachable in the program. The major advantages of this approach are that it is sound in verifying the absence of certain classes of vulnerabilities, that it is fully interprocedural, and that it is efficient and scalable. Experience suggests that this approach will be useful in finding a wide range of security vulnerabilities in large programs efficiently.

436 citations


Journal ArticleDOI
TL;DR: A new algorithm for duplicate document detection that uses collection statistics and shows that the approach, called I-Match, scales in terms of the number of documents and works well for documents of all sizes.
Abstract: We present a new algorithm for duplicate document detection that uses collection statistics. We compare our approach with the state-of-the-art approach using multiple collections. These collections include a 30 MB 18,577 web document collection developed by Excite@Home and three NIST collections. The first NIST collection consists of 100 MB 18,232 LA-Times documents, which is roughly similar in the number of documents to the ExciteaHome collection. The other two collections are both 2 GB and are the 247,491-web document collection and the TREC disks 4 and 5---528,023 document collection. We show that our approach called I-Match, scales in terms of the number of documents and works well for documents of all sizes. We compared our solution to the state of the art and found that in addition to improved accuracy of detection, our approach executed in roughly one-fifth the time.

294 citations


Proceedings ArticleDOI
28 Jul 2002
TL;DR: This paper explores safe state abstraction in hierarchical reinforcement learning, where learned behaviors must conform to a given partial, hierarchical program, and shows how to achieve this for a partial programming language that is essentially Lisp augmented with nondeterministic constructs.
Abstract: Safe state abstraction in reinforcement learning allows an agent to ignore aspects of its current state that are irrelevant to its current decision, and therefore speeds up dynamic programming and learning. This paper explores safe state abstraction in hierarchical reinforcement learning, where learned behaviors must conform to a given partial, hierarchical program. Unlike previous approaches to this problem, our methods yield significant state abstraction while maintaining hierarchical optimality, i.e., optimality among all policies consistent with the partial program. We show how to achieve this for a partial programming language that is essentially Lisp augmented with nondeterministic constructs. We demonstrate our methods on two variants of Dietterich's taxi domain, showing how state abstraction and hierarchical optimality result in faster learning of better policies and enable the transfer of learned skills from one problem to another.

259 citations


Patent
28 Mar 2002
TL;DR: In this article, a carrier medium is used to enable the execution of a first virtual machine, where the computer system is configured to capture a state of the first VM, the state corresponding to a point in time of execution of the VM, and copy at least a portion of the state to a destination separate from a storage device to which the VM is suspendable.
Abstract: One or more computer systems, a carrier medium, and a method are provided for backing up virtual machines. The backup may occur, e.g., to a backup medium or to a disaster recovery site, in various embodiments. In one embodiment, an apparatus includes a computer system configured to execute at least a first virtual machine, wherein the computer system is configured to: (i) capture a state of the first virtual machine, the state corresponding to a point in time in the execution of the first virtual machine; and (ii) copy at least a portion of the state to a destination separate from a storage device to which the first virtual machine is suspendable. A carrier medium may include instructions which, when executed, cause the above operation on the computer system. The method may comprise the above highlighted operations.

243 citations


Patent
22 Feb 2002
TL;DR: In this article, non-volatile memory that has nonvolatile charge storing capability such as EEPROM and flash EEPRAM is programmed by a programming system that applies to a plurality of memory cells in parallel.
Abstract: Non-volatile memory that has non-volatile charge storing capability such as EEPROM and flash EEPROM is programmed by a programming system that applies to a plurality of memory cells in parallel. Enhanced performance is achieved by programming each cell to its target state with a minimum of programming pulses using a data-dependent programming voltage. Further improvement is accomplished by performing the programming operation in multiphase where each successive phase is executed with a finer programming resolution such as employing a programming voltage with a gentler staircase waveform. These features allow rapid and accurate convergence to the target states for the group of memory cells being programmed in parallel, thereby allowing each cell to store several bits of information without sacrificing performance.

230 citations


Patent
09 Aug 2002
TL;DR: An application programming interface as mentioned in this paper implements a method for transparently switching from one communication protocol to another and for restoring the state of a previous connection on a local, client computer, as well as remote computers.
Abstract: An application programming interface implements a method for transparently switching from one communication protocol to another and for restoring the state of a previous connection. The application programming interface executes on a local, client computer, as well as remote computers. It includes functions that multi-user application programs can call to communicate in a device independent manner with other applications executing on remote computers. To support communication on a variety of different computer communication protocols, the application programming interface accesses programs called service providers that implement the communication protocols and support the message passing model of the interface. The application programming interface can transparently switch the protocol on a remote computer by sending a system message to a compatible version of the interface on the remote computer that includes an identifier of the service provider for the new protocol. In response to the message, the application programming interface loads the new service provider and takes steps to set-up a new connection. The application programming interface can also restore the state of previous connection on a remote computer by sending a system message. In response to this message, the application programming interface on the remote computer retrieves the previous connection state from an MRU stack and loads the service provider for the previous connection.

221 citations


Patent
14 Jan 2002
TL;DR: In this paper, column switching and blanking are used for displaying a stereoscopic image with projector using one or more digital micromirror devices positioned into a plurality of columns and rows.
Abstract: The invention has two main embodiments, a first called column switching and blanking and a second embodiment called doubling. The first embodiment is a projector for displaying a stereoscopic image with projector using one or more digital micromirror devices positioned into a plurality of columns and rows. The projector itself includes a light source, an optical system, a video processing system and a data system for driving the micromirror devices. The data subsystem provides separate data to a plurality of column pairs of the micromirrors. The projector includes a stereoscopic control circuit having a first state of the control circuit for inputting a first eye view of the stereoscopic image and causing the micromirrors of a first column of each column pair to be in various on and off states during said first eye view of said stereoscopic image and for causing all of said micromirrors of a second column of each column pair to be in an off state during said first eye view of said stereoscopic image. A second state of the control circuit is used for inputting a second eye view of the stereoscopic image and causes the micromirrors of the second column of each column pair to be in various on and off states during the second eye view of the stereoscopic image and for causing all of the micromirrors of the first column of each column pair to be in an off state during the second eye view of said stereoscopic image. The second embodiment is a projector for displaying a stereoscopic image with the projector using one or more digital micromirror devices positioned into a plurality of columns and rows. The projector includes a light source, an optical system, a video processing system and a data system for driving said micromirror devices. The data subsystem provides separate data to a plurality of column pairs of the micromirrors. The projector includes a stereoscopic control circuit having a first state for inputting a first eye view of the stereoscopic image and causing each micromirror of each column pair to be in various but identical on and off states during said first eye view of said stereoscopic image. A second state of the control circuit for inputs a second eye view of the stereoscopic image and causes each micromirror of each column pair to be in various but identical on and off states during the second eye view of the stereoscopic image.

187 citations


Patent
08 Oct 2002
TL;DR: In this paper, a method and system for patient generation and evolution for a computer-based testing system and/or expert system is described, where one or more belief networks which describe parallel health state networks are accessed by a user or a computer.
Abstract: A method and system for patient generation and evolution for a computer-based testing system and/or expert system. One or more belief networks, which describe parallel health state networks are accessed by a user or a computer. A knowledge base, at least in part, is scripted from the one or more belief networks by the computer. A model patient at least in part, is instantiated by the computer from the scripted knowledge base. Optionally, the model patient is evolved by the computer in accordance with the parallel health state networks and responsive to a received course of action.

165 citations


Patent
Takashi Miyazawa1
11 Dec 2002
TL;DR: In this article, the tone of the light emission from the organic EL element was set by setting the first and second voltage programming transistors 251 and 252 to OFF and ON states, respectively, and voltage programming was carried out using a voltage signal Vout.
Abstract: Pixel circuit 210 includes a current programming circuit 240 and voltage programming transistors 251 and 252. In order to set the tone of the light emission from the organic EL element 220, the first and second voltage programming transistors 251 and 252 are set to the OFF and ON state, respectively, and voltage programming is carried out using a voltage signal Vout. Next, the states of the first and second voltage programming transistors 251 and 252 are switched, and current programming is carried out using a current signal Iout.

Patent
13 Jun 2002
TL;DR: In this article, the plurality of internet protocol packets collectively containing an information sequence within a series of states is rearranged so as to place the information sequence in order, and each state of the series-of-states is then successively examined.
Abstract: A method of detecting intrusions on a computer includes storing an intrusion signature describing an attack on a computer. Once a plurality of internet protocol packets is received, the plurality of internet protocol packets collectively containing an information sequence within a series of states, it is rearranged so as to place the information sequence in order. Each state of the series of states is then successively examined so as to correlate the information sequence to the intrusion signature.

Patent
01 Jun 2002
TL;DR: In this article, a rotating media storage device (RMSD) includes a cache memory and a microprocessor for executing a read caching algorithm for storing data in the cache memory.
Abstract: A rotating media storage device (RMSD) includes a cache memory and a microprocessor for executing a read caching algorithm for storing data in the cache memory. The microprocessor modifies the read caching algorithm when a vibration state is detected to optimize data transfer rates to and from the media in a vibrating operational environment.

Patent
19 Nov 2002
TL;DR: In this paper, the authors propose a method for a computer repairing itself to an operational status at any time during operation, the method comprising the computer-executed steps of: booting from a first hard disk drive boot device disposed within a main computer hardware box of the computer; then, in response to a signal indicating a need for repair of a computer during the booting or during any operating state.
Abstract: A method for a computer repairing itself to an operational status at any time during operation, the method comprising the computer-executed steps of: booting from a first hard disk drive boot device disposed within a main computer hardware box of the computer; then, in response to a signal indicating a need for repair of the computer during the booting or during any operating state, booting from a second hard disk drive boot device also disposed within the main computer hardware box of the computer prior to the signal indicating a need for repair; and then repairing software on the first hard disk drive while booted from the second hard disk drive boot device and selectively either: (i) maintaining operation of the computer from the second boot device to restore operational status of the computer during repairing of the software on the first hard disk device, or (ii) changing to operation of the computer from the second boot device to the first boot device to restore operational status of the computer.

Patent
13 Dec 2002
TL;DR: In this paper, the programmable shader translates state-based control information received from a host computer into native control information, which is used to optimize the generated control information by combining certain operations.
Abstract: A graphics subsystem having a programmable shader controllable by both state-based control information, such as DirectX 8 control information, and program instructions, such as DirectX 9 shader program instructions. The programmable shader translates state-based control information received from a host computer into native control information. The programmable shader translates into native control information program instructions fetched from memory locations identified by a received memory reference and program instructions received from the graphics subsystem. Native control information configures computation units of the programmable shader. The programmable shader optimizes the generated native control information by combining certain operations. The graphics subsystem detects memory references sent from the host computer and pre-fetches program instructions for transmission to the programmable shader. Native control information from multiple control sources is concurrently used in the programmable shader.

Patent
22 Mar 2002
TL;DR: In this paper, the replicated and migration capable state for an enterprise Java bean (EJB) application is described, which includes executing a Java application on a server that includes an entity bean.
Abstract: An invention is disclosed managing the replicated and migration capable state for an enterprise Java bean (EJB) application. The invention includes executing a Java application on a server that includes an entity bean. In addition, a replicated state manager is executed that includes program instructions for managing an in-memory state of the Java application, and program instructions for replicating the in-memory state of the Java application to a replicated state server. The replicated state server can be a memory replicated state server, or a disk replicated state server. To facilitate application state management, embodiments of the present invention store states of the entity beans objects using state objects, which are updated in response to changes in the state of the application. Hence, the embodiments of the present invention define a logical separation between the application and the state objects.

Patent
19 Sep 2002
TL;DR: In this article, the authors propose an interface protocol for the functional manipulation of complex devices such as consumer electronic devices without the necessity of the visual feedback via textual or graphic data, wherein the sensor functions change with time rather than placement, so that a user action biases a binary state switch which is correlated to a timed audible audio data stream, the correlation indicating the desired action selected by the user.
Abstract: An interface protocol for the functional manipulation of complex devices such as consumer electronic devices without the necessity of the visual feedback via textual or graphic data, wherein the sensor functions change with time rather than placement, so that a user action biases a binary state switch, which is correlated to a timed audible audio data stream, the correlation indicating the desired action selected by the user.

Patent
05 Mar 2002
TL;DR: In this paper, a clock preselecting means is designed in such a way that, depending on the state, a first clock is preselected at least at a first cell (PAE) and an additional clock is precomputed at least in an additional cell.
Abstract: A data processing unit having a field of clocked logic cells (PAEs) which is operable in different configuration states and a clock preselecting means for preselecting logic cell clocking. The clock preselecting means is designed in such a way that, depending on the state, a first clock is preselected at least at a first cell (PAE) and an additional clock is preselected at least at an additional cell.

Patent
20 Mar 2002
TL;DR: In this article, a program controller is provided for writing the data into a selected memory cell in a designated area, and for reading the data written in the selected cell to verify whether or not its resultant threshold voltage falls within an allowable range.
Abstract: A NAND-cell type EEPROM includes an array of memory cells connected to bit lines. Each cell includes one transistor with a floating gate and a control gate electrode, wherein electrons are tunneled to or from the floating gate to write a data thereinto. A sense/latch circuit is connected to the bit lines, and selectively performs a sense operation and a latch operation of the write data. A program controller is provided for writing the data into a selected memory cell in a designated area, and for reading the data written in the selected cell to verify whether or not its resultant threshold voltage falls within an allowable range. If it is insufficient, the data is rewritten thereinto. A rewrite-data setting section is provided for performing a logic operation with respect to a read data from the selected cell and the write data being latched in the sense/latch circuit, and for updating automatically a rewrite data being stored in the sense/latch circuit with respect to every bit line in accordance with the actual write state as being verified. The sense/latch circuit includes a CMOS flip-flop circuit, which acts as a data-latch at the beginning of the verify operation, and serves as a sense amplifier once after it is reset.

Patent
13 Dec 2002
TL;DR: In this article, a method and system to program a memory material is described, which may include applying three signals having different durations and different amplitudes to the memory material to program it to a predetermined state.
Abstract: Briefly, in accordance with an embodiment of the invention, a method and system to program a memory material is provided. The method may include applying three signals having different durations and different amplitudes to a memory material to program the memory material to a predetermined state.

Patent
04 Sep 2002
TL;DR: In this paper, the pre-record state of a storage cell is read before recording information in the storage cell, and a write pulse optimum for transition is selected and applied, depending on whether the cell should be changed to the amorphous state or the crystal state, to control the crystallization hold time.
Abstract: In a phase-change nonvolatile storage device using a phase-change material as storage cells, which is improved to overcome a basic problem involved in conventional devices of this type and reliably, easily operable as a storage device, the pre-record state of a storage cell is read before recording information in the storage cell, and a write pulse optimum for transition is selected and applied. If the storage cell need not change in phase, the write pulse need not be applied. Alternatively, the pulse is adjusted in waveform of the trailing edge, depending on whether the storage cell should be changed to the amorphous state or the crystal state, to control the crystallization hold time.

Patent
14 Jun 2002
TL;DR: In this article, the authors present a method and apparatus for maintaining a networked computer system including first and second nodes and an event processing server, the method comprising the first two nodes detecting changes in state, the event processor receiving notification of the changes in states from the first and the second nodes, and the event process server correlating changes in detected in the first node and executing a maintenance decision which affects the second node.
Abstract: The invention provides method and apparatus for maintaining a networked computer system including first and second nodes and an event processing server, the method comprising the first and second nodes detecting changes in state, the event processing server receiving notification of the changes in state from the first and second nodes, the event processing server correlating changes in state detected in the first and second nodes, and the event processing server executing a maintenance decision which affects the first and second nodes The detecting, transmitting, correlating, and executing occurs without human intervention

Patent
19 Jul 2002
TL;DR: In this article, a reset circuit 21 is connected between an output net OUT and a power supply voltage VDD and is constituted of a PMOS transistor MP5 controlled by a reset signal R to a gate terminal, and is added to a PSCMOS type 4-input NOR circuit 11 which carries out NOR logic operation at a fast speed in an Evaluate period.
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which realizes rapidity of transition to a reset state in a RESET period while keeping rapidity of state transition in an EVALUATE period, and has a digital circuit part such as PSCMOS circuit which enables further rapid operation. SOLUTION: A reset circuit 21 is connected between an output net OUT and a power supply voltage VDD and is constituted of a PMOS transistor MP5 controlled by a reset signal R to a gate terminal, and is added to a PSCMOS type 4-input NOR circuit 11 which carries out NOR logic operation at a fast speed in an EVALUATE period. In a RESET period, control is carried out by a reset signal R, and thereby the PMOS transistor MP5 is made conductive and an output net OUT is charged with a power supply voltage VDD at a fast speed. As a result, an output net OUT of the PSCMOS type 4-input NOR circuit 11 is changed to a reset state and fast circuit operation is carried out.

Patent
17 Jan 2002
TL;DR: In this paper, the authors present a system for testing circuitry of a programmable logic device (PLD), where a host data processing arrangement is configured with a run-time reconfiguration programming interface.
Abstract: Method and system for testing circuitry of a programmable logic device (PLD). A host data processing arrangement is configured with a run-time reconfiguration programming interface, and a run-time reconfiguration test program that invokes methods of the interface executes on the host arrangement. In response to a method of the programming interface invoked from the test program, the PLD is configured with a first configuration bitstream. State data are then read back from the PLD in response to a method of the programming interface invoked from the test program. The test program also identifies differences between the state data and expected-results data.

Patent
John A. Cook1
24 Jun 2002
TL;DR: In this paper, a programming framework is provided for designing and implementing software state machines, where a state machine initializer acts as a helper to the state machine object, which uses the initializer to create an array of state transition objects.
Abstract: A programming framework is provided for designing and implementing software state machines. A state machine initializer may be created that defines the states, conditions, actions, triggers, and state transitions for the software state machines. A set of user interfaces, may also be provided for creating initializers. An abstract state machine object may then be created that creates an instance of a particular state machine initializer. The state machine initializer acts as a helper to the state machine object, which uses the initializer to create an array of state transition objects. A set of programming interfaces may also be provided to define the programming framework. Events generated by one state machine may be used as triggers by another state machine. Furthermore, state values of one state machine may be used as inputs by other state machines. State machines may also share triggers and inputs.

Patent
07 Feb 2002
TL;DR: In this article, a method for determining performance of a storage battery including evaluating a time profile of voltage drop in the storage battery by application of a heavy current load, determining a voltage A from voltage response U(t) of the stored battery after switching on the heavycurrent load, and determining a state value A1 from the voltage value A, battery temperature TBAT and state of charge SOC, comparing state values A1 with a preset value A 1 x which depends at least on associated battery temperature (TBAT) and associated state charge (SOC), wherein the present value
Abstract: A method for determining performance of a storage battery including evaluating a time profile of voltage drop in the storage battery by application of a heavy current load, determining a voltage A from voltage response U(t) of the storage battery after switching on the heavy current load, determining a state value A1 from the voltage value A, battery temperature TBAT and state of charge SOC, comparing state value A1 with a preset value A1 x which depends at least on associated battery temperature (TBAT) and associated state of charge (SOC) of the storage battery, wherein the present value A1 x is calculated from comparison values A1 T which are determined from the state values A1 for previous heavy current loads applied to the storage battery, and determining performance of the storage battery from the difference between the present value A1 x and the state value A1.

Patent
Felix G. T. I. Andrew1
11 Oct 2002
TL;DR: In this article, a method and system for automatically selecting a software input method and adjusting the keys displayed on the software input panel of a software-input method based on the state of an application program is presented.
Abstract: A method and system for automatically selecting a software input method and/or adjusting the keys displayed on a software input panel of a software input method based on the state of an application program, such as corresponding to the currently focused field in which data is to be entered. An application communicates with a software input method manager to provide the software input method manager with information related to a desired input method, or the manager otherwise obtains the state information. Based on the state, an input panel is displayed that automatically changes its keyboard layout and key meanings based on what the user is likely to need, thereby increasing convenience and/or usability of the input system. The keys' appearances and/or their underlying meanings can be dynamically configured based on previously-entered user data, such as maintained and sent by the application program or maintained by the software input method manager.

Patent
29 Mar 2002
TL;DR: In this paper, the authors present a system and method for determining an active service processor from two or more redundant service processors in the system, which typically includes two management modules and at least one managed subsystem such as a server blade.
Abstract: A system and method for determining an active service processor from two or more redundant service processors in the system. The system typically includes two management modules and at least one managed subsystem such as a server blade. Each management module includes a service processor and control logic. The control logic is configured to receive various status signals from the service processor and to generate a control signal based thereon. The control signal is provided, via an interconnect plane, to determination logic on each managed subsystem. The determination logic receives a control signal from each management module and generates a switch signal based on the state of the control signals. The switch signal controls switching logic configured to receive bus signals from the service processors on each management module. Based on the control signal, one of the service processor bus signals is provided to managed instrumentation on the managed subsystem. The management module control logic is generally configured to maintain the control signal in its current state if the active processor is determined to be functional. The control logic is further configured to alter the control signal state if the active service processor is determined to be non-functional. A transition in the control signal typically generates a fail-over event that causes the switching logic on the managed subsystems to switch from the previously active service processor to the previously inactive or standby service processor as the source of service processor signals.

Patent
05 Nov 2002
TL;DR: In this paper, the authors present a data-processing system comprising a processor and first encrypted information in a first persistent memory whose level of information leakage is higher than that of a second persistent memory.
Abstract: The invention is directed to a data-processing system comprising a processor and first encrypted information in a first persistent memory whose level of information leakage is higher than that of a second persistent memory. In the second persistent memory is stored a first cryptographic key for decrypting the first encrypted information, thereby generating therefrom first unencrypted information that is usable by the processor for executing an operation. The same cryptographic key may also be used for encrypting the first unencrypted information, thereby generating the first encrypted information. It is also directed to a method of processing such a data-processing system with an operating system, comprising a writing step for writing first unencrypted information into the first persistent memory, an encryption step for encrypting the first unencrypted information under use of the first cryptographic key, creating therefrom first encrypted information in the first persistent memory, and an access-limitation step for setting the data-processing system to a state in which writing into the first persistent memory is controlled by the operating system. It also relates to a method of executing an operation on such a data-processing system comprising a decryption step for decrypting the first encrypted information under use of the first cryptographic key, thereby generating therefrom first unencrypted information and an execution step for executing an operation by the processor, using the first unencrypted information.

01 Jan 2002
TL;DR: In this paper, a technique for the automated generation of 3D building models from directly observed LIDAR point clouds and digital aerial images is described, and an object-relational technique for handling hybrid topographic data in a topographic information system is presented.
Abstract: This paper is focused on two topics: first, it deals with a technique for the automated generation of 3D building models from directly observed LIDAR point clouds and digital aerial images, and second, it describes an object-relational technique for handling hybrid topographic data in a topographic information system. Automatic building extraction combining the mentioned data sources consists of three steps. First, candidate regions for buildings have to be detected. After that, initial polyhedral building models have to be created in these candidate regions in a bottom-up procedure. Third, these initial polyhedral building models have to be verified in the images to improve the accuracy of their geometric parameters. This paper describes the current state of development, the overall work flow, and the algorithms used in its individual stages. Intermediate results are presented.