Showing papers on "State (computer science) published in 2005"

Hierarchical systems and methods for providing a unified view of storage information

Abstract: The present invention provides systems and methods for data storage. A hierarchical storage management architecture is presented to facilitate data management. The disclosed system provides methods for evaluating the state of stored data relative to enterprise needs by using weighted parameters that may be user defined. Also disclosed are systems and methods evaluating costing and risk management associated with stored data.

Analysis of recursive state machines

Abstract: Recursive state machines (RSMs) enhance the power of ordinary state machines by allowing vertices to correspond either to ordinary states or to potentially recursive invocations of other state machines. RSMs can model the control flow in sequential imperative programs containing recursive procedure calls. They can be viewed as a visual notation extending Statecharts-like hierarchical state machines, where concurrency is disallowed but recursion is allowed. They are also related to various models of pushdown systems studied in the verification and program analysis communities.After introducing RSMs and comparing their expressiveness with other models, we focus on whether verification can be efficiently performed for RSMs. Our first goal is to examine the verification of linear time properties of RSMs. We begin this study by dealing with two key components for algorithmic analysis and model checking, namely, reachability (Is a target state reachable from initial states?) and cycle detection (Is there a reachable cycle containing an accepting state?). We show that both these problems can be solved in time O(nθ2) and space O(nθ), where n is the size of the recursive machine and θ is the maximum, over all component state machines, of the minimum of the number of entries and the number of exits of each component. From this, we easily derive algorithms for linear time temporal logic model checking with the same complexity in the model. We then turn to properties in the branching time logic CTL*, and again demonstrate a bound linear in the size of the state machine, but only for the case of RSMs with a single exit node.

Learning user simulations for information state update dialogue systems

Abstract: This paper describes and compares two methods for simulating user behaviour in spoken dialogue systems. User simulations are important for automatic dialogue strategy learning and the evaluation of competing strategies. Our methods are designed for use with “Information State Update” (ISU)-based dialogue systems. The first method is based on supervised learning using linear feature combination and a normalised exponential output function. The user is modelled as a stochastic process which selects user actions ( speech act, task pairs) based on features of the current dialogue state, which encodes the whole history of the dialogue. The second method uses n-grams of speech act, task pairs, restricting the length of the history considered by the order of the n-gram. Both models were trained and evaluated on a subset of the COMMUNICATOR corpus, to which we added annotations for user actions and Information States. The model based on linear feature combination has a perplexity of 2.08 whereas the best n-gram (4-gram) has a perplexity of 3.58. Each one of the user models ran against a system policy trained on the same corpus with a method similar to the one used for our linear feature combination model. The quality of the simulated dialogues produced was then measured as a function of the filled slots, confirmed slots, and number of actions performed by the system in each dialogue. In this experiment both the linear feature combination model and the best n-grams (5-gram and 4-gram) produced similar quality simulated dialogues.

Feedback-driven malware detector

Abstract: Embodiments of a feedback-driven malware detector are directed to protecting a computer from programs that perform actions that are malicious or not expected by a user. In one embodiment, the feedback-driven malware detector performs a method that initially determines whether the state of an application program scheduled to be added to an extensibility point on a computer is already known. If the state of the object is not already known, the user is informed that an application program is being installed on the computer and that the application program is being added to an extensibility point. Then, input is obtained from the user that assists in determining whether the application program is malware.

Operation scheme for programming charge trapping non-volatile memory

Abstract: A circuit and method for self-converging programming of a charge storage memory cell, such as NROM or floating gate flash. The method includes determining a data value from one of more than two data values to be stored in the memory cell, and applying a gate voltage to the control gate at one of a predetermined set of gate voltage levels selected in response to the determined data value. Programming parameters are controlled to establish a self-converging threshold state that is determined by the selected gate voltage. In this manner, the threshold voltage converges on a target threshold corresponding with the determined data value for the memory cell. Program verify operations are reduced or eliminated in various embodiments, reducing the overall time required for the program operation, and improving device performance. A second portion of the program operation can include verify operations to improve threshold margins across the array.

Non-volatile memory and method with power-saving read and program-verify operations

Abstract: A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during read, and program/verify operations. A read or program verify operation includes one or more sensing cycles relative to one or more demarcation threshold voltages to determine a memory state. In one aspect, selective memory cells among the group being sensed in parallel have their conduction currents turned off when they are determined to be in a state not relevant to the current sensing cycle. In another aspect, a power-consuming period is minimized by preemptively starting any operations that would prolong the period. In a program/verify operation cells not to be programmed have their bit lines charged up in the program phase. Power is saved when a set of these bit lines avoids re-charging at every passing of a program phase.

Representing a computer system state to a user

Abstract: Operations to represent a computer system state to a user include maintaining a model (14) in a computer system (10). The model (14) is updated at times and represents a current state of the computer system (10). The model (14) uses formal-language statements to associate each of several predefined goals (16) with at least one of several predefined actions (18) that can be performed in the computer system (10) to accomplish the associated predefined goal. The operations comprise providing an output to a user regarding the current state of the computer system (10), the output comprising a natural-language statement generated using at least one of the formal-language statements. A statement generating module (20) may include a text planner (202), a grammar (206), a lexicon (208), a translator (204) or a text post-processor (210).

Designing logic circuits for probabilistic computation in the presence of noise

Abstract: As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures confront devices and interconnections with a large number of inherent defects, which motivates the search for new architectural paradigms. In this paper, we examine probabilistic-based design methodologies for nanoscale computer architectures based on Markov random fields (MRF). The MRF approach can express arbitrary logic circuits and the logic operation is achieved by maximizing the probability of correct state configurations in the logic network depending on the interaction of neighboring circuit nodes. The computation proceeds via probabilistic propagation of states through the circuit. Crucially, the MRF logic can be implemented in modified CMOS-based circuitry that trades off circuit area and operation speed for the crucial fault tolerance and noise immunity. This paper builds on the recent demonstration that significant immunity to faulty individual devices or dynamically occurring signal errors can be achieved by the propagation of state probabilities over an MRF network. In particular, we are interested in CMOS-based circuits that work reliably at very low supply voltages (V/sup DD/ = 0.1-0.2 V), where standard CMOS would fail due to thermal and crosstalk noise, and transistor threshold variation. In this paper, we present results for simulated probabilistic test circuits for elementary logic components and well as small circuits taken from the MCNC91 benchmark suite and we show greatly improved noise immunity operating at very low V/sup DD/. The MRF framework extends to all levels of a design, where formally optimum probabilistic computation can be implemented as a natural element of the processing structure.

Boolean Control of Aptamer Binding States

Abstract: Molecules that perform Boolean calculations can analyze a series of inputs and make a decision to produce or not to produce an output, based on the presence or absence of inputs and a particular formula they encode. We now report that molecular computation performed by deoxyribozyme-based logic gates can be used to control the functional state of aptamers, switching them on or off based on the outcome of such computation.

Multiple level programming in a non-volatile memory device

Abstract: The programming method of the present invention minimizes program disturb by initially programming cells on the same word line with the logical state having the highest threshold voltage. The remaining cells on the word line are programmed to their respective logical states in order of decreasing threshold voltage levels.

Z-source current-type inverters: digital modulation and logic implementation

Abstract: Traditionally, current source (CS) inverters have been adopted for use in medium and high power industry applications. These inverters however support only current-buck dc-ac power conversion and need a relatively complex modulator, as compared to conventional voltage source (VS) inverters. To address these limitations, this paper presents an integration of the buck-boost Z-source power conversion concept to the CS inverter topology to develop single and three-phase Z-source CS inverters. For their efficient control, the paper starts by evaluating different carrier-based reference formulations to identify different inverter state placement possibilities. The paper then proceeds to design appropriate "reference-to-switch" assignments or logic equations for mapping out the correct CS gating signals, allowing a simple carrier-based modulator to control a Z-source CS inverter with complications such as commutation difficulties and "many-to-many" state assignments readily resolved. The developed system can be implemented using a digital signal processor with an embedded pulse-width modulator and an external programmable logic device, hence offering a competitive solution for medium power single and three-phase buck-boost power conversion. Theory, simulation and experimental results are presented in the paper.

Methods and systems for multi-pattern searching

Abstract: Embodiments of the present invention relate to systems and methods for optimizing and reducing the memory requirements of state machine algorithms in pattern matching applications. Memory requirements of an Aho-Corasick algorithm are reduced in an intrusion detection system by representing the state table as three separate data structures. Memory requirements of an Aho-Corasick algorithm are also reduced by applying a banded-row sparse matrix technique to the state transition table of the state table. The pattern matching performance of the intrusion detection system is improved by performing a case insensitive search, where the characters of the test sequence are converted to uppercase as the characters are read. Testing, reveals that state transition tables with sixteen bit elements outperform state transition tables with thirty-two bit elements and do not reduce the functionality of intrusion detection systems using the Aho-Corasick algorithm.

Welding system sequence control apparatus

Abstract: Welding systems and sequence controllers therefor are presented for controlling components of a welding system during a welding operation. The sequence controller receives system inputs and provides control outputs to the system components, and includes a processing component, an executable sequence control program, and a state table file. The sequence control state table file includes a number of entries corresponding to welding operation states, where the individual entries comprise one or more instruction identifiers, instruction parameters, exit condition identifiers and corresponding next state identifiers. The sequence control program is executed according to the sequence controller inputs and according to the state table file to provide the sequence controller outputs, where the state table file can be easily modified or new state table files can be created and downloaded to the sequence controller to facilitate easy reconfiguration of a welding system.

Video policy server

Abstract: A system for distributing digital content includes two or more digital. content sources. Each source has a separate session manager that is distinct from other session managers associated with other digital content sources. The system further includes at least one set of network resources that receive digital content from the two or more digital content sources, modulate the digital content onto a carrier signal suitable for transmission over an access network, and transmit the carrier signal over the access network. The system also includes a receiving device for terminating the carrier signal. The receiving device generates a digital content stream corresponding to the digital content from the two or more digital content sources. The system further includes a policy server for allocating bandwidth of the network resources to the digital content sources, and for monitoring a utilization state of the network resources.

System and method for programming cells in non-volatile integrated memory devices

Abstract: A system and method for quickly and efficiently programming hard-to-program storage elements in non-volatile integrated memory devices is presented. A number of storage elements are simultaneously subjected to a programming process with the current flowing through the storage elements limited to a first level. As a portion of these storage elements reach a prescribed state, they are removed from the set of cells being programmed and the current limit on the elements that continue to be programmed is raised. The current level in these hard-to-program cells can be raised to a second, higher limit or unregulated. According to another aspect, during a program operation the current limit allowed for a cell depends upon the target state to which it is to be programmed.

Systems and methods for optimizing restoration of stored data

Abstract: A system and method is provided for optimizing restoration of stored data. A request for data to be restored to any point in time is received. A current state of the data is determined. One or more data blocks required to modify the data from the current state to the any point in time requested are identified. The data at the any point in time is restored within a storage medium using the identified one or more data blocks.

Universal programmable quantum state discriminator that is optimal for unambiguously distinguishing between unknown states.

Abstract: We construct a device that can unambiguously discriminate between two unknown quantum states. The unknown states are provided as inputs, or programs, for the program registers, and a third system, which is guaranteed to be prepared in one of the states stored in the program registers, is fed into the data register of the device. The device will then, with some probability of success, tell us whether the unknown state in the data register matches the state stored in the first or the second program register. We show that the optimal device, i.e., the one that maximizes the probability of success, is universal. It does not depend on the actual unknown states that we wish to discriminate.

Beyond event handlers: programming wireless sensors with attributed state machines

Abstract: Event-driven programming is a popular paradigm for programming sensor nodes. It is based on the specification of actions (also known as event handlers) which are triggered by the occurrence of events. While this approach is both simple and efficient, it suffers from two important limitations. Firstly, the association of events to actions is static--there is no explicit support for adopting this association depending on the program state. Secondly, a program is split up into many distinct actions without explicit support for sharing information among these. These limitations often lead to issues with code modularity, complexity, and correctness. To tackle these issues we propose OSM, a programming model and language for sensor nodes based on finite state machines. OSM extends the event paradigm with states and transitions, such that the invocation of actions becomes a function of both the event and the program state. For removing the second limitation, OSM introduces state attributes that allow sharing of information among actions. They can be considered local variables of a state with support for automatic memory management. OSM specifications can be compiled into sequential C code that requires only minimal runtime support, resulting in efficient and compact systems.

Method, apparatus, and computer program product for one-step correction of voice interaction

Abstract: A one-step correction mechanism for voice interaction is provided. Correction of a previous state is enabled simultaneously with recognition in a current or subsequent state. An application is decomposed into a set of tasks. Each task is associated with the collection of one piece of information. Each task may be in a different state. At any point during the interaction, while a task/state pair is active, the dialog manager may enable multiple other task/state pairs to be active in latent fashion. The application developer may then use those facilities or resources to the active task/state and the latent task/state pairs depending on contextual condition of the interaction state of the application.

Method for automatically searching for functional defects in a description of a circuit

Abstract: A programmed computer searches for functional defects in a description of a circuit undergoing functional verification in the following manner. The programmed computer simulates the functional behavior of the circuit in response to a test vector, automatically restores the state of the simulation without causing the simulation to pass through a reset state, and then simulates the functional behavior of the circuit in response to another test vector. A predetermined rule can be used to identify test vectors to be simulated, and the predetermined rule can depend upon a measure of functional verification, including the number of times during simulation when a first state transition is performed by a first controller at the same time as a second state transition is performed by a second controller. During simulation of the test vectors, manually generated tests or automatically generated checkers can monitor portions of the circuit for defective behavior.

Simultaneously searching for a plurality of patterns definable by complex expressions, and efficiently generating data for such searching

Abstract: An apparatus, a carrier medium carrying computer readable code to implement a method, and a method for searching for a plurality of patterns definable by complex expressions, and further, for efficiently generating data for such searching. One method includes accepting or determining a plurality of state machines for searching for a plurality of patterns, merging the state machines to form a merged state machine, and storing a data structure describing the merged state machine, including state data on the states of the merged state machine. The method is such that pattern matching logic reading state data and accepting a sequence of inputs can search the input sequence for the plurality of patterns.

Intelligent electronic device with embedded multi-port data packet controller

Abstract: An intelligent electronic device (IED) configured to supervise a process having a state has at least one of a current, voltage or resistive input configured to monitor the state of the process, a binary status input configured to monitor the state of the process, a binary status input configured to receive a digitally encoded serial communication package for monitoring the state of the process, a control output configured to output a signal to control process protection, control, or automation, or a combination thereof, or a control output configured to output a digitally encoded serial communication package to control protection, control, or automation, or a combination thereof. The IED is also configured to facilitate digital communication between at least two compatible devices by directing communication packets from ports connected to an originating compatible device to ports connected to a destination compatible device.

System and method for control state management

Abstract: The present invention enables the scalable control tree state management/optimization, which compares the control's initial state with its current state and saves its state only if it is different from initial state. In addition, it can also reduce the size of the control tree's state by removing a control's state when it's current state is equal to its default state. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures, and the claims.

Information processing apparatus and display control method

Abstract: According to one embodiment, an information processing apparatus comprises video memories each corresponding to each of the display devices, a determination module configured to determine whether an access that satisfies conditions preset with respect to display of the display devices exists in at least one of the video memories, and a changing module configured to change, when the determination module determines that the access that satisfies conditions preset with respect to display of the display devices does not exist in at least one of the video memories, an operation state of a display device corresponding to the at least one of the video memories determined that an access does not exist, from a first operation state to a second operation state having a power consumption lower than a power consumption of the first operation state.

Building energy management system

Abstract: [PROBLEMS] To provide an energy management system for managing energy such as electric power consumed in a building in an optimal state while significantly saving energy. [MEANS FOR SOLVING PROBLEMS] A computer control system (200) for controlling an energy management system performs program control as follows. A current date and time are acquired and a control pattern for the time is obtained from a control program so as to judge whether operation of an air conditioner (186) is to be turned ON or OFF and whether to output an operation instruction or a stop instruction. A control signal is outputted from a digital output device (212) to the air conditioner (186). Thus, the air conditioner (186) temporarily stops operation according to the pattern decided in the program control. The current operation state is displayed on a display device (240) and a remote control device (270).

Circuit protector monitoring assembly kit and method

Abstract: Monitoring assemblies, kits and methods for determining an operational state of a circuit protector in an electrical circuit.

Method, software and apparatus for using application state history information when re-launching applications

Abstract: A system for saving application state history information, containing an historical snap-shot of dynamic application state information associated with execution of a first application on a computing device The application state history information is saved for use in a subsequent re-launch of the first application

Processing information received at an auxiliary computing device

Abstract: Described is a mechanism for receiving new data at an auxiliary device associated with a main computer system, and processing that new data within the auxiliary device firmware to take some action. The receipt and processing of the data is independent of whether the main computer system is in a powered-up state (online) or powered-down state (offline). A cache that maintains the user application data for offline navigation may be updated with new data, either to change existing data in the cache or add a new navigation path. The received data can be processed to perform other actions, depending on the context of that data as determined by auxiliary processing.

An Observationally Complete Program Logic for Imperative Higher-Order Frame Rules

Abstract: We propose a simple compositional program logic for an imperative extension of call-by-value PCF, built on Hoare logic and our preceding work on program logics for pure higher-order functions. A systematic use of names and operations on them allows precise and general description of complex higher-order imperative behaviour. The logic offers a foundation for general treatment of aliasing and local state on its basis, with minimal extensions. After establishing soundness, we prove that valid assertions for programs completely characterise their behaviour up to observational congruence, which is proved using a variant of finite canonical forms. The use of the logic is illustrated through reasoning examples which are hard to assert and infer using existing program logics.