Topic
State (computer science)
About: State (computer science) is a research topic. Over the lifetime, 24436 publications have been published within this topic receiving 225733 citations.
Papers published on a yearly basis
Papers
More filters
Patent•
13 Aug 2009
TL;DR: In this article, a request associated with an application is received and includes at least one operation to be executed by the application as well as a set of first state information, and a response including the relevant information associated with the response is generated and transmitted to the client.
Abstract: This disclosure provides various embodiments for providing transparently stateful execution of stateless applications. A request associated with an application is received and includes at least one operation to be executed by the application as well as a set of first state information. The application determines if the operations are to be executed statelessly or not. If the application is to be executed statelessly, the first state information is retrieved from the request and used to initialize the application. If not, then the first state of the application is retrieved from a location other than the received request. The operations are then executed by the application in the application's appropriate first state. A response including the relevant information associated with the response as well as an updated set of state information identifying the application's second state is generated and transmitted to the client.
64 citations
Patent•
05 Feb 1998
TL;DR: In this paper, a three transistor cell was used for multi-state dynamic memory with different levels of write levels, read levels, reference devices, and sense amplifier design, and two cell enhancements were proposed: substituting a PFET in place of and NFET for the write select transistor, and adding a capacitor for extended refresh times.
Abstract: Methods are disclosed in making a multi-state dynamic memory using a three transistor cell. The cell construction is consistent with a logic semiconductor process and is therefore useful for embedded memory applications. Considerations are given to write levels, read levels, reference devices, and sense amplifier design. Two cell enhancements are proposed: substituting a PFET in place of and NFET for the write select transistor so that improved noise margin can be achieved and adding a capacitor for extended refresh times. Methods are also introduced to reduce select transistor leakage current during the deselected state.
64 citations
Patent•
28 Feb 2006TL;DR: In this article, the authors present a method for identifying available cores of a many-core processor, allocating a first subset of the cores to an enabled state and a second subset to a spare state, and storing information regarding the allocation in a storage.
Abstract: In one embodiment, the present invention includes a method for identifying available cores of a many-core processor, allocating a first subset of the cores to an enabled state and a second subset of the cores to a spare state, and storing information regarding the allocation in a storage. The allocation of cores to the enables state may be based on a temperature-aware algorithm, in certain embodiments. Other embodiments are described and claimed.
64 citations
Patent•
16 Jan 1984TL;DR: In this article, a linear feedback signature register (LFSR) is used for testing an electrical circuit by means of signature analysis, which produces a signature signal at its output representing its current state in dependence upon its prior state and the received response signal.
Abstract: Apparatus is disclosed for testing an electrical circuit by means of signature analysis. Responses to a sequence of test patterns from the circuit under test are supplied to a linear feedback signature register (LFSR) which produces a signature signal at its output representing its current state in dependence upon its prior state and the received response signal. A programmed read-only-memory is addressed by these state signals of the LFSR and produces, at its output, a logical "1" signal if the current signature represents a permissible state of the LFSR and a logical "0" if the state is not permissable. This checking occurs throughout and during the testing sequence in contrast to conventional signature analysis wherein the comparison only occurs at the end of the testing sequence.
64 citations
Patent•
13 Sep 2011TL;DR: In this paper, a computing system is configured to execute a computer program on a server and to provide a video stream of the program output to a geographically remote client over a communication network.
Abstract: A computing system is configured to execute a computer program on a server and to provide a video stream of the program output to a geographically remote client over a communication network. The computing system is further configured to provide executable content of the computer program to the client over the communication network in parallel with the video stream. When a sufficient amount of the executable content has been provided to the client execution of the computer program is transitioned from the server to the client. The transition optionally includes communicating a state of the computer program from the server to the client. The executable content can be provided to the client in an order that is determined based on the state of the computer program. Those parts of the executable content deemed most likely to be necessary to support game play on the client are given priority.
64 citations