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State (computer science)

About: State (computer science) is a research topic. Over the lifetime, 24436 publications have been published within this topic receiving 225733 citations.


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Patent
23 Jan 1989
TL;DR: In this paper, a method and apparatus for storing and retrieving any prior state of a computer system is provided, where the system monitors changes to the state of the host and subsequently stores at least some of these changes on the storage device.
Abstract: A method and apparatus for storing and retrieving any prior state of a computer system is provided. Upon installation of the system, a base image corresponding to the initial state of the computer system is established and stored on a storage device. The system monitors changes to the state of the host and subsequently stores at least some of these changes on the storage device. These changes are then mapped by location of the stored changes in an address table to enable subsequent retrieval of any selected changes. When the address table becomes full, at least one differential image of the state of the system is subsequently created by compiling all changes to the base image which occurred between creation of the base image and the selected time. A virtual image may thus be created of data stored on the storage device, as such data existed at a predetermined prior point in time, from which data and files may be retrieved and written to the host disk.

163 citations

Patent
06 Oct 1995
TL;DR: In this article, a microcontroller (20) provides security for internal instructions and data while allowing instruction fetches to external, off-chip memory connected to an expansion bus (30), and a central processing unit (CPU) provides a load instruction register signal to indicate when an access is an instruction fetch.
Abstract: A microcontroller (20) provides security for internal instructions and data while allowing instruction fetches to external, off-chip memory connected to an expansion bus (30). A central processing unit (CPU) (21) provides a load instruction register signal to indicate when an access is an instruction fetch. When the load instruction register signal is active while the address is within the range of an on-chip nonvolatile memory (25), a security logic circuit (40) is reset to a first state. In this first state, the security logic circuit (40) also allows non-instruction fetches from the nonvolatile memory (25). However when the load instruction register signal is active while the address is not within the range of the nonvolatile memory (25), the security logic circuit (40) is set to a second state. While in this second state, the security logic circuit (40) disables attempted accesses to the nonvolatile memory (25). The security feature is selectively enabled or disabled as determined by a configuration register (23).

163 citations

Proceedings ArticleDOI
11 Jan 2006
TL;DR: This paper specifies, via a Hoare-like logic, an interprocedural and flow sensitive (but termination insensitive) information flow analysis for object-oriented programs that employs independence assertions to describe the noninterference property that formalizes confidentiality, and employs region assertions to describes possible aliasing.
Abstract: This paper specifies, via a Hoare-like logic, an interprocedural and flow sensitive (but termination insensitive) information flow analysis for object-oriented programs. Pointer aliasing is ubiquitous in such programs, and can potentially leak confidential information. Thus the logic employs independence assertions to describe the noninterference property that formalizes confidentiality, and employs region assertions to describe possible aliasing. Programmer assertions, in the style of JML, are also allowed, thereby permitting a more fine-grained specification of information flow policy.The logic supports local reasoning about state in the style of separation logic. Small specifications are used; they mention only the variables and addresses relevant to a command. Specifications are combined using a frame rule. An algorithm for the computation of postconditions is described: under certain assumptions, there exists a strongest postcondition which the algorithm computes.

162 citations

Patent
15 Dec 2008
TL;DR: A resource distribution method capable of lending surplus resources among a plurality of services and reducing the maintenance cost of the surplus resources is provided in this paper, where a load prediction is conducted as regards individual services by using past operation history.
Abstract: A resource distribution method capable of lending surplus resources among a plurality of services and reducing the maintenance cost of the surplus resources is provided. Computer resources in the standby system have a dead standby state in which at least an application is not installed. A plurality of services or a plurality of users share the computer resources in the standby system. As a result, improvement of the utilization factor of idle computer resources and server integration are implemented, and the cost required to maintain the computer resources is reduced. Furthermore, load prediction is conducted as regards individual services by using past operation history. Idle computer resources secured from services having surplus and maintained are thrown in according to a result of the prediction.

160 citations

Journal Article
TL;DR: The On-the-Fly model-checker OFMC as discussed by the authors combines lazy data-types with symbolic techniques for modeling Dolev-Yao intrusions in a demand-driven way.
Abstract: We introduce the on-the-fly model-checker OFMC, a tool that combines two methods for analyzing security protocols. The first is the use of lazy data-types as a simple way of building an efficient on-the-fly model checker for protocols with infinite state spaces. The second is the integration of symbolic techniques for modeling a Dolev-Yao intruder, whose actions are generated in a demand-driven way. We present experiments that demonstrate that our tool is state-of-the-art, both in terms of coverage and performance, and that it scales well to industrial-strength protocols.

160 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20251
202426
202314,059
202232,515
2021467
2020690