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State (computer science)

About: State (computer science) is a research topic. Over the lifetime, 24436 publications have been published within this topic receiving 225733 citations.


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Patent
Gerrit Jan Hemink1
31 Mar 2006
TL;DR: In this article, a program voltage signal implemented as a series of increasing program voltage pulses is applied to a set of non-volatile storage elements and different increment values can be used when programming memory cells to different memory states.
Abstract: A program voltage signal implemented as a series of increasing program voltage pulses is applied to a set of non- volatile storage elements. Different increment values can be used when programming memory cells to different memory states. A smaller increment value can be used when programming memory cells to lower threshold voltage memory states and a larger increment value used when programming memory cells to higher threshold voltage memory states such as the highest memory state in an implementation. When non-volatile storage elements of a set are programmed to different memory states under simultaneous application of a single program voltage signal, programming can be monitored to determine when lower state programming is complete. The increment value can then be increased to complete programming to the highest memory state. Coarse/fine programming methodology can be incorporated for the highest memory state when the increment value is increased to maintain the threshold distribution within a reasonable range.

154 citations

Journal ArticleDOI
TL;DR: In this paper, the authors proposed a source-based rate-adaptation algorithm for real-time, rate-Adaptive, multimedia applications that adjusts their transmission rate to match the available network capacity.
Abstract: State of the art, real-time, rate-adaptive, multimedia applications adjust their transmission rate to match the available network capacity. Unfortunately, this source-based rate-adaptation performs...

154 citations

Patent
12 Apr 1979
TL;DR: In this paper, a double redundant processor including first and second master processors for processing data, control and address signals in a data processing system is described. But the first master processor is in an active state for processing the signals and the second master processor, in a standby state, is in a non-active state.
Abstract: A double redundant processor including first and second master processors for processing data, control and address signals in a data processing system. The first master processor is in an active state for processing the signals and the second master processor is in a standby state for processing the signals. The first and second master processors include first and second subprocessors for simultaneously processing the data, control and address signals, a comparator connected to compare the signals from the first and second subprocessors, thereby generating a comparison error signal if a disagreement exists, and an alarm monitor responsive to the error signal for inactivating the active master processor and activating the standby master processor.

154 citations

Patent
02 Jun 1986
TL;DR: In this paper, a programmable macrocell is used in an integrated circuit device including an electronic circuit that is responsive to control signals and operative to perform particular operations selected by the control signals on input data signals and develop commensurate output signals.
Abstract: A programmable macrocell 28 for use in an integrated circuit device including an electronic circuit 32 responsive to control signals and operative to perform particular operations selected by the control signals on input data signals and to develop commensurate output signals, and one or more architecture control circuits 30 each including a programmable EPROM device 34 which when programmed generates a logic signal of a first state and when unprogrammed generates a logic signal of a second state, a read and write control circuit 36 responsive to input program data signals and a corresponding address signal and operative to program the EPROM device 34 by applying a programming potential thereto, and a sensing circuit 38 for sensing the programmed or unprogrammed status of the EPROM device 34 and for developing a commensurate control signal for input to the electronic circuit 32.

153 citations

Proceedings ArticleDOI
01 Apr 1990
TL;DR: Quartz is described, a new tool for tuning parallel program performance on shared memory multiprocessors that was inspired by that of the sequential UNIX tool gprof and would be used to solve a number of performance problems that have been reported as being frequently encountered.
Abstract: Initial implementations of parallel programs typically yield disappointing performance. Tuning to improve performance is thus a significant part of the parallel programming process. The effort required to tune a parallel program, and the level of performance that eventually is achieved, both depend heavily on the quality of the instrumentation that is available to the programmer.This paper describes Quartz, a new tool for tuning parallel program performance on shared memory multiprocessors. The philosophy underlying Quartz was inspired by that of the sequential UNIX tool gprof: to appropriately direct the attention of the programmer by efficiently measuring just those factors that are most responsible for performance and by relating these metrics to one another and to the structure of the program. This philosophy is even more important in the parallel domain than in the sequential domain, because of the dramatically greater number of possible metrics and the dramatically increased complexity of program structures.The principal metric of Quartz is normalized processor time: the total processor time spent in each section of code divided by the number of other processors that are concurrently busy when that section of code is being executed. Tied to the logical structure of the program, this metric provides a “smoking gun” pointing towards those areas of the program most responsible for poor performance. This information can be acquired efficiently by checkpointing to memory the number of busy processors and the state of each processor, and then statistically sampling these using a dedicated processor.In addition to describing the design rationale, functionality, and implementation of Quartz, the paper examines how Quartz would be used to solve a number of performance problems that have been reported as being frequently encountered, and describes a case study in which Quartz was used to significantly improve the performance of a CAD circuit verifier.

153 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20251
202426
202314,059
202232,515
2021467
2020690