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State (computer science)

About: State (computer science) is a research topic. Over the lifetime, 24436 publications have been published within this topic receiving 225733 citations.


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Patent
09 Mar 2001
TL;DR: In this article, the authors describe a hard disk drive for storing applications and other data in a video game system, and the saved game data may include a descriptive name of the game, a graphic representation of the state of the games when the game was saved, a description of game state when the games were saved, and a date and time that the games was saved.
Abstract: A gaming system includes a hard disk drive for storing applications and other data. The hard disk drive has multiple storage areas for storing different types of data. Each application executed on the gaming system has an associated data storage area and is prevented from using data storage areas associated with other applications. When saving a game, the saved game data may include a descriptive name of the saved game, a graphic representation of the state of the game when the game was saved, a description of the game state when the game was saved, and a date and time that the game was saved.

106 citations

01 Jan 2006
TL;DR: This work formally defines a digital forensic investigation and categories of analysis techniques based on an extended finite state machine (FSM) model that was designed to include support for removable devices and complex states and events.
Abstract: This work formally defines a digital forensic investigation and categories of analysis techniques. The definitions are based on an extended finite state machine (FSM) model that was designed to include support for removable devices and complex states and events. The model is used to define the concept of a computer's history, which contains the primitive and complex states and events that existed and occurred. The goal of a digital investigation into make valid inferences about a computer's history. Unlike the physical world, where an investigator can directly observe objects, the digital world involves many indirect observations. The investigator cannot directly observe the state of a hard disk sector or bytes in memory. He can only directly observe the state of output devices. Therefore, all statements about digital states and events are hypotheses that must be tested to some degree. Using the dynamic FSM model, seven categories and 31 unique classes of digital investigation analysis techniques are defined. The techniques in each category can be used to test and formulate different types of hypotheses and completeness is shown. The classes are defined based on the model design and current practice. Using the categories of analysis techniques and the history model, the process models that investigators use are formally compared. Until now, it was not clear how the phases in the models were different. The model is also used to identify where assumptions are made during an investigation and to show differences between the concepts of digital forensics and the more traditional forensic disciplines.

106 citations

Patent
07 Jun 1995
TL;DR: In this article, a first integrated circuit (IC) has a card system management interrupt (SMI) output pin (CRDSMI#) and interrupt pins (IRQ 3-5 ), and a logic circuit (1620, 1630 ) has an output connected to the card SMI pin.
Abstract: An electronic system ( 100 ) includes a first integrated circuit (IC) ( 112 ) having a card system management interrupt (SMI) output pin (CRDSMI#) and interrupt pins (IRQ 3-5 ), and a logic circuit ( 1620, 1630 ) having an output connected to the card SMI pin. This logic circuit further has inputs connected to a first and second set of registers and logic for first and second cards (CARD A,B) respectively. Each of the first and second sets of registers and logic include a first register (CSC REG) having bits set by at least a card event (CDCHG) and a battery condition event (BWARN) respectively. A logic gate ( 2672 ) responds to combine the bits from the first register. A second register (INT AND GEN CTRL REG) has a bit (SMIEN) for steering the output of the logic gate ( 2672 ) for ordinary interrupt or for system management interrupt purposes depending on the state of the bit (SMIEN). A second integrated circuit ( 110 ) has a system management interrupt (SMI#) output pin and SMI circuitry ( 2370 ) including a SMI register ( 2610 ) connected to events sources eligible for SMI response including the card SMI output of the first integrated circuit. This second IC ( 110 ) further has a mask SMI register ( 2620 ) connected to the SMI register ( 2610 ) to select particular ones of the events sources for SMI response. A logic circuit ( 2634, 2638 ) is fed by the SMI register ( 2610 ) for combining the selected events sources to supply an internal SMI output (SMIOUT). Other circuits, systems and methods are also disclosed.

106 citations

Patent
Frank Wildgrube1, Mark Albrecht1
05 Jan 1998
TL;DR: In this paper, a system and method for protecting a nonvolatile storage element of an electronic system from unauthorized write access is described, which features the operational steps of entering a mode of operation in which an authentication process is performed, placing a security circuit of the electronic system in a first predetermined state of operation, checking the current state of the security circuit, and halting further operations of the e cient if the security circuits exists in a state other than the first predetermined states of operation.
Abstract: A system and method for protecting a non-volatile storage element of an electronic system from an unauthorized write access is described. The method features the operational steps of entering a mode of operation in which an authentication process is performed, placing a security circuit of the electronic system in a first predetermined state of operation before leaving the mode of operation, checking the current state of the security circuit, and halting further operations of the electronic system if the security circuit exists in a state of operation other than the first predetermined state of operation.

106 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20251
202426
202314,059
202232,515
2021467
2020690