scispace - formally typeset
Search or ask a question

Showing papers on "Static induction transistor published in 1971"


Patent
Berger Horst Dipl-Ing1, S Wiedmann1
14 Apr 1971
TL;DR: In this article, a monolithic semiconductor circuit consisting of a lateral PNP transistor and an inversely operated vertical NPN transistor is described, where the collector region is formed by a pair of mutually spaced P-type regions diffused in an N-type semiconductor body.
Abstract: A monolithic semiconductor circuit comprises a lateral PNP transistor and an inversely operated vertical NPN transistor. The lateral transistor is formed by a pair of mutually spaced P-type regions diffused in an N-type semiconductor body. The collector region has diffused therein a region of N-type and constituting the collector of the vertical transistor. The semiconductor body constitutes the base region of the lateral transistor and the emitter region of the vertical transistor.

43 citations


Patent
23 Apr 1971
TL;DR: In this paper, a technique of saturation control for a transistor transistor logic (TTL) circuit which is also applicable to other types of circuits is described. But this technique requires the input transistor to have an extended base region and an additional emitter diffusion which is spaced from the other emitter diffusions.
Abstract: This specification discloses a technique of saturation control for a transistor transistor logic (TTL) circuit which is also applicable to other types of circuits. The saturation control device is a transistor whose emitter is connected to the collector of the output transistor of the TTL circuit, its collector is connected to the base of the output transistor for the TTL circuit and its base is connected through a resistive divider network between the base and collector of the input transistor for the TTL circuit. This saturation control transistor is formed in the same isolation pocket with the input transistor for the TTL circuit by providing the input transistor with an extended base region and an additional emitter diffusion which is spaced from the other emitter diffusions and the collector contact for the input transistor so that the sections of the extended base region between the additional emitter diffusion and the other emitter diffusions and between the additional emitter diffusion and the collector contact form the resistors of the divider network.

21 citations


Patent
30 Apr 1971
TL;DR: In this article, a transistor switching regulator for a power supply including a DC source, a transformer primary, a switching transistor, and a control transistor operated in switching mode connected in series is presented.
Abstract: A transistor switching regulator for a power supply including a DC source, a transformer primary, a switching transistor, and a control transistor operated in switching mode connected in series. The switching transistor and control transistor aRe connected in series relationship. The switching transistor has a DC bias connected to its base so that switching is driven into or near saturation when the control transistor is turned on and driven in its open-emitter cut off condition when the control transistor is cut off. The switceing transistor can accept voltage surges induced at turn-off in the transformer primary up to its collector-base breakdown characteristic (BVcbo).

20 citations


Patent
06 Jul 1971
TL;DR: In this article, two current carrying paths, each connected between a different clock pulse terminal and a common capacitive output node, each path including a field effect transistor in series with a diode, are poled to permit the node to be charged when one transistor is turned on and discharged when the other transistor was turned on.
Abstract: Two current carrying paths, each connected between a different clock pulse terminal and a common capacitive output node, each path including a field-effect transistor in series with a diode. The diodes are poled to permit the node to be charged when one transistor is turned on and discharged when the other transistor is turned on. The clock pulses, during one time interval, cause current to flow through the one of the paths with the turned on transistor, and during the following time interval prevent current flow in either path.

19 citations


Patent
Masuhara T1, Nagata M1, Okabe T1
30 Nov 1971
TL;DR: In this paper, a semiconductor bias circuit is defined, in which at least two inverter circuits are provided, each consisting of a depletion type MOS transistor and an enhancement type mOS transistor, formed on a p-conductivity type semiconductor chip.
Abstract: A semiconductor electronic circuit employs a semiconductor bias circuit, in which at least two inverter circuits are provided, each comprising a depletion type MOS transistor and an enhancement type MOS transistor, which are formed on a p-conductivity type semiconductor chip. The depletion type MOS transistor has its gate and source electrodes short-circuited and serves as a load transistor, while the enhancement type MOS type transistor has its drain electrode connected in series to the source electrode of the depletion type transistor. The input terminal and the output terminal of the first inverter circuit are connected to each other, and the voltage obtained at the output terminal is applied as a bias voltage to the input terminal of the second inverter circuit.

18 citations


Patent
05 Nov 1971
TL;DR: In this paper, two field effect transistors interconnected in such a way that the output voltage produced by the first, which is a function of its voltage threshold, controls the conductivity of the second.
Abstract: Two field-effect transistors interconnected in such a way that the output voltage produced by the first, which is a function of its voltage threshold, controls the conductivity of the second. One transistor may be reverse biased source-to-substrate to maintain its threshold voltage higher than that of the other. A small change in voltage level may be detected by this circuit by causing that change concurrently to reduce the source-to-substrate reverse bias of the first transistor and to reverse bias the source-to-substrate of the second transistor.

14 citations


Patent
Clark Lowell Eugene1
07 Jun 1971
TL;DR: In this paper, a transistor with improved protection against excessive reverse biasing voltages is presented, which is the result of providing a punch-through breakdown mode which is operative to the exclusion of an avalanche breakdown mode.
Abstract: There is disclosed a transistor with improved protection against excessive reverse biasing voltages. The improved protection is the result of providing a punch-through breakdown mode which is operative to the exclusion of an avalanche breakdown mode. In the improved transistor, the punch-through breakdown current is dissipated over a wide area such that little if any structural damage occurs. The provision of a punch-through breakdown to the exclusion of avalanche breakdown is accomplished by reducing the doping concentration in the base of the transistor under the emitter or by decreasing the distance between the collector-base junction and the emitter-base junction. There is further provided means for controlling the beta of the transistor as the distance between the above two junctions and the base doping concentration are reduced to provide for punch-through breakdown. Means are further provided for causing the punch-through breakdown to occur in a region either removed from the active area of the transistor or confined to a small portion of the active area of the transistor so that the punch-through mechanism does not interfere with the normal operation of the transistor. There is therefore separate control over the gain and the breakdown characteristics of the transistor. The punch-through current is made to flow to the emitter of the transistor whereby the punch-through breakdown current is dissipated over the entire emitter.

14 citations


Patent
11 Jan 1971
TL;DR: In this paper, a two-terminal current-limiting or current source arrangement is coupled across a source of voltage which is subject to variations, and a current repeater is connected between the collectors of the first and second transistors and produces positive feedback to the base of the second transistor.
Abstract: A two-terminal current-limiting or current source arrangement is coupled across a source of voltage which is subject to variations. The limiter includes a current determining resistor connected in the base-emitter circuit of a first transistor. A second transistor provides negative feedback between collector and base of the first transistor and also provides a collectoremitter circuit in series with the resistor. A current repeater is connected between the collectors of the first and second transistors and produces positive feedback to the base of the second transistor. The repeater includes a transistor, the collector-emitter circuit of which is connected to the collector of the first transistor. The voltage source is of sufficient magnitude to bias the repeater transistor and second transistor to nonsaturated conduction.

13 citations


Patent
24 Nov 1971
TL;DR: In this article, the authors present a current limited transistor switch that allows switching between a source and a load in response to turn-on and turn-off signals. But they do not specify the switch state.
Abstract: A CURRENT LIMITED TRANSISTOR SWITCH PROVIDING SWITCHING ACTION BETWEEN A SOURCE AND A LOAD IN RESPONSE TO TURN-ON AND TURN-OFF SIGNALS, AND PROVIDING CURRENT THRESHOLD SENSING FOR AUTOMATIC SWITCHING TO THE OFF CONDITION WHEN DESATURATION OCCURS. CHOPPERS, INVERTERS AND CIRCUIT BREAKERS INCORPORATING A CURRENT LIMITED TRANSISTOR SWITCH. D R A W I N G

11 citations


Patent
22 Nov 1971
TL;DR: In this paper, a constant current transistor circuit employs a pair of PNP transistors disposed adjacent to each other on a single monolithic integrated circuit, and a third NPN transistor to provide constant current, the collector of which is connected to the emitter of one of the combined transistor circuits.
Abstract: A constant current transistor circuit employs a pair of PNP transistors disposed adjacent to each other on a single monolithic integrated circuit. Also included are a pair of NPN transistors disposed adjacent to each other on the same monolithic integrated circuit, with respective ones of the PNP transistors and the NPN transistors being connected to each other to form first and second combined transistor circuits. In each of the combined transistor circuits, the emitter of the PNP transistor is connected to the collector of the NPN transistor, while the collector of the PNP transistor is connected to the base of the NPN transistor, the respective bases of each PNP transistor also being connected directly to each other. Also provided is a third NPN transistor to provide constant current, the collector of which is connected to the emitter of the NPN transistor of one of the combined transistor circuits, while a diode is connected between the connected bases of the PNP transistors of the two combined transistor circuits and the collector of the third NPN transistor, while a DC power source is connected in series with a load and is provided across the third NPN transistor and said combined transistor circuits.

11 citations


Patent
26 Mar 1971
TL;DR: In this article, the transistors are interconnected with certain impedances and diodes with switching elements such that voltages and currents applied to the transistor are detected and utilized to sense when a condition exists which would injure the transistor.
Abstract: A protective circuit for protecting transistor amplifiers in which the transistors are interconnected with certain impedances and diodes with switching elements such that voltages and currents applied to the transistor are detected and utilized to sense when a condition exists which would injure the transistor. Bridge circuits and diodes are interconnected with the transistor to be protected and in certain embodiments a switching transistor is used with the bridge circuit and diode to protect the transistor.

Patent
02 Sep 1971
TL;DR: In this paper, a pair of seriesconnected thermistors are placed in close thermal relationship with a circuit element which rapidly attains its normal operating temperature, while a second thermistor is located in the general environment of the transistor and associated circuitry such that its temperature is substantially tracked the temperature of the output transistor.
Abstract: Temperature compensation means including a pair of seriesconnected thermisters which provide an offset voltage for an output transistor. A first thermistor is placed in close thermal relationship with a circuit element which rapidly attains its normal operating temperature, while a second thermistor is located in the general environment of the transistor and associated circuitry such that its temperature is substantially tracks the temperature of the transistor. The combined characteristics of the two thermistors so disposed produce a voltage-temperature characteristic which substantially parallels that of the voltage drop across a junction of the output transistor.

Patent
14 Sep 1971
TL;DR: In this article, a vehicle carried storage battery charging device has been provided which supplies D.C. electrical power through a rectifier circuit from an A.C generator, and a voltage regulator including a voltage detecting circuit controls the setting time of the generator in response to a voltage detector.
Abstract: A vehicle carried storage battery charging device has been provided which supplies D.C. electrical power through a rectifier circuit from an A.C. generator. A voltage regulator including a voltage detecting circuit controls the setting time of the generator in response to a voltage detecting circuit. A pilot lamp circuit receives a supply of current and is controlled by a first transistor which is in turn gated by a second transistor governed by the output of the generator. A second voltage detector circuit responsive to the battery voltage supplies the base current to the first transistor when the battery voltage exceeds a certain amount and a diode coupled between the first transistor and the lamp circuit supplies base current to the first transistor when the power source is disconnected from the battery, said base current through the first transistor causing same to become conductive to therby light up the pilot lamp circuit so as to indicate a malfunction.

Patent
16 Feb 1971
TL;DR: In this article, a load circuit is coupled to the emitter of a voltage follower transistor and operating potential is supplied to the collector of the follower transistor via the base-emitter circuit of a second transistor arranged in a common emitter transistor.
Abstract: Semiconductor voltage follower arrangements adapted for construction in integrated circuit form. A load circuit is coupled to the emitter of a voltage follower transistor. Operating potential is supplied to the collector of the follower transistor via the base-emitter circuit of a second transistor arranged in a common emitter transistor. The collector-emitter circuit of a regulator transistor is coupled across the load circuit. Feedback is provided from the output of the common emitter transistor to the input of the regulator transistor such that the collector current of the follower transistor is substantially independent of input voltage variations applied to the base of the follower transistor.

Patent
26 Oct 1971
TL;DR: In this paper, a current limiting circuit for controlling the flow of current in which a primary current conducting path includes the emittercollector circuit of a power transistor was proposed, where a driver transistor provided base current to the power transistor, thereby controlling the magnitude of current flow through the power transistors.
Abstract: A current limiting circuit for controlling the flow of current in which a primary current conducting path includes the emittercollector circuit of a power transistor. A driver transistor provides base current to the power transistor, thereby controlling the magnitude of current flow through the power transistor. A constant current is applied to the base electrode of the driver transistor. Shunt means are provided which are responsive to the magnitude of current flowing in the power transistor for shunting a portion of the constant current away from the base electrode of the driver transistor whenever the magnitude of the current in the power transistor exceeds a predetermined value, thereby diminishing the output current from the driver transistor and thus the base current in the power transistor.

Journal ArticleDOI
T.L. Chiu1, H.N. Ghosh1
TL;DR: In this paper, a two-section model of a junction-gate field effect transistor with short channel length was derived, where the current conducting channel was divided into a source and a drain section.
Abstract: A two-section model of a junction-gate field effect transistor with short channel length was derived. In this model, the current conducting channel is divided into a source and a drain section. The gradual channel approximation with a modification to include the hot electron effect is assumed applicable in the source section. The velocity saturation transport with excess carrier accumulation effect is formulated for the drain section. The normalized design curves and the characteristics of two sample devices are presented.

Patent
Jack H. Beard1
15 Jul 1971
TL;DR: In this paper, a transistor having terminal characteristics dependent on the magnetic field incident on the transistor is used in a current sensing arrangement to measure the level of current in a conductor; a differential output voltage is provided by the transistor proportionate to the magnetic force created by the current in the conductor.
Abstract: A transistor having terminal characteristics dependent on the magnetic field incident on the transistor is used in a current sensing arrangement to measure the level of current in a conductor. A differential output voltage is provided by the transistor proportionate to the magnetic field created by the current in the conductor. Calibration of the current sensor is effected by intensifying or shunting the magnetic field to permit measurement of low and high current levels respectively. The field incident on the transistor is intensified by use of magnetic material to direct the magnetic flux on the transistor to sense low current levels. High current levels are sensed by shunting the magnetic field in a calibrated fashion such that the field impinging on the transistor is maintained within the operational limits of the device; magnetic material is interposed between the transistor and the conductor to afford the requisite shunt path.

Patent
Bretagne Yves De1
29 Jul 1971
TL;DR: In this paper, a field effect transistor impedance coupling circuit with two series connected field effect transistors is presented, where the source of the first transistor is connected to the drain of the second transistor through a resistor.
Abstract: A field effect transistor impedance coupling circuit having two series connected field effect transistors. The source of the first transistor is connected to the drain of the second transistor through a resistor. The gate of the first transistor is the input. The drain of the second transistor is the output. The second transistor is connected as a constant current source, and the resistance value of the resistor is selected so that the output voltage equals the input voltage.

Patent
30 Dec 1971
TL;DR: In this paper, a threshold value switch is defined for the time-delayed delivery of a voltage pulse to an electric fuse element in an electric timing circuit, where the fuse element is connected in series with the source voltage capacitor and the drain-source path of the second transistor.
Abstract: An electric timing circuit, for the time-delayed delivery of a voltage pulse to an electric fuse element, has a voltage source, preferably designed as a capacitor which can be charged from an external source of electric potential. The capacitor discharges across a resistance and a threshold value switch connects the fuse element with the voltage source when the source voltage falls below a preset value. The threshold value switch is constituted by a first field effect transistor having its drainsource path in the electric timing circuit and a second field effect transistor having its drain-source path connected in parallel with that of the first transistor, and having an insulated grid electrode. The drain electrode of each transistor is connected to the grid electrode of the other transistor. The fuse element, in one embodiment of the invention, is in series with a thyristor whose gating circuit is connected to a resistor connected in the drain-source path of the second transistor. In a second embodiment of the circuit, the fuse element is connected in series with the source voltage capacitor and the drain-source path of the second transistor.

Patent
Thomas G. Harrigan1
30 Mar 1971
TL;DR: In this paper, the pass transistor of a series regulator supplies current at a regulated voltage only slightly below its unregulated supply voltage, and the driver transistor, driven by the feedback loop, is supplied from a higher voltage source.
Abstract: The pass transistor of this series regulator supplies current at a regulated voltage only slightly below its unregulated supply voltage. The driver transistor, driven by the feedback loop, is supplied from a higher voltage source. During periods when the pass transistor cannot supply the load because its source voltage is too low, the driver transistor supplies the load through the base-emitter junction of the pass transistor without affecting the regulation.

Patent
09 Feb 1971
TL;DR: In this article, a light sensitive amplifier circuit for detecting light comprising a source follower field effect transistor having at least one resistor connected to its gate as well as between its source and ground, a second transistor whose base is connected to the field effect transistors, and whose collector was connected to a power source through a resistor, a constant voltage supply element connected between emitter of the second transistor and ground.
Abstract: A light sensitive amplifier circuit arrangement for detecting light comprising a source follower field effect transistor having at least one resistor connected to its gate as well as between its source and ground; a second transistor whose base is connected to the field effect transistor, and whose collector is connected to a power source through a resistor; a constant voltage supply element connected between emitter of the second transistor and ground; a photocell connected in a negative feedback loop disposed between the gate of the field effect transistor and the output side of the second transistor; and a load connected to the output side of the second transistor and which driven in response to the variation of the resistance of the photocell due to the intensity of incident light. Further included is a negative feedback transmitting element from the output side of the second transistor to the grounded point of the resistor included in the source circuit of said field effect transistor. The resistor placed between the source of said field effect transistor and the grounded point may be a variable or semifixed type, there may be connected in parallel with the variable resistor a circuit including a first resistor, a heat sensitive resistor element and a second resistor all connected in series, the junction of the first resistor and the heat sensitive resistor element or second resistor is connected to the base of the second transistor. Still further, an additional resistor may be connected between the power source and either or both of the gate of said field effect transistor and the base of the second transistor.

Patent
17 May 1971
TL;DR: In this paper, a signal generating circuit including a constant current source comprising cascoded field effect transistors is presented, where the first transistor is biased into saturation and the second transistor is bias in the linear resistive region of operation.
Abstract: A signal generating circuit including a constant current source comprising cascoded field effect transistors. The first transistor is biased into saturation and the second transistor is biased in the linear resistive region of operation. Degenerative feedback is provided between the output of the first transistor and the control electrode of the second transistor. When an energy storage device and a switch are added, the circuit provides a constant amplitude ramp waveform.

Patent
D Linder1
28 Jan 1971
TL;DR: In this article, a self-compensated low voltage amplifier is provided having first, second and third transistors direct current coupled together, and a diode is coupled from the emitter of the third transistor to the base of the second transistors and is reverse biased by the bias voltages at the electrodes.
Abstract: A self-compensated low voltage amplifier is provided having first, second and third transistors direct current coupled together. The first and third transistors are of a first conductivity type and the second transistor is of an opposite conductivity type. A source of supply voltage is coupled to the transistors causing them to develop operative bias voltages at the electrodes. A diode is coupled from the emitter of the third transistor to the base of the second transistors and is reverse biased by the bias voltages at the electrodes to provide a capacitive reactance between the third transistor emitter electrode and the second transistor base electrode. This capacitive reactance acts to provide a negative feedback path to the second transistor to stabilize the amplifier and prevent oscillation.

Patent
01 Sep 1971
TL;DR: In this paper, a power supply regulator employing a current limiter transistor circuit coupled to the output of the series transistor and a constant current supply comprising a transistor and Zener diode was presented.
Abstract: A power supply regulator of the series transistor type employing a current limiter transistor circuit coupled to the output of the series transistor and a constant current supply comprising a transistor and Zener diode for supplying current to the current limiter transistor circuit, and a voltage multiplier circuit coupled to the rectifier circuit input of the regulator circuit, said constant current supply being coupled to said voltage multiplier circuit.

Patent
E Ichinohe, Y Endo, T Katano, N Kubo, K Nakamura 
16 Sep 1971
TL;DR: In this article, a transistor detecting circuit provided with a detecting sensitivity compensation transistor circuit having a compensation transistor and a resistance circuit connected between the base and collector of the compensation transistor, was described.
Abstract: A transistor detecting circuit provided with a detecting sensitivity compensation transistor circuit having a compensation transistor and a resistance circuit connected between the base and collector of the compensation transistor, said compensation transistor circuit being provided in the input circuit leading to a detecting transistor.

Patent
James R Winnard1
23 Apr 1971
TL;DR: In this paper, a technique of saturation control for transistor transistor transistor logic (TTL) circuits is described, which includes an additional emitter of the input transistor which is connected to the collector of the output transistor.
Abstract: This specification discloses a technique of saturation control for a transistor transistor logic (TTL) circuit. The saturation control device includes an additional emitter of the input transistor which is connected to the collector of the output transistor.

Patent
A Frei1, P Vettiger1
21 Jun 1971
TL;DR: In this article, a field effect transistor is inserted in the series feedback path of a bipolar transistor at whose base terminal the analog input signal to be sampled is applied, and the bipolar transistor is continuously maintained in its conductive state by drawing a current I0 from the emitter.
Abstract: A field-effect transistor is inserted in the series feedback path of a bipolar transistor at whose base terminal the analog input signal to be sampled is applied. The bipolar transistor is continuously maintained in its conductive state by drawing a current I0 from the emitter. The field-effect transistor is switched back and forth between its high and low impedance states by a sampling signal applied to its gate. The analog input signal is amplified, and therefore sampled, only when the field-effect transistor is in its low impedance state. An N-channel sampler-multiplexer is obtained by seriesconnecting a number of the above-described switches in a chain, with the gate electrodes of the field-effect transistors of all of the stages being connected to a common sampling line, and with the collector electrodes of all of the bipolar transistors of all of the stages delivering their sampled output signals into a common output line. To clearly separate the individual output signals, delay sections are inserted in the output line between neighboring stages.

Patent
19 Apr 1971
TL;DR: In this article, a proximity sensitive on-off transistor oscillator becomes operative with the approach of a human body towards its detection plate, and includes back-coupled oscillation coils, an oscillating transistor, a negative feedback controlling capacitor connected between the collector and base of the transistor and a lead wire shielded by a shielding wire and connected between oscillator and the detection plate.
Abstract: A proximity sensitive on-off transistor oscillator becomes operative with the approach of a human body towards its detection plate, and includes back-coupled oscillation coils, an oscillating transistor, a negative feedback controlling capacitor connected between the collector and base of the transistor and a lead wire shielded by a shielding wire and connected between the oscillator and the detection plate.

Patent
08 Sep 1971
TL;DR: In this article, a variable resistor device using a field effect transistor and a variable control D.C. voltage source is described, where two resistors having an equal value of resistance are connected in series between the source and drain of the FET.
Abstract: A variable resistor device using a field effect transistor wherein two resistors having an equal value of resistance are connected in series between the source and drain of the field effect transistor and a variable control D.C. voltage source is connected between the gate and the connection point of the two resistors to vary the resistance across the source and drain with an improved linearity. The variable resistor device is preferably adapted to be connected to an amplifier to control its gain with little distortion of A.C. signals.

Patent
22 Jun 1971
TL;DR: In this article, a single control transistor is utilized to control the starting and stopping of an operational amplifier-able multivibrator having a timing capacitor which is charged between positive and negative voltages by the output of the amplifier.
Abstract: A single control transistor is utilized to control the starting and stopping of an operational amplifier astable multivibrator having a timing capacitor which is charged between positive and negative voltages by the output of the amplifier. The transistor is connected between the capacitor and the output of the amplifier and normally is nonconductive. Upon application of a forward bias potential to the base of the transistor, the capacitor rapidly charges to the amplifier output voltage, provided the collector-emitter junction of the transistor is forward-biased at the time the bias potential is applied. If the collector of the transistor is reverse-biased by the capacitor charge and the amplifier output voltage at the time the bias potential is applied to the base of the transistor, the capacitor is charged through the base-collector junction of the transistor to a value sufficient to cause the multivibrator to switch states, after which the capacitor discharges toward the amplifier output voltage through the collector of the transistor in the normal manner.