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Showing papers on "Static induction transistor published in 1975"


Journal ArticleDOI
TL;DR: In this paper, an MOS transistor with 10−nm silicon dioxide as gate insulator and 10 −nm palladium as gate electrode was fabricated and the threshold voltage of this transistor was found to be a function of the partial pressure of hydrogen in the ambient atmosphere.
Abstract: An MOS transistor in silicon with 10−nm silicon dioxide as gate insulator and 10−nm palladium as gate electrode was fabricated. The threshold voltage of this transistor was found to be a function of the partial pressure of hydrogen in the ambient atmosphere. At a device temperature of 150 °C it was possible to detect 40 ppm hydrogen gas in air with response times less than 2 min.

707 citations


Journal ArticleDOI
TL;DR: The Static Induction Transistor (SIT) as discussed by the authors is a transistor similar to that of the vacuum tube triode type that exhibits the nonsaturated build-up character only when the internal negative feedback action is as little as G{m'} \simeq G_{m}.
Abstract: The reason why the usual FET shows the saturated characteristics has been shown that with increasing drain voltage, the effect of the negative feedback action, increases through a marked increase of the Series channel resistance in the neighborhood of the pinch-off voltage, under which condition the apparent transfercon-ductance G_{m'}= G_{m}/(1 + r_{s}.G_{m}) becomes G_{m'} \simeq r_{s}^{-1} . It is also pointed out that a transistor in analogy to the vacuum type proposed by Watanabe and Nishizawa in 1950, exhibits the nonsaturated build-up character only When the internal negative feedback action is as little as G_{m'} \simeq G_{m} . In this case, when the channel has not yet pinched off, the characteristics are ohmic and then the transistor can operate as a good variable resistor; on the other hand, when the channel has already pinched, the transistor shows the build-up characteristics similar to those of a vacuum tube triode as a result of the static induction from the drain. The transistor similar to that of the vacuum tube triode type is named "Static Induction Transistor," because its output character is based on the static induction as well as input characteristics. The SIT has the exponential characteristics in contrast with the "Analog Transistor" which is expected by Shockley to follow the space-charge conduction law. The SIT has already been ascertained to have low noise, low distortion, and high-power capability, and its fabrication has been already realized in the form of a high-power transistor (2 kW, 8 MHz), a high-frequency transistor (a few watts, UHF), and a high-speed thyristor. Microwave transistors and very high-speed integrated circuits are being constructed, as well as variable resistors.

412 citations


Patent
04 Sep 1975
TL;DR: An MOS transistor constructed using silicon on sapphire technology in which the channel region can be electrically connected either to the source or drain terminal is disclosed as mentioned in this paper, which is advantageous in that the shift of the threshold voltage of the transistor in the presence of radiation is substantially decreased.
Abstract: An MOS transistor constructed using silicon on sapphire technology in which the channel region can be electrically connected either to the source or drain terminal is disclosed. The transistor is advantageous in that the shift of the threshold voltage of the transistor in the presence of radiation is substantially decreased. Connecting the channel region of the transistor to the source terminal also substantially reduces what is normally referred to as the "kink" effect in MOS transistors utilizing floating substrate channel regions. Reducing the sensitivity to radiation and the kink effect results in a transistor having improved electrical characteristics.

68 citations


Journal ArticleDOI
TL;DR: In this article, a two-dimensional numerical analysis for the turnoff of a bipolar transistor from high injection level (V BE = 900 mV) is carried out, where V BC is kept constant at 1 V. Distributions of potential, electron, and hole density are interpreted and lead to a subdivision of the total transient time into four time regions, each governed by a single phenomenon.
Abstract: A two-dimensional numerical analysis for the turnoff of a bipolar transistor from high injection level (V BE = 900 mV) is carried out. V BC is being kept constant at 1 V. Distributions of potential, electron, and hole density are interpreted and lead to a subdivision of the total transient time into four time regions, each governed by a single phenomenon. These phenomena are 1) fast discharge of the sidewall transistor, 2) the "lateral wave" which has the dominating influence in the total switching time, 3) the vertical discharge, and 4) the emitter discharge. The transient behavior is essentially ruled by two-dimensional lateral effects. Hence one-dimensional models are not adequate for switching a transistor out of saturation.

49 citations


Patent
Robert B. Davies1
08 Dec 1975
TL;DR: The disclosed protection circuit as discussed by the authors is suitable for providing protection of transistors included in integrated circuits such as regulators and power amplifiers, including thermal shutdown, safe area and current control circuits.
Abstract: The disclosed protection circuit which is suitable for providing protection of transistors included in integrated circuits such as regulators and power amplifiers, includes thermal shutdown, safe area and current control circuits. The current control portion includes a sense transistor connected substantially in parallel with the transistor to be protected. In monolithic integrated circuit applications, the sense transistor has an emitter area that is a predetermined ratio of the emitter area of the protected transistor. A "sense resistor" is connected to the sense transistor and develops a control signal which is proportional to the instantaneous current being conducted by the protected transistor. A threshold circuit is coupled between the sense resistor and the drive circuit for the protected transistor and responds to the magnitude of the control signal crossing a predetermined threshold to remove or reduce the drive to the protected transistor.

48 citations


Patent
Blum Rudolf Dipl Ing1
09 Oct 1975
TL;DR: In this article, a blocking oscillator circuit including a transformer and a switching transistor in series with the primary is connected across the input terminals, one secondary of the transformer charging a capacitor, another secondary charging an auxiliary capacitor, the output voltage of which is connected to a control transistor to interrupt operation of the switching transistor when the voltage applied to the control transistor control electrode exceeds a reference value established, for example, by a Zener diode.
Abstract: To provide output power, for example for automotive test equipment from input sources having widely varying input voltages, for example between 45 and 32 V, without range switches, or setting potentiometers, a blocking oscillator circuit including a transformer and a switching transistor in series with the primary are connected across the input terminals, one secondary of the transformer charging a capacitor, another secondary of the transformer charging an auxiliary capacitor, the output voltage of which is connected to a control transistor to interrupt operation of the blocking oscillator formed by the transformer primary and the transistor when the voltage applied to the control transistor control electrode exceeds a reference value established, for example, by a Zener diode; a sensing resistor is connected in series with the main switching transistor, across which an output voltage is taken which is in turn applied to the control electrode of the control transistor to interrupt blocking oscillator operation of the main transistor when the current through the sensing resistor exceeds a predetermined value

28 citations


Patent
10 Feb 1975
TL;DR: In this paper, the authors proposed a method to cancel the electrical charge transferred to a circuit node by the switching ON or OFF of a field effect transistor whose source or drain is connected to that node by connecting the source and drain of another FET to that circuit node and applying to its gate terminal a complement of the switching signal applied to the gate electrode of the first FET.
Abstract: According to the invention, the electrical charge which is transferred to a circuit node by the switching ON or OFF of a field effect transistor whose source or drain is connected to that node is cancelled by connecting the source and drain of another field effect transistor to that circuit node and applying to its gate terminal a complement of the switching signal applied to the gate electrode of the first field effect transistor.

23 citations


Patent
16 Jun 1975
TL;DR: In this article, an enhancement mode insulated gate field effect transistor interacting with an integral bipolar transistor was proposed. But the collector of the bipolar transistor is connected to the gate of the FET, and a resistor of finite value is included in the gate circuit.
Abstract: Transistor device exhibiting negative resistance characteristics includes an enhancement mode insulated gate field effect transistor interacting with an integral bipolar transistor. The transistor device has a bulk region separated from a shallow substrate region by a pn-junction located in proximity to source and drain regions of the field effect transistor. The source region also serves as the emitter, the substrate region serves as the base, and the bulk region serves as the collector of the integral bipolar transistor wherein the substrate base is left floating. Normally, the collector of the bipolar transistor is connected to the gate of the field effect transistor, and a resistor of finite value is included in the gate circuit. Oscillator, astable multivibrator, gated oscillator, gated astable multivibrator, and bistable multivibrator circuits are illustratively constructed with the transistor device.

19 citations


Patent
14 Aug 1975
TL;DR: A compound transistor circuitry having an output characteristic resembling that of a pentode vacuum tube comprises: a first field effect transistor having a saturated-type output characteristic similar to that of an inverted pentode, and a second field effect transistors having an unsaturated type output characteristic like that of triode vacuum tubes as discussed by the authors.
Abstract: A compound transistor circuitry having an output characteristic resembling that of a pentode vacuum tube comprises: a first field effect transistor having a saturated-type output characteristic resembling that of a pentode vacuum tube; and a second field effect transistor having an unsaturated-type output characteristic resembling that of a triode vacuum tube. The first and second field effect transistors have a conducting channel of a single and same conductivity type, respectively. The second field effect transistor is connected in series with the drain current path of the first field effect transistor. This second field effect transistor is rendered conductive only when the drain-source voltage of the first field effect transistor exceeds its pinch-off voltage.

19 citations


Patent
John R Cielo1, John Andrew Orfitelli1
31 Oct 1975
TL;DR: In this article, a surge diverting path including a diode poled opposite to the transistor is provided in parallel with the transistor, the diode being in forward conduction at the beginning of turnoff of the transistor and becoming back-biased as the transistor turns off, the reverse conductivity of the device during its recovery serving as a temporary path diverting some of the power dissipation at turnoff away from the transistor.
Abstract: A power translating circuit of the general kind utilized in transformer coupled transistor switching regulators has a source of DC, the primary of a transformer and a switching transistor in series. To protect the transistor from excessive power dissipation during its turnoff transition, a surge diverting path including a diode poled oppositely to the transistor is provided in parallel with the transistor, the diode being in forward conduction at the beginning of turnoff of the transistor and becoming back-biased as the transistor turns off, the reverse conductivity of the diode during its recovery serving as a temporary path diverting some of the power dissipation at turnoff away from the transistor.

18 citations


Patent
Sadaaki Takagi1
03 Mar 1975
TL;DR: In this paper, an insulated gate field effect transistor (hereinafter referred to as IGFET) of metal-insulating film-semiconductor construction in which a predetermined amount of impurity is introduced into the insulating film to produce immobile charges to control the carrier concentration in the surface of the semiconductor and alter the conductivity type was presented.
Abstract: A method of manufacturing an insulated gate field effect transistor (hereinafter referred to as IGFET) of metal-insulating film-semiconductor construction in which a predetermined amount of impurity is introduced into the insulating film to produce immobile charges to thereby control the carrier concentration in the surface of the semiconductor and alter the conductivity type. A method developed from the above one for making an IGFET in which a transistor of depletion mode is coupled as a load with a transistor of enhancement mode.

Patent
29 May 1975
TL;DR: In this article, a transformer-coupled transistor base drive circuit is described, where the transformer primary control circuit includes a switching transistor, a bias supply, and a RC biasing network arrangement to ensure that the transformer core will never enter the positive saturation region of its hysteresis characteristic.
Abstract: A transformer-coupled transistor base drive circuit is disclosed wherein the transformer primary control circuit includes a switching transistor, a bias supply, and a RC biasing network arrangement. The biasing arrangement is designed to ensure that the transformer core will never enter the positive saturation region of its hysteresis characteristic; regardless of variations in the power transistor duty cycle. The base drive circuit also features provision of high sweep-out current in the power transistor base during turn-off, reverse base-emitter voltage during the power transistor off state, and regenerative current drive to minimize storage time and to control the bias power drain.

Patent
02 Jan 1975
TL;DR: In this paper, an integrated circuit for the selective completion and interruption of a signal path comprises three transistors of the MOSFET type, i.e., a switching transistor in tandem with a decoupling transistor and a pilot transistor in cascade with the switching transistor.
Abstract: An integrated circuit for the selective completion and interruption of a signal path comprises three transistors of the MOSFET type, i.e., a switching transistor in tandem with a decoupling transistor and a pilot transistor in cascade with the switching transistor. The channels of the switching and decoupling transistors lie in series between supply terminals of opposite potential, together with a load resistor. The channel of the pilot transistor is connected across the same supply terminals by way of a biasing resistor tied to the gate of the switching transistor. On/off voltages are applied to the gate of the pilot transistor while incoming signals are fed to the gate of the decoupling transistor.

Patent
17 Mar 1975
TL;DR: In this article, a source of direct current has its opposite polarity terminals connected to an electrical load via a transistor functioning as a chopper, which performs the desired "chopping" or current interrupting function to permit the delivery of substantially constant DC power from the DC source to the load.
Abstract: A source of direct current has its opposite polarity terminals connected to an electrical load via a transistor functioning as a chopper. A reactor is provided which comprises a primary winding also connected between the DC source and the load, a secondary winding adapted to apply a biasing voltage across the base and emitter of the transistor, and a tertiary winding constituting a part of the energy release circuit through which the energy stored in the reactor during each conducting period of the transistor is released. A base control circuit in the form of, for instance, a voltage regulating diode is connected to the base of the transistor. The transistor performs the desired "chopping" or current interrupting function to permit the delivery of substantially constant DC power from the DC source to the load.

Patent
15 Dec 1975
TL;DR: In this article, a system for energizing the load from a voltage source is provided, where a power transistor and regenerative feedback means coupled between a collector and base of the power transistor for only feeding back to the base a signal responsive to an increasing potential sensed at the collector to reduce the time necessary to turn off the transistor.
Abstract: In a system for energizing the load from a voltage source there is provided a power transistor and regenerative feedback means coupled between a collector and base of the power transistor for only feeding back to the base a signal responsive to an increasing potential sensed at the collector to reduce the time necessary to turn off the power transistor.

Patent
19 May 1975
TL;DR: In this article, the collector current to the output transistor tends to exceed a predetermined value, and the sensing transistor is turned on to reduce the base current being supplied from a current source to the base of an output transistor to reduce this collector current.
Abstract: A sensing transistor has its base and emitter electrodes connected across a sensing resistor connected in series with the collector electrode of an output transistor. Whenever the collector current to the output transistor tends to exceed a predetermined value, the sensing transistor is turned on to reduce the base current being supplied from a current source to the base of the output transistor to thereby reduce this collector current to less than this value. This reduction is accomplished by diverting the excess portion of the source current through the collector-emitter current path of the sensing transistor, into the collector electrode of the output transistor.

Patent
Masayoshi Yoshimura1
05 Nov 1975
TL;DR: In this paper, a transistor circuit which comprises a first transistor of the N-P-N type, a second transistor of P-N-P type, and a third transistor of N-p-n type is considered, where a collector of the first transistor and a base of the second transistor are connected with each other.
Abstract: A transistor circuit which comprises a first transistor of the N-P-N type, a second transistor of the P-N-P type and a third transistor of the N-P-N type, and in which a base of the first transistor, an emitter of the second transistor and a collector of the third transistor are electrically connected with one another, while a collector of the first transistor and a base of the second transistor are electrically connected with each other, whereby the first transistor is prevented from being driven into an extremely deep saturation region.

Patent
20 Nov 1975
TL;DR: In this article, a miniature DC motor is connected to a DC source through a PNP type driving transistor, and the back electromotive force of the motor which is proportional to the speed is applied to the base electrode of an NPN type control transistor through a variable resistor and the output of the control transistor is applied on the base of the driving transistor through an nPN type amplifier transistor.
Abstract: A miniature DC motor is connected to a DC source through a PNP type driving transistor. The back electromotive force of the motor which is proportional to the speed is applied to the base electrode of an NPN type control transistor through a variable resistor and the output of the control transistor is applied to the base electrode of the driving transistor through an NPN type amplifier transistor. A capacitor is connected between the base and emitter electrodes of the control transistor for smoothing the voltage applied to the base electrode of the control transistor. The sensitivity of the speed control system can be improved by connecting a Zener diode in the input circuit to the control transistor. Further the effect of the variation in the ambient temperature can be compensated for by using a thermister.

Journal ArticleDOI
TL;DR: In this paper, the first-order representation of an enhancement-mode MOS transistor operating with forward source-substrate bias (hybrid-mode operation) was presented as a parallel combination of two non-interacting devices.
Abstract: For specified bias conditions, measurements and theory justify the first-order representation of an enhancement-mode MOS transistor operating with forward source-substrate bias (‘hybrid-mode’ operation) as a parallel combination of two non-interacting devices—an MOS transistor with zero source-substrate bias, and a bipolar junction transistor.

Patent
07 Nov 1975
TL;DR: In this article, the complementary metal-oxide-semiconductor technology is used to produce an integrated circuit with a negative resistance characteristic under voltage application to a given circuit region, where the source-drain path of the second transistor becomes conductive.
Abstract: The complementary metal-oxide-semiconductor technology is used to produce an integrated circuit with a negative resistance characteristic under voltage application to a given circuit region. A metal-oxide-semiconductor transistor of a first channel type has its gate connected to the switching nodes and its source-drain path in series with a load to operating voltage source. A second such transistor of opposite channel type has its source-drain path connecting the switching node to the operating voltage source terminal, coupled to the load. This second transistor gate is connected to the junction point of the load and the first transistor. Thus the application of a voltage to a given region at the switching node the source-drain path of the second transistor becomes conductive.

Patent
08 Dec 1975
TL;DR: In this paper, a transistor amplifier including a bipolar transistor supplied with an input signal and a field effect transistor which is directly connected to an output electrode of the bipolar transistor to amplify a signal applied thereto is described.
Abstract: A transistor amplifier including a bipolar transistor supplied with an input signal and a field effect transistor which is directly connected to an output electrode of the bipolar transistor to amplify a signal applied thereto. The transistor amplifier has a protective circuit which senses the load impedance and actuates a protective means across an input terminal of the transistor amplifier when the sensed load impedance is lower than a predetermined value. Accordingly, the transistor amplifier is protected against overload conditions.

Patent
16 Dec 1975
TL;DR: In this paper, a negative resistance network consisting of a first predetermined channel insulated gate enhancement type field effect transistor having a drain-source path connected to positive and negative input terminals on which a predetermined input voltage is impressed.
Abstract: This negative resistance network includes a first predetermined channel insulated gate enhancement type field effect transistor having a drain-source path connected to positive and negative input terminals on which a predetermined input voltage is impressed. The gate potential of the first field effect transistor is controlled by a second insulated gate enhancement type field effect transistor having an opposite channel type to the first field effect transistor, a gate connected to the drain thereof which is connected to the predetermined one of the positive and negative input terminals and a source connected to one pole of a dc power supply having a predetermined voltage, and by a third insulated gate enhancement type field effect transistor having the same channel type as the first field effect transistor, a drain and a gate connected to the drain of the second field effect transistor as well as to the gate of the first field effect transistor and a source connected to the source thereof which is connected to the other input terminal as well as to the other pole of the dc power supply, whereby the first field effect transistor shows a negative resistance characteristic attaining a relatively low current consumption over a relatively wide level range of the input voltage.

Patent
Noboru Horie1
29 Sep 1975
Abstract: A method of manufacturing a semiconductor integrated circuit device, which includes at least one junction field-effect transistor and at least one bipolar transistor, is characterized in that a groove portion is formed by chemically etching a part of a diffused layer for the channel region of the junction field-effect transistor, and that a layer for the gate of the junction field-effect transistor having a conductivity type to opposite to that of the channel region is formed by diffusion in the diffused layer of the channel region beneath the groove portion, whereby the pinch-off voltage V p of the junction field-effect transistor is made as small as possible and is also made smaller than the base-emitter reverse withstand voltage V BEO of the bipolar transistor.

Patent
09 Apr 1975
TL;DR: In this article, a bipolar transistor with high input impedance and low emitter-base conductance is described, and a low conductance component caused by the recombination of minority carriers in an emitter.
Abstract: A transistor circuit comprising a bipolar transistor with high input impedance is disclosed. The transistor has low emitter-base conductance, and especially has a low conductance component caused by the recombination of minority carriers in an emitter. The emitter capacitance caused by stored minority carriers is low because of the low conductance component. These enable emitter-grounded operation at high current gain and high frequency.

Journal ArticleDOI
TL;DR: In this paper, a simple model based on an analysis of the physical structure of a bipolar interdigitated microwave transistor was developed, which accurately describes the high frequency small signal operation.
Abstract: Based on an analysis of the physical structure of a bipolar interdigitated microwave transistor, a simple model is developed which accurately describes the high frequency small signal operation. The transistor model contains 15 elements. The values for ten of these parameters are determined by technological measurements using a special test pattern mask. The values of four of the parameters are determined through measurements made on the transistor, and one parameter is adjusted using the microwave S parameters measurements. A circuit model for the transistor package is also developed. The emitters are all arsenic doped, and the transistor structure does not exhibit a push effect. However, our measurements indicate that the emitter depth varies significantly with the width of the emitter window. This result shows that doping profiles measured on a uniformly doped test wafer may be quite different from the doping profile in the active base of a fine geometry microwave transistor. This implies that much recent work on microscopic models treating charge carrier transport may be invalid, since calculations are based on inaccurate doping profiles. The model in its present form neglects the physical mechanisms related to high current injection, but it describes accurately the transistor characteristics at normal operating currents and provides a valuable guide in optimizing the fabrication technology.

Patent
02 Sep 1975
TL;DR: In this paper, a dynamic storage element consisting of a transistor and a series-connected capacitor is characterized in which, in addition to the transistors of the storage element, at least one MI 1 I 2 S storage transistor is provided to receive the data stored in the stored element.
Abstract: A dynamic storage element is characterized in that, in addition to the transistors of the storage element, at least one MI 1 I 2 S storage transistor is provided to receive the data stored in the storage element. The dynamic storage element comprises a transistor and a series-connected capacitor. The transistor is connected on the one hand to the capacitor and on the other hand to a bit line, and the gate terminal of the transistor is connected to a word line. In particular, a MI 1 I 2 S storage transistor is additionally provided which is connected on the one hand to the word line and on the other hand to a point at which the transistor and the capacitor are connected in series and the gate terminal of the MI 1 I 2 S storage transistor is connected to a gate line.

Patent
30 Jul 1975
TL;DR: In this article, a compound field effect transistor is constructed in the form of monolithic integrated circuitry by the combined use of the dielectric isolation technique utilizing mesa groove and the pn-junction isolation technique.
Abstract: A horizontal junction-type field effect transistor having a saturated drain current to drain voltage characteristic and constituting an input transistor and a vertical junction-type field effect transistor having an unsaturated drain current to drain voltage characteristic and constituting an output transistor are connected in cascode fashion to compose a compound field effect transistor. This compound field effect transistor has a saturated characteristic, a high transconductance gm and a high breakdown voltage resembling those of a pentode vacuum tube. This compound field effect transistor is constructed in the form of monolithic integrated circuitry by the combined use of the dielectric isolation technique utilizing mesa groove and the pn-junction isolation technique.

Patent
Walter Lee Davis1
29 Dec 1975
TL;DR: In this article, the area of the second emitter-base junction was altered to be less than that of the first, and the current from the second current source was diverted to the base of a third transistor, forcing the latter into saturation.
Abstract: Matched semiconductor junctions on a single integrated circuit chip are connected in a current mirror arrangement to provide a low power AC level detector arrangement using only one resistor. Two transistors are identical except for junction area and each is in series with a constant current source. Since all other physical characteristics are identical, when identical voltages are applied, the junction currents are related by the ratio of their areas. By fabricating the area of the second emitter-base junction to be less than the area of the first, a portion of the current from the second current source is diverted therefrom to the base of a third transistor, forcing the latter into saturation. Accordingly, when an AC input signal of at least threshold level is coupled to the base of the second transistor, the current in the second transistor is driven to the level of its source. The current formerly diverted to the third transistor now drops to zero and the voltage across the third transistor rises immediately to its supply voltage. The input threshold level required to shut off the third transistor can be varied by different chip design parameters or by modifying a current source with an external digital control.

Patent
James Darrell Tompkins1
15 Dec 1975
Abstract: High density self-scanning photo-sensitive circuits employ a voltage transfer mode with charge amplification. The circuits include a field effect transistor and a capacitor coupled from the gate electrode of the transistor through a diode to the source electrode of the transistor. A photodiode is connected to the gate electrode of the transistor. Means are provided for precharging the capacitor to substantially the threshold voltage of the transistor while applying an additional constant voltage of predetermined magnitude to the gate electrode to operate the transistor in its linear region. An analog signal from the photo-diode is also applied to the gate electrode of the transistor which is amplified by the transistor with little or no threshold voltage loss. In a preferred array of these circuits, the photo-diodes or light sensitive devices are arranged linearly, in quantities of a thousand or more, and video signals from alternate devices are coupled to one or two common busses through individual gating transistors.

Patent
Derek Colman1
16 Jan 1975
TL;DR: In this paper, an integrated circuit with protection against overvoltage and overcurrent conditions, the channel of a field effect transistor is connected between the dc supply conductor for the integrated circuit and a further conductor for connection to one pole of a dc source for the circuit.
Abstract: To provide an integrated circuit with protection against overvoltage and overcurrent conditions, the channel of a field effect transistor is connected between the dc supply conductor for the integrated circuit and a further conductor for connection to one pole of a dc source for the circuit The channel of the transistor is provided by a region of an epitaxial layer on a substrate of opposite conductivity type which provides a back gate for the transistor A conductor is provided for connecting the substrate to the other pole of the dc source The dc supply line voltage for the integrated circuit is thereby limited to the pinch-off voltage of the field effect transistor and the power supply current is limited to the zero gate-bias drain current of the field effect transistor A protection arrangement also is disclosed for limiting forward current flow through an isolation diode in an integrated circuit resulting from accidental reverse polarity connection of a dc source to the circuit The isolation diode is connected to the dc supply conductor only through a path including a current limiting resistor A circuit combining both protection features also is described, the protection resistor connecting one end of the field effect transistor channel to the conductor for connection to the dc supply source to limit forward current flow through the diode junction between the transistor channel region and the substrate back gate region resulting from accidental reverse polarity connection of a dc source for the circuit