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Showing papers on "Static induction transistor published in 1976"


Journal ArticleDOI
TL;DR: A MOSFET with a maximum power of 200 W in a 5/spl times/5 mm/SUP 2/ chip which exhibits 20-A current, 3000-millimho transconductance and 100-V breakdown voltage has been developed.
Abstract: A MOSFET with a maximum power of 200 W in a 5/spl times/5 mm/SUP 2/ chip which exhibits 20-A current, 3000-millimho transconductance and 100-V breakdown voltage has been developed. The features of the device structure are a vertical drain electrode which makes it possible to use most of the surface area for the source electrode, and a meshed gate structure which realizes an increase in the channel width per unit area. The p-channel device with an offset gate structure was fabricated from an n on p/SUP +/ epitaxial wafer by using polysilicon gate and ion implantation processes. The device can be operated stably at ambient temperatures up to 180/spl deg/C. While the bipolar transistor is a suitable power device in the low voltage region, the MOSFET looks more promising in the high voltage region than the V-FET and the bipolar transistor.

39 citations


Patent
Hans O. Loberg1
10 Aug 1976
TL;DR: In this article, an output section is connected to the secondary winding of the transformer which provides alternately, relatively positive and negative going output signals which serve as the gating signals for the semiconductor device.
Abstract: A circuit for the generation or development of a gating signal for a semiconductor device which is isolated from the circuit of the device itself is comprised of a pulse generating section which feeds pulses to the primary winding of a transformer to thereby induce pulses into the transformer secondary winding. An output section is connected to the secondary winding of the transformer which provides alternately, relatively positive and negative going output signals which serve as the gating signals for the semiconductor device. As provided in the preferred embodiment, the semiconductor device is a field effect transistor and the output section insures that during times in which it is desired to have the transistor conducting, a relatively positive pulse is applied to the gate electrode of the field effect transistor while during periods between pulses, when it is desired to have the transistor non-conducting, there is a sufficiently negative signal applied to the gate electrode so as to maintain the field effect transistor in its nonconducting state.

37 citations


Patent
06 May 1976
TL;DR: In a transistor switching type voltage regulation circuit, energy precharge is provided in a by-pass loop around the switching transistor as discussed by the authors, which greatly increases the reliability of the switching transistors.
Abstract: In a transistor switching type voltage regulation circuit, energy precharge is provided in a by-pass loop around the switching transistor. The instantaneous peak power dissipation at turn-on through the switching transistor is thereby diminished, greatly increasing the reliability of the switching transistor.

34 citations


Patent
22 Dec 1976
TL;DR: In this paper, a complementary emitter follower transistor is employed in the biasing of the stacking transistor along with a current source acting as the emitter load, which provides constant current drive for the stack transistor without resorting to low value biasing resistors.
Abstract: In transistor output stages, where the applied voltage exceeds the voltage rating of available transistors, stacking is employed to divide the voltage across two or more series connected devices. A complementary emitter follower transistor is employed in the biasing of the stacking transistor along with a current source acting as the emitter follower load. This arrangement provides constant current drive for the stacking transistor without resorting to low value biasing resistors which produce excessive current flow under quiescent conditions.

32 citations


Patent
12 Apr 1976
TL;DR: In this paper, a semiconductor structure for, and method of manufacture of, a linear integrated circuit provides the equivalent of a base function in a transistor, wherein the base function has a dual charge density, with the latter being relatively low in the lower active area of the base between PN junctions for high gain and high breakdown voltage, but high along the upper surface to prevent an unwanted inversion layer from occurring.
Abstract: A semiconductor structure for, and method of manufacture of, a linear integrated circuit provides the equivalent of a base function in a transistor, wherein the base function has a dual charge density, with the latter being relatively low in the lower active area of the base between PN junctions for high gain and high breakdown voltage, but high along the upper surface to prevent an unwanted inversion layer from occurring.

30 citations


Patent
18 Oct 1976
TL;DR: In this paper, a short-channel V-groove MOS transistor is provided having laterally disposed source, drain, gate dielectric on the same face of a lightly p-doped substrate.
Abstract: A short-channel V-groove MOS transistor is provided having laterally disposed source, drain, gate dielectric on the same face of a lightly p-doped substrate. Using ion implantation, a heavily doped vertical channel layer is symmetrically provided below and between the drain and the source in the substrate and being self-aligned to the gate which is formed in the V-groove by a silicon dioxide layer and a conductor layer. Appropriate leads contact the gate conductor, the drain and the source. Such transistor can be incorporated in an integrated circuit to form an inverter circuit with a lateral depletion-mode V-MOS as a load transistor.

25 citations


Patent
01 Jun 1976
TL;DR: In this article, a vertical transistor is formed in an N-type epitaxial layer overlying an N+ substrate by implanting P-type impurity in a location spaced apart from the surfaces of the epitaxia layer.
Abstract: An integrated transistor circuit arrangement provides a multicollector transistor with Schottky diodes and ohmic connections selectively formed at the collector terminals. In the illustrative example, a vertical transistor is formed in an N-type epitaxial layer overlying an N+ substrate. A through-extending region of P+ material encircles the region of the epitaxial layer in which the vertical transistor is formed. The base of the vertical transistor is formed by the implanting of P-type impurity in a location spaced apart from the surfaces of the epitaxial layer. The resulting base has a symmetrical profile relative to the faces of the epitaxial layer. Therefore, the transistor may be operated with the collector at the surface without penalty of electrical operation. In the illustrative example, a PNP lateral transistor is utilized as a current source for the vertical transistor.

22 citations


Patent
10 May 1976
TL;DR: In this article, a base drive regulator for regulating the base drive voltage of the output transistor of a switching amplifier is proposed, where the inputs of a comparator are separately connected to a reference voltage of either an independent source or the base of an output transistor and to a resistor network connected between the collector and emitter of the transistor.
Abstract: A base drive regulator for regulating the base drive voltage of the output transistor of a switching amplifier. The inputs of a comparator are separately connected to a reference voltage of either an independent source or the base of the output transistor and to a resistor network connected between the collector and emitter of the transistor. The output from the comparator is utilized to indirectly control the conductivity of the output transistor to maintain the output transistor just at saturation.

22 citations


Patent
17 Sep 1976
TL;DR: In this article, a voltage divider is connected with a Zener diode in parallel with a switching transistor whose base is tied to a tap of the divider, which is also connected across the power transistor in series with a voltage-sensing network.
Abstract: A protective device limiting the current flow through a power transistor 11 in a final stage of an integrated circuit comprises, as part of that circuit, a normally nonconductive shunt transistor 31 which is turned on by a monitoring transistor 22 whenever the collector current I and the collector-emitter voltage V CE of the power transistor reach values beyond a protective curve 52 plotted on a current/voltage diagram. The base-emitter circuit of the monitoring transistor 22 is connected across an output resistor R 2 , in series with the power transistor 11, via a diode 21 of logarithmic conduction characteristic, that diode being also connected across the power transistor in series with a voltage-sensing network. This network includes a voltage divider R 3 , R 5 in series with a Zener diode 33, the voltage divider being connected in parallel with a switching transistor 35 whose base is tied to a tap of the divider.

20 citations


Patent
24 Jun 1976
TL;DR: In this paper, a breakdown preventing protection structure for an insulated gate field effect semiconductor device is disclosed for limiting input voltages to levels not substantially exceeding the supply voltage, which is particularly suited to protect V-groove metal oxide semiconductor devices.
Abstract: A breakdown preventing protection structure for an insulated gate field effect semiconductor device is disclosed for limiting input voltages to levels not substantially exceeding the supply voltage. A planar insulated gate field effect protection transistor is provided in series with the input. The protection transistor includes a source forming the circuit input, a drain connected to the gate of the device to be protected, and a gate electrode connected to the supply voltage which also supplies the device to be protected. A shunting protective diode may be included at the source of the protection transistor to limit negative input voltages to the diode threshold voltage and positive input voltages to the reverse avalanche breakdown of the protective diode. The protection circuit is particularly well suited to protect V-groove metal oxide semiconductor devices which have breakdown voltages well below breakdown voltages of conventional planar MOS transistor devices.

19 citations


Patent
03 Sep 1976
TL;DR: In this paper, an MOST buffer circuit has a first normally nonconductive transistor in series with a second normally conductive transistor between earth and a main power supply, connected between the common connection point of the two transistors and the gate of the first transistor.
Abstract: An MOST buffer circuit has a first normally non-conductive transistor in series with a second normally conductive transistor between earth and a main power supply. A normally discharged bootstrap capacitor is connected between the common connection point of the two transistors and the gate of the first transistor. In response to an input signal, the transistor is switched on, the transistors conduct in series, and the bootstrap capacitor charges. The transistor is then switched off, ceasing the series current and developing an output potential which approximates to that of the power supply.

Patent
11 Feb 1976
TL;DR: In this article, an improved switching regulator circuit is adapted for use with switch regulators in which more than one transistor is operated in parallel to provide a higher output current than normally obtained.
Abstract: An improved switching regulator circuit is adapted for use with switch regulators in which more than one transistor is operated in parallel to provide a higher output current than normally obtained. Each transistor is operated with a separate inductor or filter on either the emitter or collector side of the transistor and each transistor possesses its own flyback diode.

Patent
John E. Hanna1
08 Dec 1976
TL;DR: In this article, a temperature compensated low voltage reference that produces an output voltage less than the silicon band-gap voltage is presented. But the output voltage is essentially insensitive to temperature variations.
Abstract: A temperature compensated low voltage reference that produces an output voltage less than the silicon band-gap voltage. The low voltage reference includes at least a first and a second transistor for providing a voltage independent of variations in the collector power supply and at least a third transistor for developing a voltage that is a fractional value of the base-to-emitter voltage drop of a transistor. The at least a third transistor for developing is coupled with the at least a first and a second transistor for providing. The low voltage reference also includes an output transistor for providing an output voltage. The output transistor is controlled by the voltage provided by the at least a first and a second transistor for providing so that the output voltage is essentially insensitive to temperature variations and is a lower value than the silicon band-gap voltage.

Patent
William W. Chu1
15 Jan 1976
TL;DR: In this article, a driver circuit for a single MOS transistor for coupling sustain signals to an associated row or column conductor of the panel is described. But the transistor is operated in an unconventional manner in which the junction between the drain and the semiconductor layer in which it is disposed is forward-biased.
Abstract: Driver circuits for plasma panels and similar matrix display devices are disclosed Each driver circuit includes a single MOS transistor for coupling sustain signals to an associated row or column conductor of the panel The drain of the transistor is connected to the associated conductor For a first polarity of sustain signal, the transistor is operated in a conventional manner For the second polarity of sustain signal, the transistor is operated in an unconventional manner in which the junction between the drain and the semiconductor layer in which the transistor is disposed is forward-biased The second polarity of sustain signal is thereby extended through the transistor by way of a forward-biased diode path rather than by way of its channel Write and erase signal waveforms are continuously applied to each driver circuit Additional MOS circuitry in each driver circuit is responsive to an applied address signal to couple the write and erase signals through to the associated conductor

Patent
07 Dec 1976
TL;DR: In this article, the authors describe logic CMOS transistor circuits formed by at least one gate circuit, each gate circuit comprising a pair of CMOS transistors connected in series between the terminals of a power supply, each group of transistors defines the potential of a common connection point or output node.
Abstract: The invention relates to logic CMOS transistor circuits formed by at least one gate circuit, each gate circuit comprising a pair of CMOS transistor groups connected in series between the terminals of a power supply. The conductive state of both groups of transistors defines the potential of a common connection point or output node. A power dissipating means of relatively high resistance is coupled in parallel with at least a part of at least one of the said transistor groups, at least during a time interval in which both groups are in a non conductive state. This results in a quasi static behavior of the circuits according to the invention although the basic structure of the same is that of dynamic circuits.

Patent
07 May 1976
TL;DR: In this article, a gain control circuit is proposed to provide a high gain signal representative of the difference in amplitude between the synchronizing pulses of a composite video signal and a predetermined reference level.
Abstract: An automatic gain control circuit provides a high gain signal representative of the difference in amplitude between the synchronizing pulses of a composite video signal and a predetermined reference level. A common emitter transistor provides high gain amplification of the composite video signal, the emitter of this transistor being biased at the reference level via a voltage reference source. The collector of this transistor is coupled to an emitter follower transistor whose output signal is filtered to produce the gain control signal. A controlled positive feedback signal from the emitter of the second transistor amplifier is coupled to the emitter of the first transistor amplifier, and by matching the feedback resistor to the collector bias resistor of the common emitter transistor, the emitter of this transistor is at a virtual ground thereby providing a high gain.

Patent
29 Jun 1976
TL;DR: In this article, a dual-gate MNOS memory transistor is described, which includes drain and source regions of a first conductivity type formed in a substrate of a second conductivity Type.
Abstract: A dual gate MNOS memory transistor is disclosed The transistor includes drain and source regions of a first conductivity type formed in a substrate of a second conductivity type The region of the substrate between the drain and source regions forms the channel of the transistor First and second insulating layers forming a charged trapping structure overlie the channel region A first gate having a width less than the width of the channel overlies the central portion of the channel region A second gate, insulated from the first gate, overlies the first gate and the remainder of the channel region The threshold voltage of the transistor is shifted by selectively biasing the gates and the substrate High and low threshold voltage states are used to represent the two values of a digital signal

Proceedings ArticleDOI
TL;DR: In this article, Nishizawa et al. proposed JaPan Static Induction Transistor (JaPan) for low distortion audio transistor, of high power transistor of about zKW d.c. with the cut off frequency of about 7MHz, and EHF transistor of EHF of about 3.7W a.c at ZGHz.
Abstract: Jun-ichi Nishizawa Research Institute of Electrical Communication, Tohoku University Katahira 2'L-L, Sendai, JaPan Static Induction Transistorl has al\"ready realized in the forn of Low distortion audio transistor, of high power transistor of about zKW d.c. with the o(-cut off frequency of about 7MHz, ancl of EHF transistor of about 3.7W a.c. at ZGHz. And, also, the applications into the thyristor structure and into the integrated

Patent
05 Aug 1976
TL;DR: In this paper, an electronic speed control circuit for automotive vehicles is described, where a memory capacitor is connected at one end to a speed signal generator and at the other end to the gate of a field effect transistor to memorize a command speed signal.
Abstract: In an electronic speed control circuit for automotive vehicles, a memory capacitor is connected at one end thereof to a speed signal generator and at the other end thereof to the gate of a field effect transistor to memorize a command speed signal. The electronic control circuit comprises a setting circuit for momentarily applying a constant voltage to a common junction between the gate of the field effect transistor and the memory capacitor. The setting circuit includes a second field effect transistor whose source is connected to a constant voltage circuit and whose drain is connected to the common junction between the memory capacitor and the first-named field effect transistor and a manual control circuit connected to the gate of the second field effect transistor to normally connect the gate of the second field effect transistor to the ground and to momentarily connect the constant voltage circuit to the gate of the second field effect transistor upon actuation of the manual control circuit.

Patent
22 Oct 1976
TL;DR: In this paper, a p-channel field effect transistor (JFET) is connected between the base and collector of the junction transistor to keep the transistor out of saturation and is comprised of a circuit consisting of a n-channel JFET.
Abstract: A base junction transistor inverter circuit will be driven into the saturation region if the drive current is large enough. In such circumstances, the collector voltage can go below the base voltage and approaches the emitter voltage. A circuit is provided to keep the transistor out of saturation and is comprised of a p-channel field effect transistor (JFET) connected between the base and collector of the junction transistor. The JFET is connected such that when the drive current increases and the junction transistor approaches saturation, the drive current is diverted through the JFET and into the substrate. The same clamp can be implemented by using a pnp junction transistor in combination with an n-channel JFET.

Patent
30 Jan 1976
TL;DR: In this paper, a MOSFET random access memory having a highly sensitive sense amplifier is disclosed. But the sense amplifier utilizes a field effect transistor connected in the common gate mode so as to produce a large output swing on a reltively low capacitance output node, which is the drain node of the transistor, as a result of a relatively low voltage swing produced by reading data stored in a memory cell on a high capacitance column bus connected to the source.
Abstract: A MOSFET random access memory having a highly sensitive sense amplifier is disclosed. The sense amplifier utilizes a field effect transistor connected in the common gate mode so as to produce a large output swing on a reltively low capacitance output node, which is the drain node of the transistor, as a result of a relatively low voltage swing produced by reading data stored in a memory cell on a high capacitance column bus connected to the source of the transistor. The sense amplifier is shown in differential configuration with a low power level shifting circuit and also with both static memory cells, where a greatly improved access time is produced, and with destructive readout cells where improved reliability is possible.

Patent
17 Feb 1976
TL;DR: In this paper, a bipolar transistor and a field effect transistor are connected to the inverter input, and the base current level control is provided for discharging parasitic capacitance across the bipolar transistor when the latter is switched ON.
Abstract: An inverter has a bipolar transistor and a field-effect transistor. The base gate electrodes are connected to the inverter input, and the collector and source electrodes are connected to the inverter output. The transistors are in series between supply rails. The lower of two possible input voltage levels causes the bipolar transistor to be switched OFF and the field-effect transistor to be switched ON, and the higher possible input voltage level causes the bipolar transistor to be switched ON and the field-effect transistor to be switched OFF. Base current level control is provided for discharging parasitic capacitance across the bipolar transistor when the latter is switched ON.

Patent
18 Aug 1976
TL;DR: In this article, a transistor of polarity opposite to that of the pass transistor is connected in shunt with the load and driven from the same error amplifier as the one which drives the pass transistors.
Abstract: Unipolar regulated power supplies can be provided with two way control of output voltage by a transistor of polarity opposite to that of the pass transistor connected in shunt with the load and driven from the same error amplifier as the one which drives the pass transistor.

Patent
19 Jun 1976
TL;DR: In this article, a variable gain RF input amplifier with an improved cross modulation characteristic using a field effect transistor is presented, where the first 10 db of signal attenuation is effected by an AGC voltage applied to the transistor, following which supplementary attenuation was provided by an increasing reverse bias applied to a PIN-diode in the RF signal input path.
Abstract: A variable gain RF input amplifier having an improved cross modulation characteristic using a field effect transistor. About the first 10 db of signal attenuation is effected by an AGC voltage applied to the transistor, following which supplementary attenuation is provided by an increasing reverse bias applied to a PIN-diode in the RF signal input path to the transistor, the diode bias being derived from the source circuit of the transistor.

Patent
27 Feb 1976
TL;DR: In this paper, a single-ended static frequency converter has a pulsewidth controlled transistor with a power transistor feeding a number of secondary windings for galvanically isolated outputs, permitting regulation of the various outputs.
Abstract: A single ended static frequency converter has a pulse-width controlled control transistor. It has a power transistor feeding a number of secondary windings for galvanically isolated outputs, permitting regulation of the various outputs. In addition to the main control transistor, a further pulse-width controlled transistor controlled by the output voltage of any individual output channel is provided with its own auxiliary control circuit. The control of the output voltage may be effected in accordance with the voltage flanks of the voltage from the relevant secondary winding.

Patent
22 Mar 1976
TL;DR: In this article, a monolithic switching circuit has a junction field-effect transistor controlled through a capacitive diode and a small field effect transistor, with the source and drain connected to a control terminal.
Abstract: A monolithic switching circuit has a junction field-effect transistor controlled through a capacitive diode and a small field-effect transistor. The physical structure of the switch includes a junction field-effect transistor with a gate region connected to one side of a diode and to the gate of another small field-effect transistor having the source thereof connected to or comprising the other side of the diode and the drain thereof connected to a control terminal.

Patent
06 Aug 1976
TL;DR: In this paper, a switching regulator power supply with an auto transformer in the output of the main transistor switch, the secondary of which feeds back a back biasing pulse to the transistor switch base/emitter junction, thus speeding up transistor turn off.
Abstract: A switching regulator power supply with an auto transformer in the output of the main transistor switch, the secondary of which feeds back a back biasing pulse to the main transistor switch base/emitter junction thus speeding up transistor turn off.

Patent
21 Jul 1976
TL;DR: In this paper, the conduction of the emitter-collector path of the auxiliary transistor is gradually changed to prevent an undesired pulse at the secondary of the ignition coil which may induce continued operation of the internal combustion engine even though the ignition has been turned off.
Abstract: To provide for gradual turn-off of an ignition coil current control transistor, a control capacitor which provides turn-off current has its charge state changed gradually by means of an auxiliary transistor so connected to the capacitor that the conduction of the emitter-collector path of the auxiliary transistor is gradually changed, the main switching transistor being connected to and controlled by the auxiliary transistor and likewise changing gradually from conductive to blocking state in dependence on the gradual change in conduction of the emitter-collector path of the auxiliary transistor to prevent rapid turn-off of the main switching transistor and hence an undesired pulse at the secondary of the ignition coil which may induce continued operation of the internal combustion engine even though the ignition has been turned off.

Patent
27 May 1976
TL;DR: A switching circuit has an output transistor between an input and an output conductor, and a drive transistor, the transistors being Darlington-connected as mentioned in this paper, the windings being arranged so that a falling collector current to the drive transistor induces a reverse bias current in the base-emitter junction of the output transistor.
Abstract: A switching circuit has an output transistor between an input and an output conductor, and a drive transistor, the transistors being Darlington-connected. A transformer has one winding in the collector circuit of the drive transistor and another winding across the base-emitter junction of the output transistor, the windings being arranged so that a falling collector current to the drive transistor induces a reverse bias current in the base-emitter junction of the output transistor.

Patent
07 Dec 1976
TL;DR: In this article, a dc-to-dc converter is coupled to the output multiplier-rectifier by a transformer which has a feedback winding connected in series with the base of the power transistor.
Abstract: A laser power supply includes a dc to dc converter which feeds a multiplier-rectifier circuit to provide a high dc voltage output. The converter includes a power transistor which is subject to a control of its on time to provide constant current regulation. A smooth regulation is provided by a proper timing of the turn off signal to the power transistor by sampling the emitter signal of a transistor which is included in a synthesized thyristor, the thyristor being operable to hog base current from the power transistor. The converter is coupled to the output multiplier-rectifier by a transformer which has a feedback winding connected in series with the base of the power transistor.