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Showing papers on "Static induction transistor published in 2013"


Patent
15 Mar 2013
TL;DR: In this article, the gate electrodes of the second finfet transistors of the first and second transistor types are electrically connected to each other and positioned on opposite sides of a gate electrode track.
Abstract: A first gate level feature forms gate electrodes of a first finfet transistor of a first transistor type and a first finfet transistor of a second transistor type. A second gate level feature forms a gate electrode of a second finfet transistor of the first transistor type. A third gate level feature forms a gate electrode of a second finfet transistor of the second transistor type. The gate electrodes of the second finfet transistors of the first and second transistor types are electrically connected to each other. The gate electrodes of the second finfet transistors of the first and second transistor types are positioned on opposite sides of a gate electrode track along which the gate electrodes of the first finfet transistors of the first and second transistor types are positioned.

79 citations


Journal ArticleDOI
09 Aug 2013-Science
TL;DR: A transistor is reported that uses an embedded tunneling field-effect transistor for charging and discharging the semi-floating gate and can achieve ultra–high-speed writing operations (on time scales of ~1 nanosecond).
Abstract: As the semiconductor devices of integrated circuits approach the physical limitations of scaling, alternative transistor and memory designs are needed to achieve improvements in speed, density, and power consumption. We report on a transistor that uses an embedded tunneling field-effect transistor for charging and discharging the semi-floating gate. This transistor operates at low voltages (≤2.0 volts), with a large threshold voltage window of 3.1 volts, and can achieve ultra–high-speed writing operations (on time scales of ~1 nanosecond). A linear dependence of drain current on light intensity was observed when the transistor was exposed to light, so possible applications include image sensing with high density and performance.

73 citations


Patent
11 Jun 2013
TL;DR: In this paper, the first switching transistor element and the third switching transistor elements are coupled in series between a first power source and a first downstream circuit, and the second switching transistor and the fourth switching transistor devices are coupled between a second source and downstream circuit.
Abstract: Circuitry, which includes a first switching transistor element having a first gate, a second switching transistor element having a second gate, a third switching transistor element having a third gate, and a fourth switching transistor element having a fourth gate, is disclosed. The first switching transistor element and the third switching transistor element are coupled in series between a first power source and a first downstream circuit. The second switching transistor element and the fourth switching transistor element are coupled in series between a second power source and the first downstream circuit. A voltage swing at the first gate and a voltage swing at the second gate are both about equal to a first voltage magnitude. A voltage swing at the third gate and a voltage swing at the fourth gate are both about equal to a second voltage magnitude.

66 citations


Patent
05 Apr 2013
TL;DR: In this paper, a gate bias circuit is connected between the gate of the depletion mode transistor and the low power line to compensate the forward voltage of a diode function of the switching device.
Abstract: The invention provides a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line. The gate bias circuit is adapted to compensate the forward voltage of a diode function of the switching device. The depletion mode transistor and the gate bias circuit are formed as part of an integrated circuit.

43 citations


Patent
26 Jul 2013
TL;DR: In this article, a radio frequency (RF) switch branch having a reduced nonlinearity and an associated method for reducing non-linearity in a RF switch branch is described.
Abstract: Disclosed is a radio frequency (RF) switch branch having a reduced nonlinearity and an associated method for reducing nonlinearity in a RF switch branch. The RF switch branch includes a primary transistor, a first transistor having power terminals electrically connected between a drain node and a body node of the primary transistor, and a second transistor having power terminals electrically connected between the body node and a source node of the primary transistor. The RF switch may further include a body resistor electrically connected between the body node of the primary transistor and ground, and a gate resistor electrically connected between a gate of the primary transistor and a gate voltage source. A gate of each of the first transistor and the second transistor is electrically connected to the gate voltage source such that the first transistor and the second transistor are ON only when the primary transistor is ON.

34 citations


Patent
10 Jan 2013
TL;DR: In this paper, the authors describe a power controller for monitoring for unsafe operating conditions of a drive transistor in a switching power converter of a LED lamp system by predicting the power dissipation of the drive transistor.
Abstract: The embodiments disclosed herein describe a method of a power controller for monitoring for unsafe operating conditions of a drive transistor in a switching power converter of a LED lamp system by predicting the power dissipation of the drive transistor based on knowledge of the current through the drive transistor and a continuous observation of the voltage across the drive transistor. When the drive transistor approaches unsafe operating conditions, the power controller turns off the drive transistor.

29 citations


Patent
14 Jan 2013
TL;DR: In this article, the transistor body bias values are determined for the target frequency in order to enhance a characteristic of a circuit, where the transistors are biased based on the body-biasing values, wherein the characteristic is enhanced.
Abstract: Software controlled transistor body bias. A target frequency is accessed. Using software, transistor body-biasing values are determined for the target frequency in order to enhance a characteristic of a circuit. The bodies of the transistors are biased based on the body-biasing values, wherein the characteristic is enhanced.

24 citations


Journal ArticleDOI
TL;DR: In this article, a comparative study on the hot-carrier degradation between inversion mode and junctionless n-channel multiple gate MOSFET has been performed experimentally.
Abstract: A comparative study on the hot-carrier degradation between inversion mode and junctionless n-channel multiple gate MOSFET has been performed experimentally. The device degradation is more significant in JL transistor than in IM transistor at low stress gate voltage. However, this trend is reversed at high stress gate voltage. The highest degradation rate is found to occur at V G = V FB in JL transistors and at classical stress bias conditions ( V G = V D /2) in IM transistor. 3-Dimensional device simulation is used to explain the observed results.

24 citations


Patent
22 May 2013
TL;DR: In this article, the authors describe a novel electronic device consisting of one-or more-vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes.
Abstract: This invention describes a novel electronic device consisting of one—or more—vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes. One of the two gate electrodes, acting on the central section of the transistor channel, controls on/off behavior of the channel. The second gate, acting on the regions in proximity to the source and the drain of the transistor, defines the polarity of the devices, i.e. p or n type. The electric field of the second gate acts either at the interface of the nanowire-to-source/drain region or anywhere in close proximity to the depleted region of the SiNW body, modulating the bending of the Schottky barriers at the contacts, eventually screening one type of charge carrier to pass through the channel of the transistor. This is achieved by controlling the majority carriers passing through the transistor channel by regulating the Schottky barrier thicknesses at the source and drain contacts.

23 citations


Patent
10 Jun 2013
TL;DR: In this paper, a display device includes a pixel array including an OLED, a first transistor, a second transistor, an anode, a third transistor, and a second capacitor.
Abstract: A display device includes a pixel array. The pixel array includes multiple pixel elements. At least one pixel element includes an OLED, a first transistor, a second transistor, a third transistor, a first capacitor and a second capacitor. The first transistor has a first terminal coupled to an anode of the OLED for driving the OLED. The second transistor is coupled between a second terminal of the first transistor and a reset voltage and has a control terminal receiving a reset signal. The third transistor is coupled between the anode of the OLED and a control terminal of the first transistor and has a control terminal receiving a compensation signal. The first capacitor is coupled between the control terminal of the first transistor and the anode of the OLED. The second capacitor is coupled to the first capacitor and the control terminal of the first transistor.

21 citations


Patent
11 Jul 2013
TL;DR: In this paper, a driving method of a semiconductor device for compensating variation in threshold voltage and mobility of a transistor is provided, where voltage corresponding to threshold voltage of the transistor is held in the capacitor.
Abstract: A driving method of a semiconductor device for compensating variation in threshold voltage and mobility of a transistor is provided. A driving method of a semiconductor device including a transistor and a capacitor electrically connected to a gate of the transistor includes a first period where voltage corresponding to threshold voltage of the transistor is held in the capacitor, a second period where a total voltage of video signal voltage and threshold voltage is held in the capacitor holding the threshold voltage, and a third period where charge held in the capacitor in accordance with the total voltage of the video signal voltage and the threshold voltage in the second period is discharged through the transistor.

Patent
Song Qin1
08 Mar 2013
TL;DR: In this paper, a switching regulator includes a switch transistor, replica transistor, a current source, a sense resistor, and a current sensing circuit, such that the voltage across the sense resistor changes in relation to the current through the switch transistor.
Abstract: Apparatus and methods for current sensing in switching regulators are provided. In certain implementations, a switching regulator includes a switch transistor, a replica transistor, a current source, a sense resistor, and a current sensing circuit. The drain and gate of the switch transistor can be electrically connected to the drain and gate of the replica transistor, respectively. Additionally, the current sensing circuit can control the voltage of the source of the replica transistor based on the polarity of a current through the switch transistor to generate an output current that changes in response to the switch transistor's current. The sense resistor can receive an offset current from the first current source and the output current from the current sensing circuit such that the voltage across the sense resistor changes in relation to the current through the switch transistor.

Patent
Vasudha Gupta1
21 Jan 2013
TL;DR: In this paper, a pixel driving circuit includes a storage capacitor, a first, a second, and a third transistor, and the second transistor is switched off by a first signal from a gate line such that the voltage at an anode of the OLED does not vary with pixel location.
Abstract: A pixel driving circuit includes a storage capacitor, a first, a second, and a third transistor. A method for driving an organic light emitting diode (OLED) display includes controlling the second transistor by a first signal from a gate line such that the second transistor is switched "Off" for a first phase, and "On" for a second phase and a third phase, "Off" for a fourth phase. During the second phase, storing a threshold voltage of the first transistor on the storage capacitor coupled between the gate and the source of the first transistor. During the third phase, supplying a data voltage from a data line to the gate of the first transistor, and switching off the third transistor by a second signal such that the voltage at an anode of the OLED does not vary with pixel location and provides brightness uniformity for the display.

Patent
14 Aug 2013
TL;DR: In this paper, an NPN bipolar transistor is used to define a relatively low forward trigger voltage of a high reverse blocking voltage (HRBV) device and a PNP bipolar transistor defines a relatively high reverse breakdown voltage of the HRBV device.
Abstract: Apparatus and methods for electronic circuit protection under high stress operating conditions are provided. In one embodiment, an apparatus includes a substrate having a first p-well, a second p-well adjacent the first p-well, and an n-type region separating the first and second p-wells. An n-type active area is over the first p-well and a p-type active area is over the second p-well. The n-type and p-type active areas are electrically connected to a cathode and anode of a high reverse blocking voltage (HRBV) device, respectively. The n-type active area, the first p-well and the n-type region operate as an NPN bipolar transistor and the second p-well, the n-type region, and the first p-well operate as a PNP bipolar transistor. The NPN bipolar transistor defines a relatively low forward trigger voltage of the HRBV device and the PNP bipolar transistor defines a relatively high reverse breakdown voltage of the HRBV device.

Journal ArticleDOI
TL;DR: In this paper, a Schottky barrier diode (SBD) was embedded in a recessed normally off AlGaN/GaN-on-Si metal-oxide-semiconductor heterostructure field effect transistor (MOSHFET).
Abstract: We developed a Schottky barrier diode (SBD) embedded AlGaN/GaN switching transistor to allow negative current flow during off-state condition. An SBD was embedded in a recessed normally-off AlGaN/GaN-on-Si metal-oxide-semiconductor heterostructure field-effect transistor (MOSHFET). The fabricated device exhibited normally-off characteristics with a gate threshold voltage of 2.8 V, a diode turn-on voltage of 1.2 V, and a breakdown voltage of 849 V for the anode-to-drain distance of 8 µm. An on-resistance of 2.66 mΩcm2 was achieved at a gate voltage of 16 V in the forward transistor mode. Eliminating the need for an external diode, the SBD embedded switching transistor has advantages of significant reduction in parasitic inductance and chip area.

Patent
09 Aug 2013
TL;DR: In this paper, a high voltage semiconductor switch includes a first field-effect transistor having a source, a drain and a gate, and being adapted for switching a voltage at a rated high-voltage level, the first field effect transistor being a normally-off enhancement-mode transistor, a second field effect transistors being normally-on depletion mode transistor, and a control unit connected to the drain of the first FET and to the gate of the second FET.
Abstract: A high voltage semiconductor switch includes a first field-effect transistor having a source, a drain and a gate, and being adapted for switching a voltage at a rated high-voltage level, the first field-effect transistor being a normally-off enhancement-mode transistor, a second field-effect transistor having a source, a drain and a gate, connected in series to the first field-effect transistor, the second field-effect transistor being a normally-on depletion-mode transistor; and a control unit connected to the drain of the first field-effect transistor and to the gate of the second field-effect transistor and being operable for blocking the second field-effect transistor if a drain-source voltage across the first field-effect transistor exceeds the rated high-voltage level.

Patent
24 Sep 2013
TL;DR: In this paper, the authors proposed a method for reducing display-to-touch crosstalk by reducing the parasitic capacitance between the gate line and the second drain of the second transistor.
Abstract: Devices and methods for reducing display-to-touch crosstalk are provided. In or more examples, an electronic display panel may include a pixel. The pixel may include a pixel electrode, a common electrode, and a first transistor having a first source coupled to a data line, a first gate coupled to a gate line, and a first drain coupled to the pixel electrode. The first transistor may be configured to pass a data signal from the data line to the pixel electrode upon receipt of an activation signal from the gate line. The pixel may also include a second transistor having a second source coupled to the common electrode, a second gate coupled to the gate line, and a second drain coupled to a common voltage source. The second transistor may be configured to cause a parasitic capacitance between the gate line and the second drain of the second transistor instead of between the gate line and the first drain of the first transistor.

Patent
03 Jan 2013
TL;DR: In this article, a solid-state image sensor with stable electrical properties is presented. But the potential of the signal charge storage portion of the image sensor is not kept constant, so that a dynamic range can be improved.
Abstract: A solid-state image sensor which holds a potential for a long time and includes a thin film transistor with stable electrical characteristics is provided. When the off-state current of a thin film transistor including an oxide semiconductor layer is set to 1×10−13 A or less and the thin film transistor is used as a reset transistor and a transfer transistor of the solid-state image sensor, the potential of the signal charge storage portion is kept constant, so that a dynamic range can be improved. When a silicon semiconductor which can be used for a complementary metal oxide semiconductor is used for a peripheral circuit, a high-speed semiconductor device with low power consumption can be manufactured.

Patent
Tatsuya Hirose1
24 Sep 2013
TL;DR: A voltage detection circuit includes a transistor, a switch coupled to a drain terminal of the transistor, and a plurality of resistors coupled in series and coupled to an end of the switch.
Abstract: A voltage detection circuit includes: a transistor; a switch coupled to a drain terminal of the transistor; the drain terminal is coupled to an one end of the switch; a first driver that controls the switch in synchronization with a second driver that drives a gate terminal of the transistor; and a plurality of resistors coupled in series and coupled to an another end of the switch.

Patent
23 Aug 2013
TL;DR: In this paper, an electronic biasing circuit has a first transistor and a second transistor and the currents flowing through the first and second transistors are forced to be equal, and a third transistor is connected in series with the first transistor.
Abstract: An electronic biasing circuit provides a DC bias voltage to a circuit to be biased. The biasing circuit has a first transistor and a second transistor. A gate of the first transistor is connected to a gate of the second transistor and supplies the DC bias voltage. A source of the first transistor is connected to a supply reference voltage. A source of the second transistor is connected to the supply reference voltage via a resistor element. The currents flowing through the first and second transistor are forced to be equal. A third transistor is connected in series with the first transistor and a fourth transistor is connected in series with the second transistor. Currents flowing through the third and fourth transistors are forced to be equal.

Patent
Takuya Ishii1
25 Oct 2013
TL;DR: In this paper, a DC-DC converter includes a soft-start circuit configured to generate a soft start voltage rising from an initial voltage at start-up of the DC converter, and a control circuit configurable to control switching of the main switching transistor and the synchronous rectifying transistor based on the softstart voltage.
Abstract: A DC-DC converter transforms a DC input voltage to generate a DC output voltage by complementary switching control of a main switching transistor and a synchronous rectifying transistor The DC-DC converter includes a soft-start circuit configured to generate a soft-start voltage rising from an initial voltage at start-up of the DC-DC converter; and a control circuit configured to control switching of the main switching transistor and the synchronous rectifying transistor based on the soft-start voltage to perform soft start of the DC-DC converter The control circuit brings both of the main switching transistor and the synchronous rectifying transistor to an off state while the soft-start voltage is lower than the DC output voltage

Patent
18 Sep 2013
TL;DR: In this article, a source driving circuit configured for a switching power circuit, can include a source transistor coupled between a source of a main power transistor and ground, where the source transistor can be controlled by a PWM control signal.
Abstract: In one embodiment, a source driving circuit configured for a switching power circuit, can include: (i) a source transistor coupled between a source of a main power transistor and ground, where the source transistor can be controlled by a PWM control signal; (ii) the main power transistor being on when the source transistor is on and a gate-source voltage of the main power transistor exceeds a conduction threshold voltage; (iii) a source diode having an anode coupled to the main power transistor source, and a cathode coupled to a delay circuit and a power supply capacitor; and (iv) the delay circuit controlling the main power transistor to turn off a delay time after the source transistor is turned off, where the delay time allows charging of the power supply capacitor such that a voltage across the power supply capacitor is at least a level of a reference voltage.

Patent
15 Feb 2013
TL;DR: In this paper, the authors proposed a thin film transistor which reduces parasitic capacitance between a gate electrode of a thin-film transistor and a source region or a drain region of a semiconductor layer.
Abstract: PROBLEM TO BE SOLVED: To provide a thin film transistor which reduces parasitic capacitance between a gate electrode of a thin film transistor and a source region or a drain region of a semiconductor layer and improves characteristics of the thin film transistor; and provide a thin film transistor display board and a manufacturing method of the same, which drop a kickback voltage caused by parasitic capacitance thereby to reduce a signal delay and a signal distortion.SOLUTION: A thin film transistor comprises: a gate electrode; a gate insulation film located above or below the gate electrode; a channel region which overlaps the gate electrode across the gate insulation film; and a source region and a drain region which are located in the same layer with the channel region and connected with the channel region and which lie opposite to each other across the channel region as a center. Each of the channel region, the source region and the drain region includes an oxide semiconductor. A carrier concentration in each of the source region and the drain region is larger than a carrier concentration in the channel region.

Patent
26 Jun 2013
TL;DR: In this paper, a pixel unit circuit, a compensating method thereof and a display device are used to compensate the light emitting device by combining an internal compensation and an external compensation, and have advantages of both the internal compensation this paper.
Abstract: A pixel unit circuit, a compensating method thereof and a display device. The pixel unit circuit includes a driving transistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a storage capacitor and a light-emitting device (OLED). The pixel unit circuit, the compensating method thereof and the display device may compensate the light emitting device by combining an internal compensation and an external compensation, and have advantages of both the internal compensation and the external compensation. The Mura phenomenon caused by non-uniformity in threshold voltages or drifts of threshold voltages in the N-type depletion or enhanced driving transistor TFT may be eliminated effectively by the internal compensation, which may enhance a display effect. Additionally, the pixel unit circuit, the compensating method thereof and the display device may have a function for extracting characteristics of the driving TFT and characteristics of the light emitting device, which may be applicable to the external compensation driving effectively.

Patent
11 Nov 2013
TL;DR: In this article, an active clamp circuit for flyback power converters is presented, which includes a power transistor, a capacitor, a high-side transistor driver, a charge-pump circuit, and a controller.
Abstract: An active clamp circuit for a flyback power converter is provided. The active clamp circuit includes a power transistor, a capacitor, a high-side transistor driver, a charge-pump circuit, and a controller. The power transistor is coupled in series with a capacitor to develop an active-clamper. The active-damper is coupled in parallel with a primary winding of a transformer of the flyback power converter. The high-side transistor driver is coupled to drive the power transistor. The charge-pump circuit is coupled to a voltage source and the high-side transistor driver to provide a power supply to the high-side transistor driver. The controller generates a control signal coupled to control the high-side transistor driver. The control signal is generated in response to a demagnetizing time of the transformer.

Patent
Eiji Kanda1, Masayuki Kumeta1, Ryo Ishii1, Takeshi Okuno1, Naoaki Komiya1 
03 Dec 2013
TL;DR: In this paper, the authors proposed a data write operation where a threshold voltage of the driving transistor is compensated by turning on a first transistor and a second transistor connected in series between a drain and a gate of a driving transistor.
Abstract: A driving method of an electro-optic device includes initializing a gate voltage of a driving transistor; and performing a data write operation where a threshold voltage of the driving transistor is compensated by turning on a first transistor and a second transistor connected in series between a drain and a gate of the driving transistor and a voltage is provided to a capacity element connected to the gate of the driving transistor to hold a voltage of the compensated data signal as a gate voltage. The first transistor is at a drain side of the driving transistor and the second transistor is between the first transistor and a gate side of the driving transistor. When the data write operation ends, the second transistor is first turned off and, subsequently, the first transistor is turned off. The second transistor is again turned on after the first transistor is turned off.

Patent
19 Aug 2013
TL;DR: In this article, a first negative channel metal oxide semiconductor (NMOS) transistor circuit coupled to a first voltage source and coupled to the second NMOS transistor circuit was shown to have a larger channel width to channel length ratio than the first NMOS circuit.
Abstract: In one implementation, an apparatus may include a first negative channel metal oxide semiconductor (NMOS) transistor circuit coupled to a first voltage source, a second NMOS transistor circuit coupled to the first voltage source, the second NMOS transistor circuit having a smaller channel width to channel length ratio than the first NMOS transistor circuit, a first positive channel metal oxide semiconductor (PMOS) transistor circuit coupled to a second voltage source and coupled to the second NMOS transistor circuit, and a second PMOS transistor circuit coupled to the second voltage source, the second PMOS transistor circuit having a larger channel width to channel length ratio than the first PMOS transistor circuit.

Patent
30 Jan 2013
TL;DR: In this article, a voltage is sensed across a first field effect transistor connected in a series circuit branch in parallel with the power transistor, and the sensed voltage is used to generate output signal to indicate the current flowing in a power transistor.
Abstract: Methods and apparatus are presented for sensing current flowing in a power transistor of a switch mode converter, in which a voltage is sensed across a first field effect transistor connected in a series circuit branch in parallel with the power transistor, and the sensed voltage is used to generate output signal to indicate the current flowing in the power transistor

Patent
07 Nov 2013
TL;DR: In this article, a light-emitting element includes a light emitting element and a driving circuit that drives the light emitting component. But the driving circuit is not a fully connected circuit.
Abstract: A light-emitting element includes a light-emitting section and a driving circuit that drives the light-emitting section. The driving circuit includes at least (A) a drive transistor that is a p-channel field effect transistor, (B) an image-signal writing transistor that is a p-channel field effect transistor, (C) a light-emission control transistor that is a p-channel field effect transistor, and (D) a capacitor. Each of the drive transistor, image-signal writing transistor, and light-emission control transistor is provided in an n-type well formed in a p-type silicon semiconductor substrate. A first source/drain region of the drive transistor is electrically connected to the n-type well in which the drive transistor is formed.

Patent
Woo-Chul Jeon1, Ki-Yeol Park1, Young-Hwan Park1, Jai-Kwang Shin1, Jae-joon Oh1 
08 Mar 2013
TL;DR: In this paper, an electronic device may include a first transistor having a normally-on characteristic, a second transistor connected to the first transistor and having normally-off characteristic; a constant voltage application unit configured to apply constant voltage to a gate of the first transistors; and a switching unit configurable to apply a switching signal to the second transistors.
Abstract: An electronic device may include a first transistor having a normally-on characteristic; a second transistor connected to the first transistor and having a normally-off characteristic; a constant voltage application unit configured to apply a constant voltage to a gate of the first transistor; and a switching unit configured to apply a switching signal to the second transistor. The first transistor may be a high electron mobility transistor (HEMT). The second transistor may be a field-effect transistor (FET). The constant voltage application unit may include a diode connected to the gate of the first transistor; and a constant current source connected to the diode.