Topic
Static induction transistor
About: Static induction transistor is a research topic. Over the lifetime, 8155 publications have been published within this topic receiving 107058 citations. The topic is also known as: SIT.
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IBM1
TL;DR: In this article, a T-shaped gate and source and drain contacts self-aligned with preexisting shallow junction regions were proposed for submicron FET devices, and scalable to smaller device dimensions.
Abstract: A field effect transistor and method for making the same is described wherein the field effect transistor incorporates a T-shaped gate and source and drain contacts self-aligned with preexisting shallow junction regions. The present invention provides a low resistance gate electrode and self-aligned low resistance source/drain contacts suitable for submicron FET devices, and scalable to smaller device dimensions.
38 citations
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14 Jul 2003TL;DR: In this paper, the authors provide an CMOS comparator outputting one bit digital signal after comparing two analog input signals through alternately performing a track mode operation and latch mode operation decided by a clock signal having a constant period.
Abstract: The present invention provide an CMOS comparator outputting one bit digital signal after comparing two analog input signals through alternately performing a track mode operation and latch mode operation decided by a clock signal having a constant period, including: a latching unit having the main/sub input terminal; a first switching transistor having the clock signal as a gate input and having one end coupled to main input terminal; a first load transistor diode-connected to the other end of the first switching transistor and a ground end; a second switching transistor having a gate receiving the clock signal as a gate input and one end coupled to the sub input terminal; and a second load transistor diode-connected to the second switching transistor and to the other end of the ground terminal.
38 citations
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25 Jul 1994TL;DR: In this paper, a laterally recessed channel region (LRC) of a vertical field effect transistor (VFE transistor) with drain regions having graded diffusion junctions (31) and two load transistors (112 and 115) was shown to be a vertical p-channel thin-film field effect transistors.
Abstract: The disclosure includes a vertical field-effect transistor (115) with a laterally recessed channel region (92), a vertical field-effect transistor (116) having a graded diffusion junction (31), a static random access memory cell (110) having a vertical n-channel field-effect transistor (116) and a vertical p-channel field-effect transistor (115) and methods of forming them. In one embodiment, a six-transistor static random access memory cell (110) has two pass transistors (111 and 114), which are planar n-channel field-effect transistors, two latch transistors (113 and 116), which are vertical n-channel field-effect transistors with drain regions having graded diffusion junctions (31), and two load transistors (112 and 115), which are vertical p-channel thin-film field-effect transistors having laterally recessed channel regions (92).
38 citations
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09 Apr 2008TL;DR: In this paper, a high frequency switching circuit with a variable resistance circuit is presented, which is connected between the gate of the field-effect transistor and the control terminal of the high frequency signal.
Abstract: A high frequency switching circuit is disclosed. The high frequency switching circuit is provided with first and second high frequency signal terminals, a control terminal, a field-effect transistor having a drain, a source and a gate. The field-effect transistor is connected between the first and the second high frequency signal terminals so as to switch a high frequency signal. The high frequency switching circuit is further provided with a variable resistance circuit which is connected between the gate of the field-effect transistor and the control terminal.
38 citations
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04 Jan 2007
TL;DR: In this article, a transistor is turned on at regular intervals, so that a power supply potential is supplied to an output terminal of a shift register circuit through the transistor, and a shift of the threshold voltage of the transistor is suppressed.
Abstract: An object is to provide a semiconductor device which can suppress characteristic deterioration in each transistor without destabilizing operation. In a non-selection period, a transistor is turned on at regular intervals, so that a power supply potential is supplied to an output terminal of a shift register circuit. A power supply potential is supplied to the output terminal of the shift register circuit through the transistor. Since the transistor is not always on in a non-selection period, a shift of the threshold voltage of the transistor is suppressed. In addition, a power supply potential is supplied to the output terminal of the shift register circuit through the transistor at regular intervals. Therefore, the shift register circuit can suppress noise which is generated in the output terminal.
38 citations