Static induction transistor

About: Static induction transistor is a research topic. Over the lifetime, 8155 publications have been published within this topic receiving 107058 citations. The topic is also known as: SIT.

SOI LDMOS structure with improved switching characteristics

Abstract: An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.

Numerical studies of thermal effects on heterojunction bipolar transistor current-voltage characteristics using one-dimensional simulation

Abstract: Coupling the heat transfer equation with Poisson's and continuity equations in 1-D and taking into account carrier degeneracy, semiconductor band and temperature spatial distributions, the current-voltage characteristics of an n - p - n AlGaAs/GaAs heterojunction bipolar transistor are simulated. The Scharfetter-Gummel expressions for both electron and hole current densities are derived. Both voltage and current boundary conditions at the base contact are used in the calculations. The current modulation nature of bipolar transistor devices is revealed by using the current boundary condition. It is found that the temperature rise due to high current operation causes two effects: the current gain continuously declines after the base push-out is complete; and the negative differential resistance phenomenon occurs in the transistor current-voltage saturation region.

Clocked based method and devices for measuring voltage-variable capacitances and other on-chip parameters

Abstract: A characterization method for a device under test includes applying a bias voltage to a test circuit. The test circuit includes a first transistor coupled to the device under test, a second transistor coupled to the device under test and to the first transistor. A third transistor is coupled to a dummy device, a fourth transistor is coupled to the dummy device and to the third transistor. The transistors are of a common type. The characterization method further includes applying non-overlapping clocking signals to transistors of the test circuit to produce test signals for application to the device under test and detecting a current in one or more transistors from the device under test. The bias voltage is further varied to characterize the device under test.

Inductive load dump circuit

Abstract: A circuit in which the source-to-drain conduction path of a power switching transistor (N1) is connected in series with an inductive load (L1) between first and second power terminals and includes a voltage transient clamping transistor (P1) having its source-to-drain conduction path connected between the drain and gate of the switching transistor (N1). In response to a turn-off signal applied to the gate of the switching transistor (N1), a transient voltage is generated at the drain of the switching transistor and when the transient voltage exceeds a predetermined value, the clamping transistor (P1) is turned on. The conduction of the clamping transistor (P1) limits the voltage rise at the drain of the switching transistor (N1) and tends to maintain the switching transistor (N1) conductive to aid in the discharge of the energy stored in the inductive load (L1). A unidirectional conducting element connected in series with the clamping transistor (P1) ensures that only current of a polarity to discharge the inductive load (L1) flows through the clamping transistor (P1).

Dimming circuit having switching transistor protection means

Abstract: A dimming circuit adjusts the light output of a lamp by controlling the current flow in the lamp that is connected to a transistor, through turning on and off the transistor with a predetermined timing which is changed by the control signal from a control signal generating circuit. The dimming circuit has a protective circuit for applying an off-state command signal to switch the transistor to the off-state by detecting an excess current flowing in the transistor when an input signal is applied as a control signal for switching the transistor to the on-state.