Static induction transistor

About: Static induction transistor is a research topic. Over the lifetime, 8155 publications have been published within this topic receiving 107058 citations. The topic is also known as: SIT.

Dual drive buck regulator

Abstract: A switching regulator of the step down variety is disclosed. First and second transistors coupled in parallel between a first supply node and a first output node are controlled by a driver stage to sequentially (1) switch on the first transistor, (2) switch on the second transistor, (3) switch off the second transistor, and (4) switch off the first transistor. The first transistor is smaller than the second transistor, such that the first transistor can switch faster than the second transistor, thereby reducing power dissipation during the time intervals in which both transistors are switching. Such a design allows an increase in switching frequency without the conventional increase in power dissipation, in return for a relatively inexpensive change of adding an additional, smaller transistor in parallel with a larger one, and associated circuitry in the driver stage.

Pixel circuit and organic light emitting display using the same

Abstract: A pixel circuit and an organic light emitting display using the same that decrease crosstalk due to a leakage current in an off-region of a pixel switching device to an undetectable (or invisible) level, and compensate for a variation in threshold voltages within itself to provide for uniform brightness. The pixel circuit includes: a first transistor adapted to supply a current corresponding to a voltage applied to a gate thereof to an organic light emitting device; a second transistor adapted to supply a data voltage to a first electrode of the first transistor in response to a first scan signal; a third transistor adapted to connect a second electrode of the first transistor with the gate of the first transistor; and a capacitor adapted to store a voltage corresponding to the data voltage when the first scan signal is applied to the second transistor, and adapted to supply the stored voltage to the gate of the first transistor for the organic light emitting device to emit light.

Vertical transistor and memory cell

Abstract: A method for manufacturing a three-dimensionally structured vertical transistor or memory cell forms a silicon-on-insulator (SOI) structure on a semiconductor substrate and sequentially deposits a drain region, a channel region and a source region on the SOI substrate structure. The transistor includes a cylinder-type gate insulation layer surrounding the channel region and a gate electrode surrounding the gate insulation layer, having increased integration. This process and structure avoid the characteristic degradation caused by the leakage current associated with the trench process and structure.

All-around MOSFET gate and methods of manufacture thereof

Abstract: Metal oxide field effect transistor having a channel and a gate that surrounds the channel on four sides. Method of manufacture of the transistor includes processing the back of a silicon wafer to form a buried gate that is electrically connected to the gate of a conventional field effect transistor to form an all-around structure.

Pulse-frequency mode DC-DC converter circuit

Abstract: A step-down switching voltage regulator may operate in PFM mode based on peak current sense without requiring an external diode. The regulator may comprise a PMOS transistor and an NMOS transistor whose drains are coupled to a common output node and whose sources are coupled to high and low supply voltages, respectively, configured to develop a current in an inductor and generate an output voltage. A control circuit, coupled to the respective gates of the PMOS transistor and the NMOS transistor, may sense the current in the inductor (I L ), sense an attenuated version of the output voltage (VFB), and sense the polarity of the voltage (VX) developed at the common output node. The control circuit may turn on the PMOS transistor when the VFB falls below a reference voltage and VX remains positive with respect to the low supply voltage, and may turn off the PMOS transistor when I L reaches a specified value or when VFB exceeds the reference voltage. The control circuit may also turn on the NMOS transistor after the PMOS transistor is turned off and VX becomes negative with respect to the low supply voltage, and may turn off the NMOS transistor when VX becomes positive with respect to the low supply voltage.