Static induction transistor

About: Static induction transistor is a research topic. Over the lifetime, 8155 publications have been published within this topic receiving 107058 citations. The topic is also known as: SIT.

Field effect semiconductor device having improved voltage breakdown characteristics

Abstract: A semiconductor device including a field effect transistor of the D-MOS type which is composed of substructures and in which further surface zones are provided in the intermediate spaced between the regularly arranged substructures in order to improve the field distribution in the semiconductor body, as a result of which the breakdown voltage of the transistor is increased. The further surface zones can be provided without additional processing steps being required and need not be contacted at the main surface.

Single-transistor logic and CMOS inverters

Abstract: A dual transistor CMOS inverter can be built wherein a single gate is shared by two MOS transistors but only one transistor can be turned on at a time. A CMOS inverter function is provided. Further, a dual transistor logic function is described incorporating a combination of a lateral bipolar transistor (LBT) and a metal-oxide-semiconductor transistor (MOST). The gate of the MOST is used to turn on and off the base of the LBT. When the base is turned on, the LBT is turned on and off depending on the base voltage. This device has, thus, two inputs and can perform logic functions such as OR or NAND, which would typically require four transistors. The invention solves the problem of device density to perform logic by forming stacked devices with shared electrodes.

Device Characteristics of Organic Static Induction Transistor Using Copper Phthalocyanine Films and Al Gate Electrode

Abstract: We have fabricated organic static induction transistors (SITs) using copper phthalocyanine (CuPc) films. The organic SITs have a layered structure of Au (drain)/CuPc/Al (gate)/CuPc/Au (source)/glass. The electrical characteristics of SITs show that the source-drain current is controlled by the bias voltage applied to the Al gate electrode and a typical SIT operation with unsaturated current characteristics is examined. Furthermore, excellent characteristics such as low voltage and high speed operation as organic transistors are obtained by choosing an appropriate thickness for each layer.

Charge sensitivity of radio frequency single-electron transistor

Abstract: A theoretical analysis of the charge sensitivity of the radio frequency single-electron transistor (rf-SET) is presented. We use the “orthodox” approach and consider the case when the carrier frequency is much less than I/e where I is the typical current through rf-SET. The optimized noise-limited sensitivity is determined by the temperature T, and at low T it is only 1.4 times worse than the sensitivity of conventional single-electron transistor.

Highly scalable thin film transistor

Abstract: Shrinking the dimensions of PMOS or NMOS thin film transistors is limited by dopant diffusion. In these devices an undoped or lightly doped channel region is interposed between heavily doped source and drain regions. When the device is built with very short gate length, source and drain dopants will diffuse into the channel, potentially shorting it and ruining the device. A suite of innovations is described which may be used in various combinations to minimize dopant diffusion during fabrication of a PMOS or NMOS polycrystalline thin film transistor, resulting in a highly scalable thin film transistor. This transistor is particularly suitable for use in a monolithic three dimensional array of stacked device levels.