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Static induction transistor

About: Static induction transistor is a research topic. Over the lifetime, 8155 publications have been published within this topic receiving 107058 citations. The topic is also known as: SIT.


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Patent
02 May 2003
TL;DR: In this paper, a linear low-dropout voltage regulator is described that makes use of a depletion mode NMOS pass transistor and of a PMOS transistor in series to the NMOS transistor and connected to its drain.
Abstract: A linear low dropout voltage regulator is described that makes use of a depletion mode NMOS pass transistor and of a PMOS transistor in series to the NMOS transistor and connected to its drain. The depletion NMOS transistor assures low dropout operations, while the series PMOS transistor allows the current regulation even under the condition of shorted load. The same PMOS transistor may be used to disable the current in the load without generating a negative voltage at the gate of the depletion pass transistor. This regulator is inherently stable without the need for an output capacitor in parallel to the load.

57 citations

Patent
Bentchkowsky D Frohman1
15 Jun 1970
TL;DR: In this paper, a floating gate transistor comprising a floating silicon or metal gate in a field effect transistor which is particularly useful in a read-only memory is disclosed, where the gate which is surrounded by an insulative material such as SiO2 is charged by transferring charged particles across the insulation from the substrate during an avalanche (breakdown) condition in the source or drain junctions of the transistor.
Abstract: A floating gate transistor comprising a floating silicon or metal gate in a field effect transistor which is particularly useful in a read-only memory is disclosed. The gate which is surrounded by an insulative material such as SiO2 is charged by transferring charged particles (i.e., electrons) across the insulation from the substrate during an avalanche (breakdown) condition in the source or drain junctions of the transistor.

57 citations

Patent
14 Mar 1990
TL;DR: In this paper, a DC-to-AC voltage converter with galvanically separate onput and output circuits is considered, where the collector-emitter path is series-connected to the at least one primary winding.
Abstract: A DC-to-AC voltage converter having galvanically separate onput and output circuits, and comprising a converter transformer having at least one primary winding; a resonance capacitor connected to said at least one primary winding; a switching transistor, of which the collector-emitter path is series-connected to the at least one primary winding; and drive means for the switching transistor, wherein charge storage in the base-collector area of the switching transistor provides base drive for the switching transistor, and further comprising control means for detecting an increase of the collector-emitter voltage (Uce) of the switching transistor and for providing in response to such an increase and at least in a period of time directly following the increase, an additional base drive current for the switching transistor, which additional base drive current is gradually increased at a predetermined rate in such a manner that the storage time of the switching transistor remains substantially constant over the operating range of the converter.

56 citations

Journal ArticleDOI
TL;DR: In this paper, the impact of a non-uniform doping profile on the threshold surface potential, threshold voltage, normal field mobility degradation, and transconductance of MOS devices is investigated.
Abstract: MOS device characterization involves the extraction of parameters from electrical measurements. A nonuniform channel doping profile can make such characterization ambiguous since device parameters are usually based upon a uniform doping profile model. In this paper, we solve the one-dimensional Poisson's equation for several doping profiles and show the impact of a nonuniform doping profile on the threshold surface potential, threshold voltage, normal field mobility degradation, and transconductance.

56 citations

Patent
11 May 1988
TL;DR: A reference potential generating circuit according to this invention includes a first insulated gate field effect transistor of an enhancement type, a second insulated gate gate effect transistor, a depletion type and a voltage dividing circuit as discussed by the authors.
Abstract: A reference potential generating circuit according to this invention includes a first insulated gate field effect transistor of an enhancement type, a second insulated gate field effect transistor of a depletion type and a voltage dividing circuit. The source of the first insulated gate field effect transistor is connected to the ground terminal, and the drain and gate thereof are connected to one another. The drain of the second insulated gate field effect transistor is connected to the power source and the gate thereof is connected to a connection node which connects the drain and gate of the first insulated gate field effect transistor. The voltage dividing circuit is connected between the drain of the first insulated gate field effect transistor and the source of the second insulated gate field effect transistor.

56 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20234
20225
20211
20203
20196
20189