Topic
Static induction transistor
About: Static induction transistor is a research topic. Over the lifetime, 8155 publications have been published within this topic receiving 107058 citations. The topic is also known as: SIT.
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08 Nov 1977TL;DR: In this article, a junction type field effect transistor (FET) is used to supply a switching voltage which is different from the potential level of the control pulse from the source and is DC-restored following an input signal applied to the transistor.
Abstract: In an electronic switching circuit using a junction type field-effect transistor, a capacitor is connected between the gate electrode of the transistor and a control pulse source. The capacitor is cooperative with a rectifying action of the gate electrode of the transistor to supply to the gate of the transistor a switching voltage which is different from the potential level of the control pulse from the control pulse source and is DC-restored following an input signal applied to the transistor.
49 citations
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26 Jul 1982
TL;DR: A gallium arsenide buffer amplifier for use in a very large scale integrated circuits is provided in this article, where the transistor device in the buffer amplifier has a uniform depth N+ source, gate and drain region and the N+ dopant concentration is made very high which effectively reduces the resistance of the transistor devices and permits the area of the device to be reduced by more than one order of magnitude while maintaining high current and power levels.
Abstract: A gallium arsenide buffer amplifier for use in a very large scale integrated circuits is provided. The transistor device in the buffer amplifier has a uniform depth N+ source, gate and drain region and the N+ dopant concentration is made very high which effectively reduces the resistance of the transistor device and permits the area of the device to be reduced by more than one order of magnitude while maintaining high current and power levels.
49 citations
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05 Nov 1990TL;DR: In this paper, a method and apparatus for measuring and controlling the level of current in a sense FET which includes a power transistor (M1) and a sense transistor (M2) is described.
Abstract: A method and apparatus is disclosed for measuring and/or controlling the level of current in a Sense FET which includes a power transistor (M1) and a sense transistor (M2). The transistors (M1) and (M2) are both biased to operate in a linear mode, and the Vds of the sense transistor (M2) is compared to a predetermined fraction of the Vds of the power transistor (M1). A control signal is generated that is representative of the results of the comparison, and, in one embodiment, that control signal is used in a feedback arrangement to drive the Vds of the sense transistor (M2) to the predetermined fraction of the Vds of the power transistor (M1). Consequently, the level of current carried by the sense transistor (M2) is caused to be equal to the same predetermined fraction of the current carried by the power transistor (M1).
49 citations
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15 Sep 1998
TL;DR: In this paper, a low dropout regulator and methods for producing low drop-out voltage are provided, and a driver transistor adapted for connecting to an input supply voltage and producing an output voltage is provided.
Abstract: A low drop-out regulator and methods for producing a low drop-out voltage are provided. A driver transistor adapted for connecting to an input supply voltage and producing an output voltage is provided. In addition, a mirroring transistor is coupled to the driver transistor and a voltage differential between the drain and the source of the driver transistor is mirrored in the mirroring transistor. The low drop-out regulator operates in both linear and saturation regions of the driver transistor. The driver transistor and the mirroring transistor are implemented in a CMOS process.
49 citations