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Showing papers on "Strained silicon published in 1968"


Journal ArticleDOI
TL;DR: In this paper, the orientation dependence of the backscattered yield of 1.0-MeV helium ions has been used to investigate the lattice characteristics of silicon and germanium implanted at room temperature with 40-...
Abstract: The orientation dependence of the backscattered yield of 1.0-MeV helium ions has been used to investigate the lattice characteristics of silicon and germanium implanted at room temperature with 40-...

255 citations


Journal ArticleDOI
TL;DR: In this article, the ion dose needed to form amorphous silicon as a function of the temperature of the silicon during bombardment was studied and it was shown that the bombarded regions exhibit various hues until eventually when they become completely amomorphous they appear "milky" due to the Rayleigh scattering of light.
Abstract: Thin films of single crystals of both n-type and p-type silicon contain disordered zones ∼ 50 A in diameter, discernible in the electron microscope after bombardment with ∼ 1013 Ne+ ions cm−2. As the dose increases these zones become more numerous until eventually (≳ 1014 ions cm−2) they overlap, creating a continuous surface layer which electron diffraction shows to be amorphous silicon. The individual zones disappear on annealing between 400 and 500°C, and at ∼630°C the amorphous layer recrystallizes epitaxially upon the underlying silicon, leaving an array of dislocation loops and dipoles. The bombarded regions exhibit various hues until eventually when they become completely amorphous they appear ‘milky’ due to the Rayleigh scattering of light. This appearance has been used as a convenient method to study the ion dose needed to form amorphous silicon as a function of the temperature of the silicon during bombardment.

202 citations


Journal ArticleDOI
TL;DR: In this paper, an approximate electron energy band diagram for silicon nitride has been presented based on these values, and the threshold energy in this case is 2.11 ± 0.1 eV.
Abstract: The photoemission of both electrons and holes from degenerate silicon into thin (160–270 A) layers of silicon nitride has been observed. The threshold energies for these processes are found to be 3.17 ± 0.1 eV for electrons and 3.06 ± 0.1 eV for holes. In addition, the photoemission of electrons from aluminum into silicon nitride has been observed; the threshold energy in this case is 2.11 ± 0.1 eV. An approximate electron energy band diagram for silicon nitride based on these values is presented.

54 citations


Journal ArticleDOI
TL;DR: The spectral dependence of the optical constants of amorphous silicon films near the main absorption edge shows that the energy band structure of crystalline silicon is essentially conserved after amorphization, but the absorption coefficient corresponding to indirect transitions is much increased.

37 citations


Journal ArticleDOI
TL;DR: In this paper, a qualitative study of the masking properties of thin (≤1500Aa) silicon nitride and silicon oxynitride films on Si is presented.
Abstract: A qualitative study of the masking properties of thin (≤1500Aa) silicon nitride and silicon oxynitride films on Si is presented. A range of diffusion conditions was studied for doping sources including B, P, Ga, and As. Silicon nitride was not found to be a diffusion mask for all conditions. Conditions under which it can be expected to mask are specified.

21 citations


Journal ArticleDOI
TL;DR: In this paper, the trapping levels in silicon nitride have been investigated using the thermally stimulated current technique, and traps at between 0.50 and 0.90eV below the conduction band of the nitride were found.
Abstract: The trapping levels in silicon nitride have been investigated using the thermally stimulated current technique. Traps at between 0.50 and 0.90eV below the conduction band of the nitride were found, as well as a distribution of traps at and near the silicon-silicon nitride interface about 0.10eV below the conduction band of the silicon.

9 citations


Journal ArticleDOI
TL;DR: The effect of silicon nitride passivation on the performance of bipolar transistors under ionizing radiation was investigated in this paper, where three groups of silicon planar epitaxial npn transistors with silicon oxide, silicon dioxide and composite silicon dioxide-silicon nitride insulating layers were subjected to irradiation by 20 keV and by 1.5 MeV electrons.
Abstract: The effect of silicon nitride passivation on the performance of bipolar transistors under ionizing radiation was investigated. Three groups of silicon planar epitaxial npn transistors with silicon nitride, silicon dioxide and composite silicon dioxide-silicon nitride insulating layers were subjected to irradiation by 20 keV and by 1.5 MeV electrons. The base and collector currents were measured as a function of base-emitter voltage. The results show that silicon nitride and silicon dioxide passivated transistors possess identical properties, after irradiation by low energy electrons to saturation, even though the preirradiation d. c. gain of the standard devices was much greater. Irradiation by 1.5 MeV electrons caused channel formation in all three groups.

6 citations



Patent
12 Aug 1968
TL;DR: In this article, an improved method of MANUFACTURING SEMICONDUCTOR DEVICES, in PartICULAR Low VOLTAGE Zener DIODES, HAVING ALUMINUM-ALLOY PN-JUNCTIONS, is presented.
Abstract: THIS IS AN IMPROVED METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, IN PARTICULAR LOW VOLTAGE ZENER DIODES, HAVING ALUMINUM-ALLOY PN-JUNCTIONS. THE IMPROVEMENT IN MANUFACTURE RESULTS FROM USING SILICON NITRIDE INSTEAD OF SILICON DIOXIDE TO PASSIVATE AND MASK THE SURFACE OF A WAFER, SILICON NITRIDE BEING IMPERVIOUS TO ALUMINUM WHEREAS SILICON DIOXIDE TENDS TO INTERACT WITH ALUMINUM AT TEMPERATURES WHERE ALLOYING IS PERFORMED IN A MANNER WHICH IS DELETERIOUS TO THE DEVICE. AFTER SILICON NITRIDE IS DEPOSITED ON THE WAFER SURFACE, WINDOWS ARE ETCHED THEREIN AND ALUMINUM IS DEPOSITED OVER THE ENTIRE SURFACE. SINCE SILICON NITRIDE IS IMPERVIOUS TO ALUMINUM, THE ALUMINUM CAN BE ALLOYED INTO THE SUBSTRATE THROUGH THE WINDOW WITHOUT HAVING TO REMOVE THE ALUMINUM FROM THE SURFACE OF THE SILICON NITRIDE. D R A W I N G

4 citations


Proceedings ArticleDOI
01 Jan 1968
TL;DR: In this paper, the gate insulator consists of a double layer of silicon dioxide and silicon nitride, and at an energy level inside the silicon forbidden band, are traps with a density as high as 2×1014cm-2in the form of disorder states.
Abstract: Transistors with memory hawe been constructed in the form of MIS field-effect transistors in which the gate insulator consists of a double layer. Closest to the silicon is a silicon dioxide layer, no more than 15A thick. The importance of this layer will be discussed. It is covered by another layer, which may be silicon nitride, 200-800A thick. Aluminum oxide and silicon dioxide have also been tried as the second layer. At the interface between these two insulator layers, and at an energy level inside the silicon forbidden band, are traps with a density as high as 2×1014cm-2in the form of disorder states. These traps are donor type and may each give off an electron when the silicon is biased positively for a short time with respect to the insulator, turning the transistor ON. When the polarity is reversed the electrons are recaptured by the traps, neutralizing them and turning the transistor OFF. The charge transport is by tunneling.

3 citations


Proceedings ArticleDOI
Gordon E. Moore1
01 Jan 1968
TL;DR: In this paper, the present status of silicon device technology is reviewed in order to point out its limitations, and the limitations of most concern in these areas of wafer fabrication technology are those associated with improving process control and minimizing defects.
Abstract: The present status of silicon device technology is reviewed in order to point out its limitations. The combination of melt-doping, epitaxial growth, and oxide-masked diffusion allows, at least in principle, the construction of about any desired impurity configuration within the silicon crystal. Our present understanding of the silicon-silicon oxide surface allows the design and control of the important surface properties and makes available such important devices as MOS transistors. The limitations of most concern in these areas of wafer fabrication technology are those associated with improving process control and minimizing defects. Effort in this area takes the form of relating cause to effect followed by appropriate detailed process changes. It represents a direction of extreme importance in maximizing the impact of silicon devices through greatly reduced cost.

Journal ArticleDOI
P. Gansauge1
TL;DR: In this paper, the authors describe and discuss these processes for both n-p-n and p-n-p transistors and show that the dc and high-frequency performance of these transistors reach expected values and indicate a superiority of germanium in high-speed performance.
Abstract: It has been predicted that Ge transistors should exhibit faster switching speed than Si devices of comparable geometry, due to the higher electron and hole mobility in germanium. The development of techniques for the deposition of masking films and diffusion of donors and acceptors in Ge enables processing of double diffused planar transistors in a manner similar to those used in silicon. This paper describes and discusses these processes for both n-p-n and p-n-p transistors. The dc and high-frequency performance of these transistors reach expected values and indicate a superiority of germanium in high-speed performance.

Journal ArticleDOI
TL;DR: In this article, it was shown that the higher dielectric constant and passivating qualities of the nitride are of value, and the electrical properties of the silicon/silicon dioxide interface can be controlled by existing technology.
Abstract: Results are presented which show that silicon nitride deposited directly onto silicon is of limited value for use in MIS devices, mid that most of these limitations can be removed by using the nitride in sandwich structures with thermally grown oxides. Tn such structures the higher dielectric constant and passivating qualities of the nitride are of value, and the electrical properties of the silicon/silicon dioxide interface can be controlled by existing technology. Associated Semiconductor Manufacturers Limited is a joint Mullard/G.E.C. company responsible for the development and manufacture of Mullard semiconductor devices.


Journal ArticleDOI
TL;DR: In this paper, the mobility of the instability inducing ions in the SiO-SiO2 layer of vacuum deposited FETs has been estimated to be about 0.000001 cm sq/V sec.
Abstract: : The mobility of the instability inducing ions in the SiO-SiO2 layer of vacuum deposited FETs has been estimated to be about 0.000001 cm sq/V sec. (Author)