Showing papers on "Stuck-at fault published in 2018"
TL;DR: Based on adaptive backstepping control method, an output-based adaptive neural tracking control strategy is developed for the considered system against actuator fault, which can ensure that all the signals in the resulting closed-loop system are bounded, and the system output signal can be regulated to follow the response of the given reference signal with a small error.
Abstract: This paper studies an output-based adaptive fault-tolerant control problem for nonlinear systems with nonstrict-feedback form. Neural networks are utilized to identify the unknown nonlinear characteristics in the system. An observer and a general fault model are constructed to estimate the unavailable states and describe the fault, respectively. Adaptive parameters are constructed to overcome the difficulties in the design process for nonstrict-feedback systems. Meanwhile, dynamic surface control technique is introduced to avoid the problem of “explosion of complexity”. Furthermore, based on adaptive backstepping control method, an output-based adaptive neural tracking control strategy is developed for the considered system against actuator fault, which can ensure that all the signals in the resulting closed-loop system are bounded, and the system output signal can be regulated to follow the response of the given reference signal with a small error. Finally, the simulation results are provided to validate the effectiveness of the control strategy proposed in this paper.
139 citations
TL;DR: A mapping algorithm with inner fault tolerance is proposed to convert matrix parameters into RRAM conductances in RCS and tolerate SAFs by fully exploring the available mapping space to ensure that RCS is effective when the percentage of faulty RRAM cells is high.
Abstract: Emerging metal-oxide resistive switching random-access memory (RRAM) devices and RRAM crossbars have demonstrated their potential in boosting the speed and energy-efficiency of analog matrix-vector multiplication. However, due to the immature fabrication technology, commonly occurring Stuck-At-Faults (SAFs) seriously degrade the computational accuracy of an RRAM-based computing system (RCS). In this paper, we present a fault-tolerant framework for RCS. A mapping algorithm with inner fault tolerance is proposed to convert matrix parameters into RRAM conductances in RCS and tolerate SAFs by fully exploring the available mapping space. Two baseline redundancy schemes are proposed to ensure that RCS is effective when the percentage of faulty RRAM cells is high. To reduce the number of redundant RRAM cells when the SAFs follow a non-uniform distribution or an unknown distribution, a distribution-aware redundancy scheme and a re-configurable redundancy scheme are proposed to provide dynamic fault tolerance. Simulation results show that, the baseline redundancy schemes can improve the recognition accuracy of the MNIST data set to almost the same as the RRAM-fault-free case, with an energy overhead of approximately 30%. When SAFs follow a non-uniform and an unknown distribution, the distribution-aware and re-configurable schemes can reduce the number of redundant RRAM cells from more than 200% to less than 40% and 60%, respectively, without reducing the recognition accuracy.
117 citations
TL;DR: Using local voltage and current data, a least square-based technique estimates the parameter of the fault path, from which the direction of the faults is inferred and is found to be more accurate compared to available technique.
Abstract: In a smart dc microgrid, power electronic devices limit the current during fault and therefore, an overcurrent-based relaying scheme cannot provide required sensitivity and selectivity for such a system. For a dc microgrid with ring configuration having bidirectional power flow, the protection design is further complicated. For reliable supply to customers and to avoid unwanted disconnection of renewable resources, selectivity of a protection scheme is important. In this paper, using local voltage and current data, a least square-based technique estimates the parameter of the fault path, from which the direction of the fault is inferred. Using the direction of fault information of both ends of a line segment in a ring system, internal and external faults are discriminated for network protection. Using PSCAD/EMTDC simulations for a ring system, proposed method is tested for various fault situations including high resistance fault, close-in fault, signals with noise, and considering different modes of distributed generation operations. The proposed algorithm is also validated on a scaled-down hardware setup in the laboratory. The method is found to be more accurate compared to available technique.
105 citations
TL;DR: In this paper, the authors proposed new fault indices that detect and locate the open-phase faults without additional hardware, which proves to be simple and independent of the operating point, control technique, and drive parameters.
Abstract: Fault tolerance is much appreciated at industry in applications with high-reliability requirements. Due to their inherent fault-tolerant capability against open-phase faults (OPFs), drives with multiple three-phase windings are ideal candidates in such applications and for this reason many efforts have been devoted to the development of different fault-tolerant control strategies. Fault detection is, however, a previous and mandatory stage in the creation of fault-tolerant drives, and the study of specific OPF detection methods for six-phase drives is still scarce. Taking advantage of the secondary currents (so called x - y currents) that are unique in multiphase machines, this study proposes new fault indices that detect and locate the OPFs without additional hardware. The method proves to be simple and independent of the operating point, control technique, and drive parameters. Comparative experimental results confirm the capability of the proposed method to achieve fast detection times with good robustness.
100 citations
TL;DR: A novel method is presented to address the stochastically stability analysis and satisfies a given $H_{2}$ performance index simultaneously and an event-triggered scheme is proposed to determine whether the networks should be updated at the trigger instants decided by the event-threshold.
Abstract: This paper is concerned with the fault detection filtering for complex systems over communication networks subject to nonhomogeneous Markovian parameters. A residual signal is generated that gives a satisfactory estimation of the fault, and an event-triggered scheme is proposed to determine whether the networks should be updated at the trigger instants decided by the event-threshold. Moreover, a random process is employed to model the phenomenon of malicious packet losses. Consequently, a novel method is presented to address the stochastically stability analysis and satisfies a given $H_{2}$ performance index simultaneously. The condition of the existence of the filter design algorithm is derived by a convex optimization approach to estimate the faults and to generate a residual. Finally, the proposed fault detection filtering method is then applied to an industrial nonisothermal continuous stirred tank reactor under realistic network conditions. Simulation results are given to show the effectiveness of the proposed design method and the designed filter.
99 citations
TL;DR: In this article, a fault detection, localization, redundancy, and recovery strategy for MMC with nearest level modulation (NLM) is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions.
Abstract: The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy.
88 citations
TL;DR: A Joule-integral-based method for selecting an appropriate rating of applied fuses has been presented to provide a reliable fault-isolation operation and a comparison with currently available fault-tolerant dc–ac converters is given to show the merits of the proposed topology.
Abstract: In this paper, a new fault tolerant dc–ac converter-fed induction motor drive is proposed to maintain motor as close as possible to its desired normal operation under open- and short-circuit switch failures. The operational principles for fault detection and isolation schemes are provided. Two control strategies including predictive control and voltage mode-controlled PWM with integral-double-lead controller for two stage of the converter are presented in conjunction with the elaborated discussion. The control strategy determines appropriate switching states for continuous operation of the drive after a fault. The proposed topology makes it possible to integrate the minimal redundant hardware and full tolerance capability which is an important advantage of the proposed topology. Moreover, the most important advantages of the proposed topology are a fast response in a fault condition and low cost of the converter in comparison with the evaluated topologies. A Joule-integral-based method for selecting an appropriate rating of applied fuses has been presented to provide a reliable fault-isolation operation. Also, a comparison with currently available fault-tolerant dc–ac converters is given to show the merits of the proposed topology. Finally, the experimental results are presented to verify the validity of the theoretical analysis and industrial feasibility of the proposed converter.
64 citations
TL;DR: The proposed model aims to consider a tradeoff between the total customer interruption cost and FI relevant costs, including capital investment, installation, and maintenance costs, and guarantees global optimum solution achieved in an effective runtime.
Abstract: Fault indicator (FI) plays a crucial rule in enhancing service reliability in distribution systems. This device brings substantial benefits for fault management procedure by speeding up fault location procedure. This paper intends to develop a new optimization model to optimally deploy FI in distribution systems. The proposed model aims to consider a tradeoff between the total customer interruption cost and FI relevant costs, including capital investment, installation, and maintenance costs. As the main contribution of this paper, the problem is formulated in mixed integer programing, which guarantees global optimum solution achieved in an effective runtime. Moreover, the model takes advantages of taking pragmatic fault location procedure into account, which results in more reliable solutions. The effectiveness of the proposed method is scrutinized through various case studies and sensitivity analyses of a test system. In addition, the applicability of the model in practice is appraised by applying it on a real-life distribution network. The resultant outcomes demonstrate the integrity of the proposed model.
53 citations
TL;DR: In this paper, an adaptive fault-diagnostic threshold is proposed to ensure the robustness of the diagnosis of single and double open-switch faults in back-to-back converters of a doubly fed wind turbine.
Abstract: In order to improve the reliability and availability of the converters of wind turbines, condition monitoring and fault diagnosis are considered crucial means to achieve these goals. In this text, according to the current variation characteristics of the converter, this paper presents a novel approach for real-time diagnostics of open-switch faults in back-to-back converters of a doubly fed wind turbine. The average value of the normalized converter phase currents and the absolute normalized currents are used as principal quantities to formulate the diagnostic variables. The proposed fault-diagnostic variables prove to be carrying information about multiple open-switch faults. In addition to, by the combination of these variables with the average absolute values of the normalized converter phase currents, an adaptive fault-diagnostic threshold is proposed, which ensures the robustness of the diagnosis of single and double open-switch faults. Finally, through the diagnostic variables and the adaptive threshold, the dynamic fault-diagnostic method for open-switch faults in the back-to-back converter of a doubly fed wind turbine is formed. The simulation and experimental results also indicate that the fault-diagnostic method can not only diagnose the multiple open-circuit faults of a back-to-back converter, but also have a better robustness.
51 citations
TL;DR: In this paper, a fault location on three-terminal and tapped transmission lines without requiring line parameters is presented, which mitigates the effect of line parameter variations due to weather and loading conditions on fault-location accuracy.
Abstract: In this paper, fault location on three-terminal and tapped transmission lines without requiring line parameters is presented, which mitigates the effect of line parameter variations due to weather and loading conditions on fault-location accuracy. For three-terminal lines, a fault-location method is presented, which utilizes postfault measurements of all three terminals. For tapped lines, two methods are presented. The first one uses postfault measurements of the main two terminals. The second one needs one cycle of prefault measurements at the main terminals as well. Synchronized transient-based measurements are used in methods proposed in this paper. In all of the presented methods, the fault-location problem is converted to an optimization problem and then solved to find the line parameters and the accurate location of the fault. The simulations are carried out by alternative transients program/electromagnetic transients program (ATP/EMTP) software, and the presented algorithms are executed by MATLAB. Simulation results assess the effects of fault resistance, type, and inception angle on the accuracy of the presented methods. Further discussion is also provided on the impacts of synchronization errors, noisy measurements, and nonresistive faults.
43 citations
TL;DR: In this article, an accurate fault-location algorithm that uses synchronized measurements from both ends of the series capacitor-compensated transmission line (SCCTL) is presented which provides fault location results without using the model of MOV or natural fault loop for single-phase to ground, and double-phase-to ground faults.
Abstract: Locating a fault in a series-capacitor-compensated transmission line (SCCTL) is a challenging task due to the action of a metal-oxide varistor a nonlinear element present as a part of the protection system of the series capacitor. In this paper, an accurate fault-location algorithm that uses synchronized measurements from both ends of the SCCTL is presented which provides fault-location results without using the model of MOV or natural fault loop for single-phase-to-ground, and double-phase-to-ground faults. Another salient feature of the proposed technique is that the subroutines for locating faults in different sections transmission line yield almost identical fault-location results regardless of which section the transmission line is faulted. The proposed technique could also be extended to the double-circuit transmission lines. First, the proposed technique is introduced and its features are elaborated through detailed mathematical analysis. Thereafter, a 500- $\text{kV}$ system with an SCCTL is designed in PSCAD, while the fault-location algorithm is modeled in MATLAB. The proposed algorithm is tested through simulations covering various fault scenarios in an SCCTL. For performance evaluation, the comparative analysis of the proposed technique with a well-known existing technique is performed in this paper.
TL;DR: In this paper, the authors proposed a procedure that is suitable for experimental investigation of real-time open-switch and open-phase faults diagnosis of a 5-leg voltage source inverter feeding a five-phase biharmonic permanent magnet synchronous machine (PMSM).
Abstract: This paper proposes a procedure that is suitable for experimental investigation of real-time open-switch and open-phase faults diagnosis of a five-leg voltage source inverter feeding a five-phase biharmonic permanent magnet synchronous machine (PMSM). The algorithm is based on the specific characteristics of multiphase machines, which allows inverter fault detection with sufficient robustness of the algorithm in the presence of fundamental and third harmonic components. First, the inverter fault effects analysis is achieved in the characteristic subspaces of the five-phase PMSM. Specificities that are interesting for the elaboration of a real-time fault detection and identification (FDI) process are highlighted. Original and particular algorithms are used for an accurate 2-D normalized fault vector extraction in a defined fault reference frame. This frame is dedicated only for FDI. To ensure the high immunity of the FDI process against transient states, a particular normalization procedure is applied. The normalized diagnostic signals are formulated from the defined frame and other variables derived from the reference and measured currents. Simulation and experimental results of open-switch and open-phase faults are provided to validate the proposed algorithm.
TL;DR: In this paper, a fault-tolerant series-resonant dc-dc converter (SRC) is proposed to reduce the need of redundancy by reconfiguring the SRC in a half-bridge topology.
Abstract: The series-resonant dc–dc converter (SRC) is widely applied in a large range of voltage and power In most applications, fault tolerance is a highly desired feature and it is obtained through redundancy This paper proposes a fault-tolerance solution for the SRC, which could drastically reduce the need of redundancy Using the proposed scheme, the full-bridge-based SRC or multilevel-based SRC can be reconfigured in a half-bridge topology, in order to keep the converter operational even with the failure (open circuit or short circuit) of one switch Since the proposed scheme can be applied to the full-bridge-SRC and multilevel SRC, a family of fault-tolerant converter is proposed in this work The advantages of the proposed approach are minimum of additional hardware and no deterioration of the converter efficiency The proposed fault-tolerance solution was experimentally tested in a 10 kW SRC prototype with input voltage of 700–600 V A short-circuit fault in a semiconductor is tested and the results confirm the effectiveness of the proposed approach
TL;DR: In this article, a transient analysis based on DC-link capacitive discharge is presented to design a fault detection method for multi-terminal DC systems. But, the proposed method is minimally influenced by the fault location and resistance.
TL;DR: In this paper, the authors analyzed two fault-tolerant dual-multiphase motor drives, a series-connected topology, and a standard H-bridge topology under two fault conditions: short-circuit of an inverter's switch and an open-phase of the machine.
Abstract: This paper analyzes two fault-tolerant dual-multiphase motor drives, a series-connected topology, and a standard H-bridge topology. Previous studies have shown that the series connected topology is appropriate to an aerospace application and has lower peak current in degraded mode in comparison with the H-bridge topology, which may consequently diminish the system's weight and cost. This paper extends the study to compare different control strategies of these structures under two fault conditions: short-circuit of an inverter's switch and an open-phase of the machine. The control strategies analyzed in this paper do not impact the fundamental current or the torque generation, but the amplitudes of some harmonics in degraded mode are expected to be narrowed down in order to reduce the inverter's size. Some analyses of maximum voltage and peak current in degraded mode have been used for inverter dimensioning. Experimental results are shown and compared to the simulated ones to confirm the validity of this study.
TL;DR: In this article, a sensor fault tolerant control (FTC) strategy for electronically-coupled distributed energy resource (DER) units in grid-connected microgrid systems is proposed.
TL;DR: In this article, a fault location scheme for three-terminal untransposed double-circuit transmission lines utilizing synchronized voltage and current measurements obtained by GPS technique is proposed taking into consideration the distributed line model and the mutual couplings effect between the parallel lines to obtain accurate results.
TL;DR: Two approaches, one involving random search and the other, involving directed search have been proposed and validated on benchmark circuits considering missing-gate fault (complete and partial), bridging fault and stuck-at fault with optimum coverage and reduced computational efforts.
Abstract: Low power circuit design has been one of the major growing concerns in integrated circuit technology. Reversible circuit (RC) design is a promising future domain in computing which provides the benefit of less computational power. With the increase in the number of gates and input variables, the circuits become complex and the need for fault testing becomes crucial in ensuring high reliability of their operation. Various fault detection methods based on exhaustive test vector search approaches have been proposed in the literature. With increase in circuit complexity, a faster test generation method for providing optimal coverage becomes desirable. In this paper, a genetic algorithm-based heuristic test set generation method for fault detection in RCs is proposed which avoids the need for an exhaustive search. Two approaches, one involving random search and the other, involving directed search have been proposed and validated on benchmark circuits considering missing-gate fault (complete and partial), bridging fault and stuck-at fault with optimum coverage and reduced computational efforts.
TL;DR: In this article, a single-phase-to-ground fault identification method based on D-S evidence theory was proposed, and two flexible fault isolation methods were further proposed to solve the overvoltage problem in wind farms.
TL;DR: In this paper, an information transfer-based novel data-driven framework for fault root cause tracing of complex electromechanical systems in the processing industry was proposed, taking into consideration the experience and qualitative analysis of conventional fault root-cause tracing methods.
TL;DR: Aiming applications where simplicity and low computation efforts are required and fast dynamic response is not imperative, an open-loop volts/hertz (V/f) compensation strategy is discussed in order to keep the rated operation even after the occurrence of the fault, assuring the maintenance of sinusoidal flux.
Abstract: Considering that so far all studies regarding multiphase drives fault tolerance performance have been carried out making use of conventional two-level inverters, this study discusses the fault tolerance performance of a six-phase drive system based on a dual inverter under single-, two-, or three-phase open-circuit fault. Aiming applications where simplicity and low computation efforts are required and fast dynamic response is not imperative, an open-loop volts/hertz (V/f) compensation strategy is discussed in order to keep the rated operation even after the occurrence of the fault, assuring the maintenance of sinusoidal flux. The six-phase machine mathematical model after the fault is detailed and utilised to elaborate the compensation strategy. Simulation and experimental results show the validity of the discussed solution and its feasibility.
TL;DR: In this article, a method has been proposed for voltage source converter (VSC)-based high-voltage direct current (HVDC) transmission lines to detect the fault and find the fault pole during earthed and unearthed faults.
Abstract: In this work, a method has been proposed for voltage source converter (VSC)-based high-voltage direct current (HVDC) transmission lines to detect the fault and find the fault pole during earthed and unearthed faults. Pre-processed features from DC voltage signals of both the poles and neutral to ground current signals from the rectifier end are taken as input to the proposed method. In this work, back-propagation neural network has been used as a classifier to detect the fault and to find the faulty pole. Three modules are designed—BNN-D for fault detection, BNN-P for fault pole identification and BNN-G for ground identification. The advantage of proposed method is that it not only detects the fault in a VSC-HVDC transmission lines, but it also identifies the faulty pole. Another advantage of proposed method is it does not need any communication link as it uses one-end measurement and the reach setting is up to 99.9% of the line length. Results of the proposed method have better selectivity, reliability, robustness and accuracy.
TL;DR: Detailed analysis on the internal phase-to-phase short-circuit faults, including the faults within the same group of Y-connected phases and those between different groups of Y -connected phases in the 12-phase system.
Abstract: The 12-phase synchronous generator–rectifier system is widely used in mobile platforms that require high system security. In the system, the stator internal short circuit is a kind of common fault that may compromise the security of the generator. This paper gives detailed analysis on the internal phase-to-phase short-circuit faults, including the faults within the same group of Y-connected phases and those between different groups of Y-connected phases in the 12-phase system. A multiloop mathematical model is built to calculate all the voltages and currents when the faults occur in the system. In the model, the additional short-circuit loop between different phases, as well as the fault effects on both the air-gap magnetic field and the circuit topology of the system, are taken into account. Then a series of fault experiments are carried out on a 12-phase model machine. In view of the good agreement of experiment and simulation results, the effectiveness of the mathematical model and the simulation method is confirmed. Finally, the electric characteristics of the internal phase-to-phase short-circuit faults are summarized, and the fault mechanism is revealed.
TL;DR: The design of a novel single layer banyan network using QCA for nanocommunication is illustrated and the effect of stuck-at-fault at the control input is observed and excelled for fault free design of the crossbar switch.
TL;DR: In this article, the authors proposed runtime adaptive scrubbing (RAS), a multilayered error correction and detection scheme with three modes of operation enabled by an area-efficient configurable encoder for encoding packets on the switch-to-switch (s2s) layer.
Abstract: As aggressive scaling continues to push multiprocessor system-on-chips (MPSoCs) to new limits, complex hardware structures combined with stringent area and power constraints will continue to diminish reliability. Waning reliability in integrated circuits will increase the susceptibility of transient and permanent faults. There is an urgent demand for adaptive error correction coding (ECC) schemes in network-on-chips to provide fault tolerance and improve overall resiliency of MPSoC architectures. The goal of adaptive ECC schemes should be to maximize power savings when faults are infrequent and increase application speedup by boosting fault coverage when faults are frequent. In this paper, we propose runtime adaptive scrubbing (RAS), a novel multilayered error correction and detection scheme with three modes of operation enabled by an area-efficient configurable encoder for encoding packets on the switch-to-switch (s2s) layer, thus preventing faults from accumulating up the network stack and onto the end-to-end layer. As fault rates fluctuate we propose a dynamic methodology for improving fault localization and intelligently adapt fault coverage on demand to sustain graceful network degradation. RAS successfully improves network resiliency, fault localization, and fault coverage as compared to traditional static s2s schemes. Simulation results demonstrate that static RAS improves network speedup by 10% for Splash-2/PARSEC benchmarks on a $8 \times 8$ mesh network while reducing area overhead by 14% and incurring on an average 6.6% power penalty by boosting fault tolerance when fault rates increase. Further, our dynamic RAS scheme maintains 97.88% of network performance for real applications while incurring 20% power penalty.
TL;DR: In this paper, a dual-mode state and fault estimation scheme is proposed for switched linear systems with a class of state jumps in the presence of simultaneous actuator and sensor faults.
TL;DR: QCA based low power design of Polar encoder circuit at nano-scale is demonstrated and the stuck-at-fault effect in generation of valid Polar codes is explored and the simulation result proves the design accuracy of the encoding circuit.
TL;DR: It is shown that faulty quantum circuits under the widely accepted single fault assumption can be fully characterized by the (single) faulty gate and the corresponding fault model, which allows them to efficiently determine test input states as well as measurement strategy for fault detection and diagnosis.
Abstract: Detection and isolation of faults is a crucial step in the physical realization of quantum circuits. Even though quantum gates and circuits compute reversible functions, the standard techniques of automatic test pattern generation (ATPG) for classical reversible circuits are not directly applicable to quantum circuits. For faulty quantum circuits under the widely accepted single fault assumption, we show that their behavior can be fully characterized by the (single) faulty gate and the corresponding fault model. This allows us to efficiently determine test input states as well as measurement strategy for fault detection and diagnosis. Building on top of these, we design randomized algorithms which are able to detect every nontrivial single-gate fault with minimal probability of error. We also describe similar algorithms for fault diagnosis. We evaluate our algorithms by the number of output samples that needs to be collected and the probability of error. Both of these can be related to the eigenvalues of the operators corresponding to the circuit gates. We experimentally compare all our strategies with the state-of-the-art ATPG techniques for quantum circuits under the “single missing faulty gate” model and demonstrate that significant improvement is possible if we can exploit the quantum nature of circuits.
TL;DR: A self-reconfiguring IEEE 1687 network in which all instruments that have detected faults are automatically included in the scan path, and a fault detection and localization module in hardware that detects the configuration of the network after self- reconfiguration and extracts the error codes reported by the fault monitoring instruments is proposed.
Abstract: Efficient handling of faults during operation is highly dependent on the interval (latency) from the time embedded monitoring instruments detect faults to the time when the fault manager localizes the faults. In this article, we propose a self-reconfiguring IEEE 1687 network in which all instruments that have detected faults are automatically included in the scan path, and a fault detection and localization module in hardware that detects the configuration of the network after self-reconfiguration and extracts the error codes reported by the fault monitoring instruments. To enable self-reconfiguration, we propose a modified segment insertion bit (SIB) compliant to IEEE 1687. We provide time analyses on fault detection and fault localization for single and multiple faults, and suggest how the self-reconfiguring IEEE 1687 network should be designed such that time for fault detection and fault localization is kept low and deterministic. We show that compared with previous schemes, our proposed network significantly reduces the fault localization time. For validation, we implemented a number of self-reconfiguring networks as well as their corresponding fault detection and localization modules in hardware, and performed post-layout simulations. We show that for large number of instruments, implementing the fault detection and localization module in hardware results in less area compared with the corresponding software-based implementation. Another benefit of the hardware implementation over its software counterpart is that to achieve the same fault detection and localization time, the hardware module can be clocked at a lower frequency than the core on which the corresponding software implementation would run.
TL;DR: In this paper, the authors presented a fault location method for transmission lines with the application of a mono-objective optimization technique using the ellipsoid algorithm with voltage and current data of both terminals.
Abstract: This paper presents a fault location method for transmission lines with the application of a mono-objective optimization technique using the ellipsoid algorithm with voltage and current data of both terminals. The fault detection is performed using the stationary wavelet transform and Parseval’s theorem, and the classification was conducted with the application of artificial neural networks. The minimization of the objective function defined for the short and long transmission line models provides not only the distance to the fault point, but also the fault resistance value. Many short-circuit situations simulated in the alternative transients program are tested with variations in the fault type, adjustments in the distance to the fault point, and fault resistance. The results of the algorithm applied to real faults in the electrical system of Brazil are also presented and compared to the values obtained with a classic fault location algorithm. According to the observations, the adopted formulation achieves the pre-established objectives, with mean errors of fault location for the real cases lower than 2% of the line length.